Merge tag 'iommu-updates-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu updates from Joerg Roedel:
- Allow compiling the ARM-SMMU drivers as modules.
- Fixes and cleanups for the ARM-SMMU drivers and io-pgtable code
collected by Will Deacon. The merge-commit (6855d1ba75
) has all the
details.
- Cleanup of the iommu_put_resv_regions() call-backs in various
drivers.
- AMD IOMMU driver cleanups.
- Update for the x2APIC support in the AMD IOMMU driver.
- Preparation patches for Intel VT-d nested mode support.
- RMRR and identity domain handling fixes for the Intel VT-d driver.
- More small fixes and cleanups.
* tag 'iommu-updates-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (87 commits)
iommu/amd: Remove the unnecessary assignment
iommu/vt-d: Remove unnecessary WARN_ON_ONCE()
iommu/vt-d: Unnecessary to handle default identity domain
iommu/vt-d: Allow devices with RMRRs to use identity domain
iommu/vt-d: Add RMRR base and end addresses sanity check
iommu/vt-d: Mark firmware tainted if RMRR fails sanity check
iommu/amd: Remove unused struct member
iommu/amd: Replace two consecutive readl calls with one readq
iommu/vt-d: Don't reject Host Bridge due to scope mismatch
PCI/ATS: Add PASID stubs
iommu/arm-smmu-v3: Return -EBUSY when trying to re-add a device
iommu/arm-smmu-v3: Improve add_device() error handling
iommu/arm-smmu-v3: Use WRITE_ONCE() when changing validity of an STE
iommu/arm-smmu-v3: Add second level of context descriptor table
iommu/arm-smmu-v3: Prepare for handling arm_smmu_write_ctx_desc() failure
iommu/arm-smmu-v3: Propagate ssid_bits
iommu/arm-smmu-v3: Add support for Substream IDs
iommu/arm-smmu-v3: Add context descriptor tables allocators
iommu/arm-smmu-v3: Prepare arm_smmu_s1_cfg for SSID support
ACPI/IORT: Parse SSID property of named component node
...
This commit is contained in:
@@ -49,12 +49,6 @@ DEFINE_EVENT(dma_map, map_single,
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TP_ARGS(dev, dev_addr, phys_addr, size)
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);
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DEFINE_EVENT(dma_map, map_sg,
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TP_PROTO(struct device *dev, dma_addr_t dev_addr, phys_addr_t phys_addr,
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size_t size),
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TP_ARGS(dev, dev_addr, phys_addr, size)
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);
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DEFINE_EVENT(dma_map, bounce_map_single,
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TP_PROTO(struct device *dev, dma_addr_t dev_addr, phys_addr_t phys_addr,
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size_t size),
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@@ -99,6 +93,48 @@ DEFINE_EVENT(dma_unmap, bounce_unmap_single,
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TP_ARGS(dev, dev_addr, size)
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);
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DECLARE_EVENT_CLASS(dma_map_sg,
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TP_PROTO(struct device *dev, int index, int total,
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struct scatterlist *sg),
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TP_ARGS(dev, index, total, sg),
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TP_STRUCT__entry(
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__string(dev_name, dev_name(dev))
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__field(dma_addr_t, dev_addr)
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__field(phys_addr_t, phys_addr)
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__field(size_t, size)
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__field(int, index)
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__field(int, total)
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),
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TP_fast_assign(
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__assign_str(dev_name, dev_name(dev));
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__entry->dev_addr = sg->dma_address;
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__entry->phys_addr = sg_phys(sg);
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__entry->size = sg->dma_length;
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__entry->index = index;
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__entry->total = total;
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),
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TP_printk("dev=%s [%d/%d] dev_addr=0x%llx phys_addr=0x%llx size=%zu",
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__get_str(dev_name), __entry->index, __entry->total,
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(unsigned long long)__entry->dev_addr,
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(unsigned long long)__entry->phys_addr,
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__entry->size)
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);
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DEFINE_EVENT(dma_map_sg, map_sg,
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TP_PROTO(struct device *dev, int index, int total,
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struct scatterlist *sg),
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TP_ARGS(dev, index, total, sg)
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);
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DEFINE_EVENT(dma_map_sg, bounce_map_sg,
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TP_PROTO(struct device *dev, int index, int total,
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struct scatterlist *sg),
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TP_ARGS(dev, index, total, sg)
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);
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#endif /* _TRACE_INTEL_IOMMU_H */
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/* This part must be outside protection */
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