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ARM: tegra: apalis_t30: reorder pcie properties

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Reorder PCIe properties.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
此提交包含在：
Marcel Ziswiler
2018-08-31 18:37:46 +02:00
提交者 Thierry Reding
父節點 2c87441c41
當前提交 4f6b07a278
共有 1 個檔案被更改，包括 3 行新增 和 3 行删除
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6
arch/arm/boot/dts/tegra30-apalis.dtsi
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@@ -16,13 +16,13 @@
pcie@3000 {
avdd-pexa-supply = <&vdd2_reg>;
vdd-pexa-supply = <&vdd2_reg>;
avdd-pexb-supply = <&vdd2_reg>;
vdd-pexb-supply = <&vdd2_reg>;
avdd-pex-pll-supply = <&vdd2_reg>;
avdd-plle-supply = <&ldo6_reg>;
vddio-pex-ctl-supply = <&sys_3v3_reg>;
hvdd-pex-supply = <&sys_3v3_reg>;
vddio-pex-ctl-supply = <&sys_3v3_reg>;
vdd-pexa-supply = <&vdd2_reg>;
vdd-pexb-supply = <&vdd2_reg>;
pci@1,0 {
nvidia,num-lanes = <4>;