Intel IOMMU Pass Through Support
The patch adds kernel parameter intel_iommu=pt to set up pass through mode in context mapping entry. This disables DMAR in linux kernel; but KVM still runs on VT-d and interrupt remapping still works. In this mode, kernel uses swiotlb for DMA API functions but other VT-d functionalities are enabled for KVM. KVM always uses multi level translation page table in VT-d. By default, pass though mode is disabled in kernel. This is useful when people don't want to enable VT-d DMAR in kernel but still want to use KVM and interrupt remapping for reasons like DMAR performance concern or debug purpose. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Acked-by: Weidong Han <weidong@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:

committed by
David Woodhouse

parent
0910697403
commit
4ed0d3e6c6
@@ -515,6 +515,7 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
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u32 ver;
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static int iommu_allocated = 0;
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int agaw = 0;
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int msagaw = 0;
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iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
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if (!iommu)
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@@ -535,12 +536,20 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
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agaw = iommu_calculate_agaw(iommu);
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if (agaw < 0) {
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printk(KERN_ERR
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"Cannot get a valid agaw for iommu (seq_id = %d)\n",
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"Cannot get a valid agaw for iommu (seq_id = %d)\n",
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iommu->seq_id);
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goto error;
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}
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msagaw = iommu_calculate_max_sagaw(iommu);
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if (msagaw < 0) {
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printk(KERN_ERR
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"Cannot get a valid max agaw for iommu (seq_id = %d)\n",
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iommu->seq_id);
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goto error;
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}
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#endif
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iommu->agaw = agaw;
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iommu->msagaw = msagaw;
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/* the registers might be more than one page */
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map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap),
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