drm/imx: use bus_flags for pixel clock polarity
This patch allows panels to set pixel clock and data enable pin polarity other than the default of driving data at the falling pixel clock edge and active high display enable. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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@@ -294,8 +294,10 @@ static void imx_tve_encoder_prepare(struct drm_encoder *encoder)
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switch (tve->mode) {
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case TVE_MODE_VGA:
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imx_drm_set_bus_format_pins(encoder, MEDIA_BUS_FMT_GBR888_1X24,
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tve->hsync_pin, tve->vsync_pin);
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imx_drm_set_bus_config(encoder, MEDIA_BUS_FMT_GBR888_1X24,
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tve->hsync_pin, tve->vsync_pin,
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DRM_BUS_FLAG_DE_HIGH |
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DRM_BUS_FLAG_PIXDATA_NEGEDGE);
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break;
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case TVE_MODE_TVOUT:
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imx_drm_set_bus_format(encoder, MEDIA_BUS_FMT_YUV8_1X24);
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