xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge tag 'vexpress-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt

Browse Source 
ARMv7 Vexpress DT fixes/updates for v4.10

1. Addition of CPU dmips/capacity information to TC2 platform

2. Cleanup/fix unit address warnings and removal of skeleton.dtsi from
   MPS2 device tree

* tag 'vexpress-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  ARM: dts: vexpress: add TC2 cpu capacity-dmips-mhz information
  ARM: dts: mps2: remove skeleton.dtsi include and fix unit address warnings

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
2016-10-29 11:41:28 -07:00
parent c3424e1c41 b01c399481
commit 4eb8883d0b
4 changed files with 10 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/mps2-an385.dts
View File

@@ -59,7 +59,7 @@
stdout-path = "serial0:9600n8";
};
memory {
memory@21000000 {
device_type = "memory";
reg = <0x21000000 0x1000000>;
};

2
arch/arm/boot/dts/mps2-an399.dts
View File

@@ -59,7 +59,7 @@
stdout-path = "serial0:9600n8";
};
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x1000000>;
};

4
arch/arm/boot/dts/mps2.dtsi
View File

@@ -42,10 +42,12 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "skeleton.dtsi"
#include "armv7-m.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
oscclk0: clk-osc0 {
compatible = "fixed-clock";
#clock-cells = <0>;

5
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
View File

@@ -39,6 +39,7 @@
reg = <0>;
cci-control-port = <&cci_control1>;
cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
capacity-dmips-mhz = <1024>;
};
cpu1: cpu@1 {
@@ -47,6 +48,7 @@
reg = <1>;
cci-control-port = <&cci_control1>;
cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
capacity-dmips-mhz = <1024>;
};
cpu2: cpu@2 {
@@ -55,6 +57,7 @@
reg = <0x100>;
cci-control-port = <&cci_control2>;
cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
capacity-dmips-mhz = <516>;
};
cpu3: cpu@3 {
@@ -63,6 +66,7 @@
reg = <0x101>;
cci-control-port = <&cci_control2>;
cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
capacity-dmips-mhz = <516>;
};
cpu4: cpu@4 {
@@ -71,6 +75,7 @@
reg = <0x102>;
cci-control-port = <&cci_control2>;
cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
capacity-dmips-mhz = <516>;
};
idle-states {