drm/amdgpu:changes of virtualization cases probe (v3)
1,Changes on virtualization detections 2,Don't load smu & mc firmware if using sr-iov bios 3,skip vPost for sriov & force vPost if dev pass-through v2: agd: squash in Rays's fix for the missed SI case v3: agd: squash in additional fixes for CIK, SI, cleanup Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -952,12 +952,6 @@ static void si_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
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spin_unlock_irqrestore(&adev->smc_idx_lock, flags);
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}
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static u32 si_get_virtual_caps(struct amdgpu_device *adev)
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{
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/* SI does not support SR-IOV */
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return 0;
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}
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static struct amdgpu_allowed_register_entry si_allowed_read_registers[] = {
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{GRBM_STATUS, false},
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{GB_ADDR_CONFIG, false},
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@@ -1124,16 +1118,22 @@ static int si_set_uvd_clocks(struct amdgpu_device *adev, u32 vclk, u32 dclk)
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return 0;
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}
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static void si_detect_hw_virtualization(struct amdgpu_device *adev)
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{
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if (is_virtual_machine()) /* passthrough mode */
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adev->virtualization.virtual_caps |= AMDGPU_PASSTHROUGH_MODE;
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}
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static const struct amdgpu_asic_funcs si_asic_funcs =
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{
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.read_disabled_bios = &si_read_disabled_bios,
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.detect_hw_virtualization = si_detect_hw_virtualization,
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.read_register = &si_read_register,
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.reset = &si_asic_reset,
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.set_vga_state = &si_vga_set_state,
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.get_xclk = &si_get_xclk,
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.set_uvd_clocks = &si_set_uvd_clocks,
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.set_vce_clocks = NULL,
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.get_virtual_caps = &si_get_virtual_caps,
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};
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static uint32_t si_get_rev_id(struct amdgpu_device *adev)
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