pwm: lpss: Add support for multiple PWMs
New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) device. Each PWM has 1k of register space allocated from the parent device. Add support for this. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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Thierry Reding

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4e11f5acb2
@@ -20,6 +20,7 @@ struct pwm_lpss_chip;
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struct pwm_lpss_boardinfo {
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unsigned long clk_rate;
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unsigned int npwm;
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};
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extern const struct pwm_lpss_boardinfo pwm_lpss_byt_info;
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