mtd: rawnand: Fix return value check of wait_for_completion_timeout

[ Upstream commit 084c16ab423a8890121b902b405823bfec5b4365 ]

wait_for_completion_timeout() returns unsigned long not int.
It returns 0 if timed out, and positive if completed.
The check for <= 0 is ambiguous and should be == 0 here
indicating timeout which is the only error case.

Fixes: 83738d87e3 ("mtd: sh_flctl: Add DMA capabilty")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220412083435.29254-1-linmq006@gmail.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Miaoqian Lin
2022-04-12 08:34:31 +00:00
committed by Greg Kroah-Hartman
parent 94ca69b702
commit 4da421035b

View File

@@ -384,7 +384,8 @@ static int flctl_dma_fifo0_transfer(struct sh_flctl *flctl, unsigned long *buf,
dma_addr_t dma_addr; dma_addr_t dma_addr;
dma_cookie_t cookie; dma_cookie_t cookie;
uint32_t reg; uint32_t reg;
int ret; int ret = 0;
unsigned long time_left;
if (dir == DMA_FROM_DEVICE) { if (dir == DMA_FROM_DEVICE) {
chan = flctl->chan_fifo0_rx; chan = flctl->chan_fifo0_rx;
@@ -425,13 +426,14 @@ static int flctl_dma_fifo0_transfer(struct sh_flctl *flctl, unsigned long *buf,
goto out; goto out;
} }
ret = time_left =
wait_for_completion_timeout(&flctl->dma_complete, wait_for_completion_timeout(&flctl->dma_complete,
msecs_to_jiffies(3000)); msecs_to_jiffies(3000));
if (ret <= 0) { if (time_left == 0) {
dmaengine_terminate_all(chan); dmaengine_terminate_all(chan);
dev_err(&flctl->pdev->dev, "wait_for_completion_timeout\n"); dev_err(&flctl->pdev->dev, "wait_for_completion_timeout\n");
ret = -ETIMEDOUT;
} }
out: out:
@@ -441,7 +443,7 @@ out:
dma_unmap_single(chan->device->dev, dma_addr, len, dir); dma_unmap_single(chan->device->dev, dma_addr, len, dir);
/* ret > 0 is success */ /* ret == 0 is success */
return ret; return ret;
} }
@@ -465,7 +467,7 @@ static void read_fiforeg(struct sh_flctl *flctl, int rlen, int offset)
/* initiate DMA transfer */ /* initiate DMA transfer */
if (flctl->chan_fifo0_rx && rlen >= 32 && if (flctl->chan_fifo0_rx && rlen >= 32 &&
flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_FROM_DEVICE) > 0) !flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_FROM_DEVICE))
goto convert; /* DMA success */ goto convert; /* DMA success */
/* do polling transfer */ /* do polling transfer */
@@ -524,7 +526,7 @@ static void write_ec_fiforeg(struct sh_flctl *flctl, int rlen,
/* initiate DMA transfer */ /* initiate DMA transfer */
if (flctl->chan_fifo0_tx && rlen >= 32 && if (flctl->chan_fifo0_tx && rlen >= 32 &&
flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_TO_DEVICE) > 0) !flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_TO_DEVICE))
return; /* DMA success */ return; /* DMA success */
/* do polling transfer */ /* do polling transfer */