Merge tag 'devicetree-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull Devicetree updates from Rob Herring:

 - Remove an obsolete hack for PPC32 longtrail systems

 - Make of_io_request_and_map() "name" arg optional

 - Add vendor prefixes for bitmain, Asus, and Y Soft

 - Remove 'interrupt-parent' from bindings as it is implicit

 - New properties for wm8994 audio codec

 - Add 'clocks' property support to SRAM binding

 - Add binding for ASPEED coprocessor interrupt controller

 - Various binding spelling and link fixes

* tag 'devicetree-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  Documentation: remove dynamic-resolution-notes reference to non-existent file
  dt-bindings: Add Y Soft Corporation vendor prefix
  of/fdt: Remove PPC32 longtrail hack in memory scan
  dt-bindings: remove 'interrupt-parent' from bindings
  pinctrl: tegra: fix spelling in devicetree binding document
  usb: dwc3: rockchip: Fix PHY documentation links.
  dt-bindings: sound: wm8994: document wlf,csnaddr-pd property
  dt-bindings: sound: wm8994: document wlf,spkmode-pu property
  dt-bindings: sram: Add 'clocks' as an optional property
  dt-bindings: Add vendor prefix for AsusTek Computer Inc.
  dt-bindings: misc: ASPEED coprocessor interrupt controller
  dt-bindings: gpio: pca953x: Document interrupts, update example
  drivers/of: Make of_io_request_and_map() "name" argument optional
  dt-bindings: Add bitmain vendor prefix
  Documentation: devicetree: tilcdc: fix spelling mistake "suppors" -> "supports"

Documentation/devicetree/bindings/timer/altr,timer-1.0.txt

@@ -4,7 +4,6 @@ Required properties:
 
 - compatible : should be "altr,timer-1.0"
 - reg : Specifies base physical address and size of the registers.
-- interrupt-parent: phandle of the interrupt controller
 - interrupts : Should contain the timer interrupt number
 - clock-frequency : The frequency of the clock that drives the counter, in Hz.
 

Documentation/devicetree/bindings/timer/fsl,gtm.txt

@@ -7,7 +7,6 @@ Required properties:
     "fsl,<chip>-cpm2-gtm", "fsl,cpm2-gtm", "fsl,gtm" for CPM2 GTMs
   - reg : should contain gtm registers location and length (0x40).
   - interrupts : should contain four interrupts.
-  - interrupt-parent : interrupt source phandle.
   - clock-frequency : specifies the frequency driving the timer.
 
 Example:

Documentation/devicetree/bindings/timer/marvell,orion-timer.txt

@@ -3,7 +3,6 @@ Marvell Orion SoC timer
 Required properties:
 - compatible: shall be "marvell,orion-timer"
 - reg: base address of the timer register starting with TIMERS CONTROL register
-- interrupt-parent: phandle of the bridge interrupt controller
 - interrupts: should contain the interrupts for Timer0 and Timer1
 - clocks: phandle of timer reference clock (tclk)
 

Documentation/devicetree/bindings/timer/snps,arc-timer.txt

@@ -12,10 +12,6 @@ Required properties:
 	       (16 for ARCHS cores, 3 for ARC700 cores)
 - clocks     : phandle to the source clock
 
-Optional properties:
-
-- interrupt-parent : phandle to parent intc
-
 Example:
 
 	timer0 {

Documentation/devicetree/bindings/timer/st,spear-timer.txt

@@ -5,8 +5,6 @@
 - compatible : Should be:
 	"st,spear-timer"
 - reg: Address range of the timer registers
-- interrupt-parent: Should be the phandle for the interrupt controller
-  that services interrupts for this device
 - interrupt: Should contain the timer interrupt number
 
 Example:

Documentation/devicetree/bindings/timer/ti,c64x+timer64.txt

@@ -7,7 +7,6 @@ Required properties:
 
 - compatible: must be "ti,c64x+timer64"
 - reg: base address and size of register region
-- interrupt-parent: interrupt controller
 - interrupts: interrupt id
 
 Optional properties: