Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (123 commits) perf: Remove the nmi parameter from the oprofile_perf backend x86, perf: Make copy_from_user_nmi() a library function perf: Remove perf_event_attr::type check x86, perf: P4 PMU - Fix typos in comments and style cleanup perf tools: Make test use the preset debugfs path perf tools: Add automated tests for events parsing perf tools: De-opt the parse_events function perf script: Fix display of IP address for non-callchain path perf tools: Fix endian conversion reading event attr from file header perf tools: Add missing 'node' alias to the hw_cache[] array perf probe: Support adding probes on offline kernel modules perf probe: Add probed module in front of function perf probe: Introduce debuginfo to encapsulate dwarf information perf-probe: Move dwarf library routines to dwarf-aux.{c, h} perf probe: Remove redundant dwarf functions perf probe: Move strtailcmp to string.c perf probe: Rename DIE_FIND_CB_FOUND to DIE_FIND_CB_END tracing/kprobe: Update symbol reference when loading module tracing/kprobes: Support module init function probing kprobes: Return -ENOENT if probe point doesn't exist ...
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@@ -246,6 +246,20 @@ static const cache_map_t ultra3_cache_map = {
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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},
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[C(NODE)] = {
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[C(OP_READ)] = {
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[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
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[C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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[ C(OP_WRITE) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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[ C(OP_PREFETCH) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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},
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};
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static const struct sparc_pmu ultra3_pmu = {
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@@ -361,6 +375,20 @@ static const cache_map_t niagara1_cache_map = {
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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},
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[C(NODE)] = {
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[C(OP_READ)] = {
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[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
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[C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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[ C(OP_WRITE) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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[ C(OP_PREFETCH) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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},
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};
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static const struct sparc_pmu niagara1_pmu = {
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@@ -473,6 +501,20 @@ static const cache_map_t niagara2_cache_map = {
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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},
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[C(NODE)] = {
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[C(OP_READ)] = {
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[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
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[C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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[ C(OP_WRITE) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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[ C(OP_PREFETCH) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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},
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};
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static const struct sparc_pmu niagara2_pmu = {
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@@ -1277,7 +1319,7 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self,
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if (!sparc_perf_event_set_period(event, hwc, idx))
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continue;
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if (perf_event_overflow(event, 1, &data, regs))
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if (perf_event_overflow(event, &data, regs))
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sparc_pmu_stop(event, 0);
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}
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@@ -247,7 +247,7 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
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unsigned long addr = compute_effective_address(regs, insn);
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int err;
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, 0, regs, addr);
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
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switch (dir) {
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case load:
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err = do_int_load(fetch_reg_addr(((insn>>25)&0x1f),
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@@ -338,7 +338,7 @@ asmlinkage void user_unaligned_trap(struct pt_regs *regs, unsigned int insn)
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}
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addr = compute_effective_address(regs, insn);
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, 0, regs, addr);
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
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switch(dir) {
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case load:
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err = do_int_load(fetch_reg_addr(((insn>>25)&0x1f),
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@@ -317,7 +317,7 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
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addr = compute_effective_address(regs, insn,
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((insn >> 25) & 0x1f));
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, 0, regs, addr);
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
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switch (asi) {
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case ASI_NL:
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case ASI_AIUPL:
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@@ -384,7 +384,7 @@ int handle_popc(u32 insn, struct pt_regs *regs)
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int ret, i, rd = ((insn >> 25) & 0x1f);
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int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, 0);
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
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if (insn & 0x2000) {
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maybe_flush_windows(0, 0, rd, from_kernel);
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value = sign_extend_imm13(insn);
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@@ -431,7 +431,7 @@ int handle_ldf_stq(u32 insn, struct pt_regs *regs)
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int asi = decode_asi(insn, regs);
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int flag = (freg < 32) ? FPRS_DL : FPRS_DU;
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, 0);
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
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save_and_clear_fpu();
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current_thread_info()->xfsr[0] &= ~0x1c000;
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@@ -554,7 +554,7 @@ void handle_ld_nf(u32 insn, struct pt_regs *regs)
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int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
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unsigned long *reg;
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, 0);
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
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maybe_flush_windows(0, 0, rd, from_kernel);
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reg = fetch_reg_addr(rd, regs);
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@@ -586,7 +586,7 @@ void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr
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if (tstate & TSTATE_PRIV)
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die_if_kernel("lddfmna from kernel", regs);
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, 0, regs, sfar);
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, sfar);
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if (test_thread_flag(TIF_32BIT))
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pc = (u32)pc;
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if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
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@@ -647,7 +647,7 @@ void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr
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if (tstate & TSTATE_PRIV)
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die_if_kernel("stdfmna from kernel", regs);
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, 0, regs, sfar);
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, sfar);
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if (test_thread_flag(TIF_32BIT))
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pc = (u32)pc;
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if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
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@@ -802,7 +802,7 @@ int vis_emul(struct pt_regs *regs, unsigned int insn)
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BUG_ON(regs->tstate & TSTATE_PRIV);
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, 0);
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
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if (test_thread_flag(TIF_32BIT))
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pc = (u32)pc;
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@@ -164,7 +164,7 @@ int do_mathemu(struct pt_regs *regs, struct task_struct *fpt)
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int retcode = 0; /* assume all succeed */
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unsigned long insn;
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, 0);
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
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#ifdef DEBUG_MATHEMU
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printk("In do_mathemu()... pc is %08lx\n", regs->pc);
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@@ -184,7 +184,7 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f)
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if (tstate & TSTATE_PRIV)
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die_if_kernel("unfinished/unimplemented FPop from kernel", regs);
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, 0);
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
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if (test_thread_flag(TIF_32BIT))
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pc = (u32)pc;
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if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
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@@ -251,7 +251,7 @@ asmlinkage void do_sparc_fault(struct pt_regs *regs, int text_fault, int write,
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if (in_atomic() || !mm)
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goto no_context;
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
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down_read(&mm->mmap_sem);
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@@ -301,12 +301,10 @@ good_area:
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}
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if (fault & VM_FAULT_MAJOR) {
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current->maj_flt++;
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
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regs, address);
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address);
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} else {
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current->min_flt++;
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
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regs, address);
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address);
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}
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up_read(&mm->mmap_sem);
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return;
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@@ -325,7 +325,7 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
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if (in_atomic() || !mm)
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goto intr_or_no_mm;
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
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if (!down_read_trylock(&mm->mmap_sem)) {
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if ((regs->tstate & TSTATE_PRIV) &&
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@@ -433,12 +433,10 @@ good_area:
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}
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if (fault & VM_FAULT_MAJOR) {
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current->maj_flt++;
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
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regs, address);
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address);
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} else {
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current->min_flt++;
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
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regs, address);
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address);
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}
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up_read(&mm->mmap_sem);
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