Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu: "Here is the crypto update for 5.3: API: - Test shash interface directly in testmgr - cra_driver_name is now mandatory Algorithms: - Replace arc4 crypto_cipher with library helper - Implement 5 way interleave for ECB, CBC and CTR on arm64 - Add xxhash - Add continuous self-test on noise source to drbg - Update jitter RNG Drivers: - Add support for SHA204A random number generator - Add support for 7211 in iproc-rng200 - Fix fuzz test failures in inside-secure - Fix fuzz test failures in talitos - Fix fuzz test failures in qat" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (143 commits) crypto: stm32/hash - remove interruptible condition for dma crypto: stm32/hash - Fix hmac issue more than 256 bytes crypto: stm32/crc32 - rename driver file crypto: amcc - remove memset after dma_alloc_coherent crypto: ccp - Switch to SPDX license identifiers crypto: ccp - Validate the the error value used to index error messages crypto: doc - Fix formatting of new crypto engine content crypto: doc - Add parameter documentation crypto: arm64/aes-ce - implement 5 way interleave for ECB, CBC and CTR crypto: arm64/aes-ce - add 5 way interleave routines crypto: talitos - drop icv_ool crypto: talitos - fix hash on SEC1. crypto: talitos - move struct talitos_edesc into talitos.h lib/scatterlist: Fix mapping iterator when sg->offset is greater than PAGE_SIZE crypto/NX: Set receive window credits to max number of CRBs in RxFIFO crypto: asymmetric_keys - select CRYPTO_HASH where needed crypto: serpent - mark __serpent_setkey_sbox noinline crypto: testmgr - dynamically allocate crypto_shash crypto: testmgr - dynamically allocate testvec_config crypto: talitos - eliminate unneeded 'done' functions at build time ...
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@@ -100,7 +100,7 @@ struct buffer_desc {
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u16 pkt_len;
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u16 buf_len;
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#endif
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u32 phys_addr;
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dma_addr_t phys_addr;
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u32 __reserved[4];
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struct buffer_desc *next;
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enum dma_data_direction dir;
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@@ -117,9 +117,9 @@ struct crypt_ctl {
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u8 mode; /* NPE_OP_* operation mode */
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#endif
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u8 iv[MAX_IVLEN]; /* IV for CBC mode or CTR IV for CTR mode */
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u32 icv_rev_aes; /* icv or rev aes */
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u32 src_buf;
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u32 dst_buf;
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dma_addr_t icv_rev_aes; /* icv or rev aes */
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dma_addr_t src_buf;
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dma_addr_t dst_buf;
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#ifdef __ARMEB__
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u16 auth_offs; /* Authentication start offset */
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u16 auth_len; /* Authentication data length */
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@@ -320,7 +320,8 @@ static struct crypt_ctl *get_crypt_desc_emerg(void)
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}
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}
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static void free_buf_chain(struct device *dev, struct buffer_desc *buf,u32 phys)
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static void free_buf_chain(struct device *dev, struct buffer_desc *buf,
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dma_addr_t phys)
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{
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while (buf) {
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struct buffer_desc *buf1;
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@@ -602,7 +603,7 @@ static int register_chain_var(struct crypto_tfm *tfm, u8 xpad, u32 target,
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struct buffer_desc *buf;
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int i;
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u8 *pad;
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u32 pad_phys, buf_phys;
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dma_addr_t pad_phys, buf_phys;
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BUILD_BUG_ON(NPE_CTX_LEN < HMAC_PAD_BLOCKLEN);
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pad = dma_pool_alloc(ctx_pool, GFP_KERNEL, &pad_phys);
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@@ -787,7 +788,7 @@ static struct buffer_desc *chainup_buffers(struct device *dev,
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for (; nbytes > 0; sg = sg_next(sg)) {
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unsigned len = min(nbytes, sg->length);
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struct buffer_desc *next_buf;
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u32 next_buf_phys;
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dma_addr_t next_buf_phys;
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void *ptr;
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nbytes -= len;
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