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ASoC: Intel: Skylake: Add multiple pin formats

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The module pin formats are considered homogeneous, but some
modules can have different pcm formats on different pins, like
reference signal for a module.

This patch add support for configuration of each pin of module
and allows us to specify if pins and homogeneous or heterogeneous

Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com>
Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Hardik T Shah
2015-10-27 09:22:55 +09:00
committed by Mark Brown
parent 9a03cb49c1
commit 4cd9899f0d
4 changed files with 83 additions and 45 deletions
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18
sound/soc/intel/skylake/skl-tplg-interface.h
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@@ -110,6 +110,17 @@ enum skl_dev_type {
SKL_DEVICE_NONE
};
enum module_pin_type {
/* All pins of the module takes same PCM inputs or outputs
* e.g. mixout
*/
SKL_PIN_TYPE_HOMOGENEOUS,
/* All pins of the module takes different PCM inputs or outputs
* e.g mux
*/
SKL_PIN_TYPE_HETEROGENEOUS,
};
struct skl_dfw_module_pin {
u16 module_id;
u16 instance_id;
@@ -121,6 +132,9 @@ struct skl_dfw_module_fmt {
u32 bit_depth;
u32 valid_bit_depth;
u32 ch_cfg;
u32 interleaving_style;
u32 sample_type;
u32 ch_map;
} __packed;
struct skl_dfw_module_caps {
@@ -156,8 +170,8 @@ struct skl_dfw_module {
u8 is_dynamic_in_pin;
u8 is_dynamic_out_pin;
struct skl_dfw_pipe pipe;
struct skl_dfw_module_fmt in_fmt;
struct skl_dfw_module_fmt out_fmt;
struct skl_dfw_module_fmt in_fmt[MAX_IN_QUEUE];
struct skl_dfw_module_fmt out_fmt[MAX_OUT_QUEUE];
struct skl_dfw_module_pin in_pin[MAX_IN_QUEUE];
struct skl_dfw_module_pin out_pin[MAX_OUT_QUEUE];
struct skl_dfw_module_caps caps;