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mfd: rtsx: Support RTS5249

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RTS5249 supports SD UHS-II interface.

In order to support SD UHS-II，the definitions of some internal
registers of RTS5249 have to be modified and are different from its
predecessors. So we need this patch to ensure RTS5249 can work, even
SD/MMC stack doesn't support UHS-II interface.

Signed-off-by: Wei WANG <wei_wang@realsil.com.cn>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
Wei WANG
2013-04-11 10:43:40 +08:00
committed by Samuel Ortiz
parent 95e50f6a2f
commit 4c4b8c105a
5 changed files with 284 additions and 1 deletions
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36
include/linux/mfd/rtsx_pci.h
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@@ -500,6 +500,8 @@
#define BPP_POWER_15_PERCENT_ON 0x08
#define BPP_POWER_ON 0x00
#define BPP_POWER_MASK 0x0F
#define SD_VCC_PARTIAL_POWER_ON 0x02
#define SD_VCC_POWER_ON 0x00
/* PWR_GATE_CTRL */
#define PWR_GATE_EN 0x01
@@ -689,6 +691,40 @@
#define IMAGE_FLAG_ADDR0 0xCE80
#define IMAGE_FLAG_ADDR1 0xCE81
/* Phy register */
#define PHY_PCR 0x00
#define PHY_RCR0 0x01
#define PHY_RCR1 0x02
#define PHY_RCR2 0x03
#define PHY_RTCR 0x04
#define PHY_RDR 0x05
#define PHY_TCR0 0x06
#define PHY_TCR1 0x07
#define PHY_TUNE 0x08
#define PHY_IMR 0x09
#define PHY_BPCR 0x0A
#define PHY_BIST 0x0B
#define PHY_RAW_L 0x0C
#define PHY_RAW_H 0x0D
#define PHY_RAW_DATA 0x0E
#define PHY_HOST_CLK_CTRL 0x0F
#define PHY_DMR 0x10
#define PHY_BACR 0x11
#define PHY_IER 0x12
#define PHY_BCSR 0x13
#define PHY_BPR 0x14
#define PHY_BPNR2 0x15
#define PHY_BPNR 0x16
#define PHY_BRNR2 0x17
#define PHY_BENR 0x18
#define PHY_REG_REV 0x19
#define PHY_FLD0 0x1A
#define PHY_FLD1 0x1B
#define PHY_FLD2 0x1C
#define PHY_FLD3 0x1D
#define PHY_FLD4 0x1E
#define PHY_DUM_REG 0x1F
#define rtsx_pci_init_cmd(pcr) ((pcr)->ci = 0)
struct rtsx_pcr;