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Merge tag 'mfd-next-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Browse Source 
Pull MFD updates from Lee Jones:
 "New Drivers:
   - Add support for Merrifield Basin Cove PMIC

  New Device Support:
   - Add support for Intel Tiger Lake to Intel LPSS PCI
   - Add support for Intel Sky Lake to Intel LPSS PCI
   - Add support for ST-Ericsson DB8520 to DB8500 PRCMU

  New Functionality:
   - Add RTC and PWRC support to MT6323

  Fix-ups:
   - Clean-up include files; davinci_voicecodec, asic3, sm501, mt6397
   - Ignore return values from debugfs_create*(); ab3100-*, ab8500-debugfs, aat2870-core
   - Device Tree changes; rn5t618, mt6397
   - Use new I2C API; tps80031, 88pm860x-core, ab3100-core, bcm590xx,
                      da9150-core, max14577, max77693, max77843, max8907,
                      max8925-i2c, max8997, max8998, palmas, twl-core,
   - Remove obsolete code; da9063, jz4740-adc
   - Simplify semantics; timberdale, htc-i2cpld
   - Add 'fall-through' tags; omap-usb-host, db8500-prcmu
   - Remove superfluous prints; ab8500-debugfs, db8500-prcmu, fsl-imx25-tsadc,
                                intel_soc_pmic_bxtwc, qcom_rpm, sm501
   - Trivial rename/whitespace/typo fixes; mt6397-core, MAINTAINERS
   - Reorganise code structure; mt6397-*
   - Improve code consistency; intel-lpss
   - Use MODULE_SOFTDEP() helper; intel-lpss
   - Use DEFINE_RES_*() helpers; mt6397-core

  Bug Fixes:
   - Clean-up resources; max77620
   - Prevent input events being dropped on resume; intel-lpss-pci
   - Prevent sleeping in IRQ context; ezx-pcap"

* tag 'mfd-next-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (48 commits)
  mfd: mt6323: Add MT6323 RTC and PWRC
  mfd: mt6323: Replace boilerplate resource code with DEFINE_RES_* macros
  mfd: mt6397: Add mutex include
  dt-bindings: mfd: mediatek: Add MT6323 Power Controller
  dt-bindings: mfd: mediatek: Update RTC to include MT6323
  dt-bindings: mfd: mediatek: mt6397: Change to relative paths
  mfd: db8500-prcmu: Support the higher DB8520 ARMSS
  mfd: intel-lpss: Use MODULE_SOFTDEP() instead of implicit request
  mfd: htc-i2cpld: Drop check because i2c_unregister_device() is NULL safe
  mfd: sm501: Include the GPIO driver header
  mfd: intel-lpss: Add Intel Skylake ACPI IDs
  mfd: intel-lpss: Consistently use GENMASK()
  mfd: Add support for Merrifield Basin Cove PMIC
  mfd: ezx-pcap: Replace mutex_lock with spin_lock
  mfd: asic3: Include the right header
  MAINTAINERS: altera-sysmgr: Fix typo in a filepath
  mfd: mt6397: Extract IRQ related code from core driver
  mfd: mt6397: Rename macros to something more readable
  mfd: Remove dev_err() usage after platform_get_irq()
  mfd: db8500-prcmu: Mark expected switch fall-throughs
  ...
This commit is contained in:
Linus Torvalds
2019-09-23 19:37:49 -07:00
parent d0b3cfee33 8391c6cb24
commit 4c07e2ddab
45 changed files with 742 additions and 727 deletions
Download Patch File Download Diff File Expand all files Collapse all files

60
include/linux/mfd/da9063/pdata.h
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@@ -1,60 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Platform configuration options for DA9063
*
* Copyright 2012 Dialog Semiconductor Ltd.
*
* Author: Michal Hajduk, Dialog Semiconductor
* Author: Krystian Garbaciak, Dialog Semiconductor
*/
#ifndef __MFD_DA9063_PDATA_H__
#define __MFD_DA9063_PDATA_H__
/*
* RGB LED configuration
*/
/* LED IDs for flags in struct led_info. */
enum {
DA9063_GPIO11_LED,
DA9063_GPIO14_LED,
DA9063_GPIO15_LED,
DA9063_LED_NUM
};
#define DA9063_LED_ID_MASK 0x3
/* LED polarity for flags in struct led_info. */
#define DA9063_LED_HIGH_LEVEL_ACTIVE 0x0
#define DA9063_LED_LOW_LEVEL_ACTIVE 0x4
/*
* General PMIC configuration
*/
/* HWMON ADC channels configuration */
#define DA9063_FLG_FORCE_IN0_MANUAL_MODE 0x0010
#define DA9063_FLG_FORCE_IN0_AUTO_MODE 0x0020
#define DA9063_FLG_FORCE_IN1_MANUAL_MODE 0x0040
#define DA9063_FLG_FORCE_IN1_AUTO_MODE 0x0080
#define DA9063_FLG_FORCE_IN2_MANUAL_MODE 0x0100
#define DA9063_FLG_FORCE_IN2_AUTO_MODE 0x0200
#define DA9063_FLG_FORCE_IN3_MANUAL_MODE 0x0400
#define DA9063_FLG_FORCE_IN3_AUTO_MODE 0x0800
/* Disable register caching. */
#define DA9063_FLG_NO_CACHE 0x0008
struct da9063;
/* DA9063 platform data */
struct da9063_pdata {
int (*init)(struct da9063 *da9063);
int irq_base;
bool key_power;
unsigned flags;
struct da9063_regulators_pdata *regulators_pdata;
struct led_platform_data *leds_pdata;
};
#endif /* __MFD_DA9063_PDATA_H__ */

81
include/linux/mfd/intel_soc_pmic_mrfld.h Normal file
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@@ -0,0 +1,81 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Header file for Intel Merrifield Basin Cove PMIC
*
* Copyright (C) 2019 Intel Corporation. All rights reserved.
*/
#ifndef __INTEL_SOC_PMIC_MRFLD_H__
#define __INTEL_SOC_PMIC_MRFLD_H__
#include <linux/bits.h>
#define BCOVE_ID 0x00
#define BCOVE_ID_MINREV0 GENMASK(2, 0)
#define BCOVE_ID_MAJREV0 GENMASK(5, 3)
#define BCOVE_ID_VENDID0 GENMASK(7, 6)
#define BCOVE_MINOR(x) (unsigned int)(((x) & BCOVE_ID_MINREV0) >> 0)
#define BCOVE_MAJOR(x) (unsigned int)(((x) & BCOVE_ID_MAJREV0) >> 3)
#define BCOVE_VENDOR(x) (unsigned int)(((x) & BCOVE_ID_VENDID0) >> 6)
#define BCOVE_IRQLVL1 0x01
#define BCOVE_PBIRQ 0x02
#define BCOVE_TMUIRQ 0x03
#define BCOVE_THRMIRQ 0x04
#define BCOVE_BCUIRQ 0x05
#define BCOVE_ADCIRQ 0x06
#define BCOVE_CHGRIRQ0 0x07
#define BCOVE_CHGRIRQ1 0x08
#define BCOVE_GPIOIRQ 0x09
#define BCOVE_CRITIRQ 0x0B
#define BCOVE_MIRQLVL1 0x0C
#define BCOVE_MPBIRQ 0x0D
#define BCOVE_MTMUIRQ 0x0E
#define BCOVE_MTHRMIRQ 0x0F
#define BCOVE_MBCUIRQ 0x10
#define BCOVE_MADCIRQ 0x11
#define BCOVE_MCHGRIRQ0 0x12
#define BCOVE_MCHGRIRQ1 0x13
#define BCOVE_MGPIOIRQ 0x14
#define BCOVE_MCRITIRQ 0x16
#define BCOVE_SCHGRIRQ0 0x4E
#define BCOVE_SCHGRIRQ1 0x4F
/* Level 1 IRQs */
#define BCOVE_LVL1_PWRBTN BIT(0) /* power button */
#define BCOVE_LVL1_TMU BIT(1) /* time management unit */
#define BCOVE_LVL1_THRM BIT(2) /* thermal */
#define BCOVE_LVL1_BCU BIT(3) /* burst control unit */
#define BCOVE_LVL1_ADC BIT(4) /* ADC */
#define BCOVE_LVL1_CHGR BIT(5) /* charger */
#define BCOVE_LVL1_GPIO BIT(6) /* GPIO */
#define BCOVE_LVL1_CRIT BIT(7) /* critical event */
/* Level 2 IRQs: power button */
#define BCOVE_PBIRQ_PBTN BIT(0)
#define BCOVE_PBIRQ_UBTN BIT(1)
/* Level 2 IRQs: ADC */
#define BCOVE_ADCIRQ_BATTEMP BIT(2)
#define BCOVE_ADCIRQ_SYSTEMP BIT(3)
#define BCOVE_ADCIRQ_BATTID BIT(4)
#define BCOVE_ADCIRQ_VIBATT BIT(5)
#define BCOVE_ADCIRQ_CCTICK BIT(7)
/* Level 2 IRQs: charger */
#define BCOVE_CHGRIRQ_BAT0ALRT BIT(4)
#define BCOVE_CHGRIRQ_BAT1ALRT BIT(5)
#define BCOVE_CHGRIRQ_BATCRIT BIT(6)
#define BCOVE_CHGRIRQ_VBUSDET BIT(0)
#define BCOVE_CHGRIRQ_DCDET BIT(1)
#define BCOVE_CHGRIRQ_BATTDET BIT(2)
#define BCOVE_CHGRIRQ_USBIDDET BIT(3)
#endif /* __INTEL_SOC_PMIC_MRFLD_H__ */

11
include/linux/mfd/mt6397/core.h
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@@ -7,6 +7,14 @@
#ifndef __MFD_MT6397_CORE_H__
#define __MFD_MT6397_CORE_H__
#include <linux/mutex.h>
enum chip_id {
MT6323_CHIP_ID = 0x23,
MT6391_CHIP_ID = 0x91,
MT6397_CHIP_ID = 0x97,
};
enum mt6397_irq_numbers {
MT6397_IRQ_SPKL_AB = 0,
MT6397_IRQ_SPKR_AB,
@@ -54,6 +62,9 @@ struct mt6397_chip {
u16 irq_masks_cache[2];
u16 int_con[2];
u16 int_status[2];
u16 chip_id;
};
int mt6397_irq_init(struct mt6397_chip *chip);
#endif /* __MFD_MT6397_CORE_H__ */

12
include/linux/platform_data/cros_ec_commands.h
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@@ -5513,6 +5513,18 @@ struct ec_params_fp_seed {
uint8_t seed[FP_CONTEXT_TPM_BYTES];
} __ec_align4;
#define EC_CMD_FP_ENC_STATUS 0x0409
/* FP TPM seed has been set or not */
#define FP_ENC_STATUS_SEED_SET BIT(0)
struct ec_response_fp_encryption_status {
/* Used bits in encryption engine status */
uint32_t valid_flags;
/* Encryption engine status */
uint32_t status;
} __ec_align4;
/*****************************************************************************/
/* Touchpad MCU commands: range 0x0500-0x05FF */