enic: workaround A0 erratum
A0 revision ASIC has an erratum on the RQ desc cache on chip where the cache can become corrupted causing pkt buf writes to wrong locations. The s/w workaround is to post a dummy RQ desc in the ring every 32 descs, causing a flush of the cache. A0 parts are not production, but there are enough of these parts in the wild in test setups to warrant including workaround. A1 revision ASIC parts fix erratum. Signed-off-by: Scott Feldman <scofeldm@cisco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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committed by
David S. Miller

parent
27e6c7d338
commit
4badc385d1
@@ -41,6 +41,12 @@ static inline void writeq(u64 val, void __iomem *reg)
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}
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#endif
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enum vnic_dev_hw_version {
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VNIC_DEV_HW_VER_UNKNOWN,
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VNIC_DEV_HW_VER_A1,
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VNIC_DEV_HW_VER_A2,
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};
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enum vnic_dev_intr_mode {
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VNIC_DEV_INTR_MODE_UNKNOWN,
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VNIC_DEV_INTR_MODE_INTX,
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@@ -88,6 +94,8 @@ int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
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u64 *a0, u64 *a1, int wait);
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int vnic_dev_fw_info(struct vnic_dev *vdev,
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struct vnic_devcmd_fw_info **fw_info);
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int vnic_dev_hw_version(struct vnic_dev *vdev,
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enum vnic_dev_hw_version *hw_ver);
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int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
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void *value);
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int vnic_dev_stats_clear(struct vnic_dev *vdev);
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