amd-xgbe: Update how to determine DMA channel status
Tx and Rx DMA channel status determiniation is different depending on the version of the hardware. Update the channel status processing code to account for the change. Also, reduce the timeout value used when stopping the channels. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller

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@@ -159,7 +159,7 @@
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#define XGBE_MAX_DMA_CHANNELS 16
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#define XGBE_MAX_QUEUES 16
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#define XGBE_PRIORITY_QUEUES 8
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#define XGBE_DMA_STOP_TIMEOUT 5
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#define XGBE_DMA_STOP_TIMEOUT 1
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/* DMA cache settings - Outer sharable, write-back, write-allocate */
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#define XGBE_DMA_OS_AXDOMAIN 0x2
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