ath9k: fix rx flush handling
Right now the rx flush is not doing anything useful on AR9003+, as it only works if the buffers in the rx FIFO have not been purged yet, as is done by ath_stoprecv. To fix this, always call ath_flushrecv from within ath_stoprecv before the FIFO is emptied, but still after the hw receive path has been stopped. This ensures that frames received (and ACKed by the hardware) shortly before a reset will be seen by the software, which should improve A-MPDU session stability. Cc: stable@vger.kernel.org Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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committed by
John W. Linville

parent
7fc00a3054
commit
4b883f021b
@@ -472,6 +472,13 @@ start_recv:
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return 0;
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}
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static void ath_flushrecv(struct ath_softc *sc)
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{
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if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
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ath_rx_tasklet(sc, 1, true);
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ath_rx_tasklet(sc, 1, false);
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}
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bool ath_stoprecv(struct ath_softc *sc)
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{
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struct ath_hw *ah = sc->sc_ah;
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@@ -482,6 +489,8 @@ bool ath_stoprecv(struct ath_softc *sc)
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ath9k_hw_setrxfilter(ah, 0);
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stopped = ath9k_hw_stopdmarecv(ah, &reset);
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ath_flushrecv(sc);
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if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
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ath_edma_stop_recv(sc);
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else
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@@ -498,13 +507,6 @@ bool ath_stoprecv(struct ath_softc *sc)
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return stopped && !reset;
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}
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void ath_flushrecv(struct ath_softc *sc)
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{
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if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
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ath_rx_tasklet(sc, 1, true);
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ath_rx_tasklet(sc, 1, false);
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}
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static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
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{
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/* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
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