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net/mlx5: Add FEC fields to Port Phy Link Mode (PPLM) reg

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Added FEC related fields to PPLM layout.
These fields are needed to set and query FEC policy
for different link speeds.

Signed-off-by: Shay Agroskin <shayag@mellanox.com>
Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
This commit is contained in:
Shay Agroskin
2018-10-09 14:16:43 +03:00
committed by Saeed Mahameed
parent 2a4c429802
commit 4b5b9c7d97
2 changed files with 29 additions and 11 deletions
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1
include/linux/mlx5/driver.h
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@@ -133,6 +133,7 @@ enum {
MLX5_REG_PVLC = 0x500f,
MLX5_REG_PCMR = 0x5041,
MLX5_REG_PMLP = 0x5002,
MLX5_REG_PPLM = 0x5023,
MLX5_REG_PCAM = 0x507f,
MLX5_REG_NODE_DESC = 0x6001,
MLX5_REG_HOST_ENDIANNESS = 0x7004,