clk: imx7d: Add PXP clock
The PXP has a single CCGR clock gate, gating both the IPG_CLK_ROOT and the MAIN_AXI_CLK_ROOT. Add a single clock to cover both. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Shawn Guo

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@@ -451,5 +451,6 @@
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#define IMX7D_SNVS_CLK 442
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#define IMX7D_CAAM_CLK 443
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#define IMX7D_KPP_ROOT_CLK 444
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#define IMX7D_CLK_END 445
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#define IMX7D_PXP_CLK 445
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#define IMX7D_CLK_END 446
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#endif /* __DT_BINDINGS_CLOCK_IMX7D_H */
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