Merge branch 'v3-removal' into for-linus
Conflicts: arch/arm/boot/compressed/head.S
This commit is contained in:
@@ -556,10 +556,6 @@ call_fpe:
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#endif
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tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27
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tstne r0, #0x04000000 @ bit 26 set on both ARM and Thumb-2
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#if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710)
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and r8, r0, #0x0f000000 @ mask out op-code bits
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teqne r8, #0x0f000000 @ SWI (ARM6/7 bug)?
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#endif
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moveq pc, lr
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get_thread_info r10 @ get current thread
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and r8, r0, #0x00000f00 @ mask out CP number
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@@ -335,20 +335,6 @@ ENDPROC(ftrace_stub)
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*-----------------------------------------------------------------------------
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*/
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/* If we're optimising for StrongARM the resulting code won't
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run on an ARM7 and we can save a couple of instructions.
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--pb */
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#ifdef CONFIG_CPU_ARM710
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#define A710(code...) code
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.Larm710bug:
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ldmia sp, {r0 - lr}^ @ Get calling r0 - lr
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mov r0, r0
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add sp, sp, #S_FRAME_SIZE
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subs pc, lr, #4
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#else
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#define A710(code...)
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#endif
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.align 5
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ENTRY(vector_swi)
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sub sp, sp, #S_FRAME_SIZE
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@@ -379,9 +365,6 @@ ENTRY(vector_swi)
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ldreq r10, [lr, #-4] @ get SWI instruction
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#else
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ldr r10, [lr, #-4] @ get SWI instruction
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A710( and ip, r10, #0x0f000000 @ check for SWI )
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A710( teq ip, #0x0f000000 )
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A710( bne .Larm710bug )
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#endif
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#ifdef CONFIG_CPU_ENDIAN_BE8
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rev r10, r10 @ little endian instruction
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@@ -392,26 +375,15 @@ ENTRY(vector_swi)
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/*
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* Pure EABI user space always put syscall number into scno (r7).
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*/
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A710( ldr ip, [lr, #-4] @ get SWI instruction )
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A710( and ip, ip, #0x0f000000 @ check for SWI )
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A710( teq ip, #0x0f000000 )
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A710( bne .Larm710bug )
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#elif defined(CONFIG_ARM_THUMB)
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/* Legacy ABI only, possibly thumb mode. */
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tst r8, #PSR_T_BIT @ this is SPSR from save_user_regs
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addne scno, r7, #__NR_SYSCALL_BASE @ put OS number in
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ldreq scno, [lr, #-4]
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#else
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/* Legacy ABI only. */
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ldr scno, [lr, #-4] @ get SWI instruction
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A710( and ip, scno, #0x0f000000 @ check for SWI )
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A710( teq ip, #0x0f000000 )
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A710( bne .Larm710bug )
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#endif
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#ifdef CONFIG_ALIGNMENT_TRAP
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