Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann: "Driver updates for ARM SoCs, these contain various things that touch the drivers/ directory but got merged through arm-soc for practical reasons. For the most part, this is now related to power management controllers, which have not yet been abstracted into a separate subsystem, and typically require some code in drivers/soc or arch/arm to control the power domains. Another large chunk here is a rework of the NVIDIA Tegra USB3.0 support, which was surprisingly tricky and took a long time to get done. Finally, reset controller handling as always gets merged through here as well" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits) arm-ccn: Enable building as module soc/tegra: pmc: Add generic PM domain support usb: xhci: tegra: Add Tegra210 support usb: xhci: Add NVIDIA Tegra XUSB controller driver dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding PCI: tegra: Support per-lane PHYs dt-bindings: pci: tegra: Update for per-lane PHYs phy: tegra: Add Tegra210 support phy: Add Tegra XUSB pad controller support dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding phy: core: Allow children node to be overridden clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs drivers: firmware: psci: make two helper functions inline soc: renesas: rcar-sysc: Add support for R-Car H3 power areas soc: renesas: rcar-sysc: Add support for R-Car E2 power areas soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas soc: renesas: rcar-sysc: Add support for R-Car H2 power areas ...
This commit is contained in:
@@ -4,11 +4,6 @@ config ARCH_SHMOBILE
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config ARCH_SHMOBILE_MULTI
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bool
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config PM_RCAR
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bool
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select PM
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select PM_GENERIC_DOMAINS
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config PM_RMOBILE
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bool
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select PM
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@@ -16,13 +11,15 @@ config PM_RMOBILE
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config ARCH_RCAR_GEN1
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bool
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select PM_RCAR
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select PM
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select PM_GENERIC_DOMAINS
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select RENESAS_INTC_IRQPIN
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select SYS_SUPPORTS_SH_TMU
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config ARCH_RCAR_GEN2
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bool
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select PM_RCAR
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select PM
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select PM_GENERIC_DOMAINS
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select RENESAS_IRQC
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select SYS_SUPPORTS_SH_CMT
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select PCI_DOMAINS if PCI
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@@ -38,7 +38,6 @@ smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o
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# PM objects
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obj-$(CONFIG_SUSPEND) += suspend.o
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obj-$(CONFIG_PM_RCAR) += pm-rcar.o
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obj-$(CONFIG_PM_RMOBILE) += pm-rmobile.o
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obj-$(CONFIG_ARCH_RCAR_GEN2) += pm-rcar-gen2.o
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@@ -9,9 +9,10 @@
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* for more details.
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*/
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#include <linux/soc/renesas/rcar-sysc.h>
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#include <asm/io.h>
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#include "pm-rcar.h"
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#include "r8a7779.h"
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/* SYSC */
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@@ -13,9 +13,9 @@
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/smp.h>
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#include <linux/soc/renesas/rcar-sysc.h>
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#include <asm/io.h>
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#include "common.h"
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#include "pm-rcar.h"
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#include "rcar-gen2.h"
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/* RST */
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@@ -1,164 +0,0 @@
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/*
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* R-Car SYSC Power management support
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*
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* Copyright (C) 2014 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/mm.h>
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include "pm-rcar.h"
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/* SYSC Common */
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#define SYSCSR 0x00 /* SYSC Status Register */
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#define SYSCISR 0x04 /* Interrupt Status Register */
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#define SYSCISCR 0x08 /* Interrupt Status Clear Register */
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#define SYSCIER 0x0c /* Interrupt Enable Register */
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#define SYSCIMR 0x10 /* Interrupt Mask Register */
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/* SYSC Status Register */
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#define SYSCSR_PONENB 1 /* Ready for power resume requests */
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#define SYSCSR_POFFENB 0 /* Ready for power shutoff requests */
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/*
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* Power Control Register Offsets inside the register block for each domain
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* Note: The "CR" registers for ARM cores exist on H1 only
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* Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2
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*/
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#define PWRSR_OFFS 0x00 /* Power Status Register */
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#define PWROFFCR_OFFS 0x04 /* Power Shutoff Control Register */
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#define PWROFFSR_OFFS 0x08 /* Power Shutoff Status Register */
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#define PWRONCR_OFFS 0x0c /* Power Resume Control Register */
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#define PWRONSR_OFFS 0x10 /* Power Resume Status Register */
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#define PWRER_OFFS 0x14 /* Power Shutoff/Resume Error */
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#define SYSCSR_RETRIES 100
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#define SYSCSR_DELAY_US 1
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#define PWRER_RETRIES 100
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#define PWRER_DELAY_US 1
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#define SYSCISR_RETRIES 1000
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#define SYSCISR_DELAY_US 1
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static void __iomem *rcar_sysc_base;
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static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
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static int rcar_sysc_pwr_on_off(const struct rcar_sysc_ch *sysc_ch, bool on)
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{
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unsigned int sr_bit, reg_offs;
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int k;
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if (on) {
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sr_bit = SYSCSR_PONENB;
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reg_offs = PWRONCR_OFFS;
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} else {
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sr_bit = SYSCSR_POFFENB;
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reg_offs = PWROFFCR_OFFS;
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}
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/* Wait until SYSC is ready to accept a power request */
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for (k = 0; k < SYSCSR_RETRIES; k++) {
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if (ioread32(rcar_sysc_base + SYSCSR) & BIT(sr_bit))
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break;
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udelay(SYSCSR_DELAY_US);
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}
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if (k == SYSCSR_RETRIES)
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return -EAGAIN;
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/* Submit power shutoff or power resume request */
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iowrite32(BIT(sysc_ch->chan_bit),
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rcar_sysc_base + sysc_ch->chan_offs + reg_offs);
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return 0;
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}
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static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on)
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{
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unsigned int isr_mask = BIT(sysc_ch->isr_bit);
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unsigned int chan_mask = BIT(sysc_ch->chan_bit);
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unsigned int status;
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unsigned long flags;
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int ret = 0;
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int k;
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spin_lock_irqsave(&rcar_sysc_lock, flags);
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iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
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/* Submit power shutoff or resume request until it was accepted */
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for (k = 0; k < PWRER_RETRIES; k++) {
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ret = rcar_sysc_pwr_on_off(sysc_ch, on);
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if (ret)
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goto out;
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status = ioread32(rcar_sysc_base +
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sysc_ch->chan_offs + PWRER_OFFS);
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if (!(status & chan_mask))
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break;
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udelay(PWRER_DELAY_US);
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}
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if (k == PWRER_RETRIES) {
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ret = -EIO;
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goto out;
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}
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/* Wait until the power shutoff or resume request has completed * */
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for (k = 0; k < SYSCISR_RETRIES; k++) {
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if (ioread32(rcar_sysc_base + SYSCISR) & isr_mask)
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break;
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udelay(SYSCISR_DELAY_US);
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}
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if (k == SYSCISR_RETRIES)
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ret = -EIO;
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iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
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out:
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spin_unlock_irqrestore(&rcar_sysc_lock, flags);
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pr_debug("sysc power domain %d: %08x -> %d\n",
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sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret);
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return ret;
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}
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int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch)
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{
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return rcar_sysc_power(sysc_ch, false);
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}
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int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch)
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{
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return rcar_sysc_power(sysc_ch, true);
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}
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bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch)
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{
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unsigned int st;
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st = ioread32(rcar_sysc_base + sysc_ch->chan_offs + PWRSR_OFFS);
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if (st & BIT(sysc_ch->chan_bit))
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return true;
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return false;
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}
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void __iomem *rcar_sysc_init(phys_addr_t base)
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{
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rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);
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if (!rcar_sysc_base)
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panic("unable to ioremap R-Car SYSC hardware block\n");
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return rcar_sysc_base;
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}
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@@ -1,15 +0,0 @@
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#ifndef PM_RCAR_H
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#define PM_RCAR_H
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struct rcar_sysc_ch {
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u16 chan_offs;
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u8 chan_bit;
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u8 isr_bit;
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};
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int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch);
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int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch);
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bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch);
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void __iomem *rcar_sysc_init(phys_addr_t base);
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#endif /* PM_RCAR_H */
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@@ -19,13 +19,13 @@
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/soc/renesas/rcar-sysc.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_scu.h>
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#include "common.h"
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#include "pm-rcar.h"
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#include "r8a7779.h"
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#define AVECR IOMEM(0xfe700040)
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@@ -17,12 +17,12 @@
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <linux/soc/renesas/rcar-sysc.h>
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#include <asm/smp_plat.h>
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#include "common.h"
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#include "platsmp-apmu.h"
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#include "pm-rcar.h"
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#include "rcar-gen2.h"
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#include "r8a7790.h"
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