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soc: qcom: Migrate SCM calls in msm_tz_smmu

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Adding APIs to change smmu pagetable format, and to prepare atos id.
Migrating SCM calls in msm_tz_smmu to use the new APIs.

Change-Id: I3aed64cd524e94cfa6d6ea168031eda62fd14fb0
Signed-off-by: Siddharth Gupta <sidgup@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
This commit is contained in:
Siddharth Gupta
2019-09-30 15:50:28 -07:00
committed by Elliot Berman
parent df1491d155
commit 49ec350a86
4 changed files with 69 additions and 0 deletions
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44
drivers/firmware/qcom_scm-smc.c
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@@ -1137,6 +1137,28 @@ int __qcom_scm_kgsl_set_smmu_aperture(struct device *dev,
return ret; return ret;
} }
int __qcom_scm_smmu_prepare_atos_id(struct device *dev, u64 dev_id, int cb_num,
int operation)
{
int ret;
struct qcom_scm_desc desc = {
.svc = QCOM_SCM_SVC_MP,
.cmd = QCOM_SCM_MP_SMMU_PREPARE_ATOS_ID,
.owner = ARM_SMCCC_OWNER_SIP
};
desc.args[0] = dev_id;
desc.args[1] = cb_num;
desc.args[2] = operation;
desc.arginfo = QCOM_SCM_ARGS(3, QCOM_SCM_VAL, QCOM_SCM_VAL,
QCOM_SCM_VAL);
ret = qcom_scm_call(dev, &desc);
return ret;
}
int __qcom_scm_hdcp_req(struct device *dev, struct qcom_scm_hdcp_req *req, int __qcom_scm_hdcp_req(struct device *dev, struct qcom_scm_hdcp_req *req,
u32 req_cnt, u32 *resp) u32 req_cnt, u32 *resp)
{ {
@@ -1168,6 +1190,28 @@ int __qcom_scm_hdcp_req(struct device *dev, struct qcom_scm_hdcp_req *req,
return ret; return ret;
} }
int __qcom_scm_smmu_change_pgtbl_format(struct device *dev, u64 dev_id,
int cbndx)
{
int ret;
struct qcom_scm_desc desc = {
.svc = QCOM_SCM_SVC_SMMU_PROGRAM,
.cmd = QCOM_SCM_SMMU_CHANGE_PGTBL_FORMAT,
.owner = ARM_SMCCC_OWNER_SIP
};
desc.args[0] = dev_id;
desc.args[1] = cbndx;
desc.args[2] = 1; /* Enable */
desc.arginfo = QCOM_SCM_ARGS(3, QCOM_SCM_VAL, QCOM_SCM_VAL,
QCOM_SCM_VAL);
ret = qcom_scm_call(dev, &desc);
return ret;
}
int __qcom_scm_qsmmu500_wait_safe_toggle(struct device *dev, bool en) int __qcom_scm_qsmmu500_wait_safe_toggle(struct device *dev, bool en)
{ {
struct qcom_scm_desc desc = { struct qcom_scm_desc desc = {

13
drivers/firmware/qcom_scm.c
View File

@@ -504,6 +504,13 @@ int qcom_scm_kgsl_set_smmu_aperture(unsigned int num_context_bank)
} }
EXPORT_SYMBOL(qcom_scm_kgsl_set_smmu_aperture); EXPORT_SYMBOL(qcom_scm_kgsl_set_smmu_aperture);
int qcom_scm_smmu_prepare_atos_id(u64 dev_id, int cb_num, int operation)
{
return __qcom_scm_smmu_prepare_atos_id(__scm->dev, dev_id, cb_num,
operation);
}
EXPORT_SYMBOL(qcom_scm_smmu_prepare_atos_id);
/** /**
* qcom_scm_hdcp_available() - Check if secure environment supports HDCP. * qcom_scm_hdcp_available() - Check if secure environment supports HDCP.
* *
@@ -546,6 +553,12 @@ int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp)
} }
EXPORT_SYMBOL(qcom_scm_hdcp_req); EXPORT_SYMBOL(qcom_scm_hdcp_req);
int qcom_scm_smmu_change_pgtbl_format(u64 dev_id, int cbndx)
{
return __qcom_scm_smmu_change_pgtbl_format(__scm->dev, dev_id, cbndx);
}
EXPORT_SYMBOL(qcom_scm_smmu_change_pgtbl_format);
int qcom_scm_qsmmu500_wait_safe_toggle(bool en) int qcom_scm_qsmmu500_wait_safe_toggle(bool en)
{ {
return __qcom_scm_qsmmu500_wait_safe_toggle(__scm->dev, en); return __qcom_scm_qsmmu500_wait_safe_toggle(__scm->dev, en);

6
drivers/firmware/qcom_scm.h
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@@ -70,6 +70,7 @@ extern void __qcom_scm_mmu_sync(struct device *dev, bool sync);
#define QCOM_SCM_MP_IOMMU_SECURE_UNMAP2_FLAT 0x13 #define QCOM_SCM_MP_IOMMU_SECURE_UNMAP2_FLAT 0x13
#define QCOM_SCM_MP_ASSIGN 0x16 #define QCOM_SCM_MP_ASSIGN 0x16
#define QCOM_SCM_MP_CP_SMMU_APERTURE_ID 0x1b #define QCOM_SCM_MP_CP_SMMU_APERTURE_ID 0x1b
#define QCOM_SCM_MP_SMMU_PREPARE_ATOS_ID 0x21
extern int __qcom_scm_restore_sec_cfg(struct device *dev, u32 device_id, extern int __qcom_scm_restore_sec_cfg(struct device *dev, u32 device_id,
u32 spare); u32 spare);
extern int __qcom_scm_iommu_secure_ptbl_size(struct device *dev, u32 spare, extern int __qcom_scm_iommu_secure_ptbl_size(struct device *dev, u32 spare,
@@ -95,6 +96,8 @@ extern int __qcom_scm_assign_mem(struct device *dev,
phys_addr_t dest, size_t dest_sz); phys_addr_t dest, size_t dest_sz);
extern int __qcom_scm_kgsl_set_smmu_aperture(struct device *dev, extern int __qcom_scm_kgsl_set_smmu_aperture(struct device *dev,
unsigned int num_context_bank); unsigned int num_context_bank);
extern int __qcom_scm_smmu_prepare_atos_id(struct device *dev, u64 dev_id,
int cb_num, int operation);
#define QCOM_SCM_IOMMU_TLBINVAL_FLAG 0x00000001 #define QCOM_SCM_IOMMU_TLBINVAL_FLAG 0x00000001
#define QCOM_SCM_CP_APERTURE_REG 0x0 #define QCOM_SCM_CP_APERTURE_REG 0x0
@@ -104,7 +107,10 @@ extern int __qcom_scm_hdcp_req(struct device *dev,
struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp); struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp);
#define QCOM_SCM_SVC_SMMU_PROGRAM 0x15 #define QCOM_SCM_SVC_SMMU_PROGRAM 0x15
#define QCOM_SCM_SMMU_CHANGE_PGTBL_FORMAT 0x01
#define QCOM_SCM_SMMU_CONFIG_ERRATA1 0x3 #define QCOM_SCM_SMMU_CONFIG_ERRATA1 0x3
extern int __qcom_scm_smmu_change_pgtbl_format(struct device *dev, u64 dev_id,
int cbndx);
extern int __qcom_scm_qsmmu500_wait_safe_toggle(struct device *dev, extern int __qcom_scm_qsmmu500_wait_safe_toggle(struct device *dev,
bool enable); bool enable);
#define QCOM_SCM_SMMU_CONFIG_ERRATA1_CLIENT_ALL 0x2 #define QCOM_SCM_SMMU_CONFIG_ERRATA1_CLIENT_ALL 0x2

6
include/linux/qcom_scm.h
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@@ -71,9 +71,11 @@ extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
extern bool qcom_scm_kgsl_set_smmu_aperture_available(void); extern bool qcom_scm_kgsl_set_smmu_aperture_available(void);
extern int qcom_scm_kgsl_set_smmu_aperture( extern int qcom_scm_kgsl_set_smmu_aperture(
unsigned int num_context_bank); unsigned int num_context_bank);
extern int qcom_scm_smmu_prepare_atos_id(u64 dev_id, int cb_num, int operation);
extern bool qcom_scm_hdcp_available(void); extern bool qcom_scm_hdcp_available(void);
extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
u32 *resp); u32 *resp);
extern int qcom_scm_smmu_change_pgtbl_format(u64 dev_id, int cbndx);
extern int qcom_scm_qsmmu500_wait_safe_toggle(bool en); extern int qcom_scm_qsmmu500_wait_safe_toggle(bool en);
extern int qcom_scm_ice_restore_cfg(void); extern int qcom_scm_ice_restore_cfg(void);
extern bool qcom_scm_is_available(void); extern bool qcom_scm_is_available(void);
@@ -132,9 +134,13 @@ static inline bool qcom_scm_kgsl_set_smmu_aperture_available(void)
{ return false; } { return false; }
static inline int qcom_scm_kgsl_set_smmu_aperture( static inline int qcom_scm_kgsl_set_smmu_aperture(
unsigned int num_context_bank) { return -ENODEV; } unsigned int num_context_bank) { return -ENODEV; }
static inline int qcom_scm_smmu_prepare_atos_id(u64 dev_id, int cb_num,
int operation) { return -ENODEV; }
static inline bool qcom_scm_hdcp_available(void) { return false; } static inline bool qcom_scm_hdcp_available(void) { return false; }
static inline int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, static inline int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
u32 *resp) { return -ENODEV; } u32 *resp) { return -ENODEV; }
static inline int qcom_scm_smmu_change_pgtbl_format(u64 dev_id, int cbndx)
{ return -ENODEV; }
static inline int qcom_scm_qsmmu500_wait_safe_toggle(bool en) static inline int qcom_scm_qsmmu500_wait_safe_toggle(bool en)
{ return -ENODEV; } { return -ENODEV; }
static inline int qcom_scm_ice_restore_cfg(void) { return -ENODEV; } static inline int qcom_scm_ice_restore_cfg(void) { return -ENODEV; }