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rt2x00: rework RT chipset and revision determination for PCI an SOC devices.

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The recent rt2800 devices are no longer really identified by their PCI
ID's, but rather by the contents of their CSR0 register. Also for the
other chipsets is the contents of this CSR0 register important.
Change the chipset determination logic to be more aligned with the rt2800
model.
Preparation for the support of rt3070 / rt3090 based devices.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
Acked-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Gertjan van Wingerde
2010-02-13 20:55:49 +01:00
committed by John W. Linville
parent 714fa66363
commit 49e721ec6c
14 changed files with 112 additions and 118 deletions
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14
drivers/net/wireless/rt2x00/rt2800.h
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@@ -60,11 +60,11 @@
/*
* Chipset version.
*/
#define RT2860C_VERSION 0x28600100
#define RT2860D_VERSION 0x28600101
#define RT2880E_VERSION 0x28720200
#define RT2883_VERSION 0x28830300
#define RT3070_VERSION 0x30700200
#define RT2860C_VERSION 0x0100
#define RT2860D_VERSION 0x0101
#define RT2880E_VERSION 0x0200
#define RT2883_VERSION 0x0300
#define RT3070_VERSION 0x0200
/*
* Signal information.
@@ -408,8 +408,8 @@
* ASIC_VER: 2860 or 2870
*/
#define MAC_CSR0 0x1000
#define MAC_CSR0_ASIC_REV FIELD32(0x0000ffff)
#define MAC_CSR0_ASIC_VER FIELD32(0xffff0000)
#define MAC_CSR0_REVISION FIELD32(0x0000ffff)
#define MAC_CSR0_CHIPSET FIELD32(0xffff0000)
/*
* MAC_SYS_CTRL: