Merge branch 'pci/host-probe-refactor'
- Use pci_host_bridge.windows list directly instead of splicing in a temporary list for cadence, mvebu, host-common (Rob Herring) - Use pci_host_probe() instead of open-coding all the pieces for altera, brcmstb, iproc, mobiveil, rcar, rockchip, tegra, v3, versatile, xgene, xilinx, xilinx-nwl (Rob Herring) - Convert to devm_platform_ioremap_resource_byname() instead of open-coding platform_get_resource_byname() and devm_ioremap_resource() for altera, cadence, mediatek, rockchip, tegra, xgene (Dejin Zheng) - Convert to devm_platform_ioremap_resource() instead of open-coding platform_get_resource() and devm_ioremap_resource() for aardvark, brcmstb, exynos, ftpci100, versatile (Dejin Zheng) - Remove redundant error messages from devm_pci_remap_cfg_resource() callers (Dejin Zheng) - Drop useless PCI_ENABLE_PROC_DOMAINS from versatile driver (Rob Herring) - Default host bridge parent device to the platform device (Rob Herring) - Drop unnecessary zeroing of host bridge fields (Rob Herring) - Use pci_is_root_bus() instead of tracking root bus number separately in aardvark, designware (imx6, keystone, designware-host), mobiveil, xilinx-nwl, xilinx, rockchip, rcar (Rob Herring) - Set host bridge bus number in pci_scan_root_bus_bridge() instead of each driver for aardvark, designware-host, host-common, mediatek, rcar, tegra, v3-semi (Rob Herring) - Use bridge resources instead of parsing DT 'ranges' again for cadence (Rob Herring) - Remove private bus number and range from cadence (Rob Herring) - Use devm_pci_alloc_host_bridge() to simplify rcar (Rob Herring) - Use struct pci_host_bridge.windows list directly rather than a temporary (Rob Herring) - Reduce OF "missing non-prefetchable window" from error to warning message (Rob Herring) - Convert rcar-gen2 from old Arm-specific pci_common_init_dev() to new arch-independent interfaces (Rob Herring) - Move DT resource setup into devm_pci_alloc_host_bridge() (Rob Herring) - Set bridge map_irq and swizzle_irq to default functions; drivers that don't support legacy IRQs (iproc) need to undo this (Rob Herring) * pci/host-probe-refactor: PCI: Set bridge map_irq and swizzle_irq to default functions PCI: Move DT resource setup into devm_pci_alloc_host_bridge() PCI: rcar-gen2: Convert to use modern host bridge probe functions PCI: of: Reduce missing non-prefetchable memory region to a warning PCI: rcar: Use struct pci_host_bridge.windows list directly PCI: rcar: Use devm_pci_alloc_host_bridge() PCI: cadence: Remove private bus number and range storage PCI: cadence: Use bridge resources for outbound window setup PCI: Move setting pci_host_bridge.busnr out of host drivers PCI: rcar: Use pci_is_root_bus() to check if bus is root bus PCI: rockchip: Use pci_is_root_bus() to check if bus is root bus PCI: xilinx: Use pci_is_root_bus() to check if bus is root bus PCI: xilinx-nwl: Use pci_is_root_bus() to check if bus is root bus PCI: mobiveil: Use pci_is_root_bus() to check if bus is root bus PCI: designware: Use pci_is_root_bus() to check if bus is root bus PCI: aardvark: Use pci_is_root_bus() to check if bus is root bus PCI: Drop unnecessary zeroing of bridge fields PCI: Set default bridge parent device PCI: versatile: Drop flag PCI_ENABLE_PROC_DOMAINS PCI: controller: Remove duplicate error message PCI: controller: Convert to devm_platform_ioremap_resource() PCI: controller: Convert to devm_platform_ioremap_resource_byname() PCI: xilinx: Use pci_host_probe() to register host PCI: xilinx-nwl: Use pci_host_probe() to register host PCI: rockchip: Use pci_host_probe() to register host PCI: rcar: Use pci_host_probe() to register host PCI: iproc: Use pci_host_probe() to register host PCI: altera: Use pci_host_probe() to register host PCI: xgene: Use pci_host_probe() to register host PCI: versatile: Use pci_host_probe() to register host PCI: v3: Use pci_host_probe() to register host PCI: tegra: Use pci_host_probe() to register host PCI: mobiveil: Use pci_host_probe() to register host PCI: brcmstb: Use pci_host_probe() to register host PCI: host-common: Use struct pci_host_bridge.windows list directly PCI: mvebu: Use struct pci_host_bridge.windows list directly PCI: cadence: Use struct pci_host_bridge.windows list directly # Conflicts: # drivers/pci/controller/cadence/pcie-cadence-host.c
This commit is contained in:
@@ -84,14 +84,12 @@ static int exynos5440_pcie_get_mem_resources(struct platform_device *pdev,
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{
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struct dw_pcie *pci = ep->pci;
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struct device *dev = pci->dev;
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struct resource *res;
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ep->mem_res = devm_kzalloc(dev, sizeof(*ep->mem_res), GFP_KERNEL);
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if (!ep->mem_res)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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ep->mem_res->elbi_base = devm_ioremap_resource(dev, res);
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ep->mem_res->elbi_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(ep->mem_res->elbi_base))
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return PTR_ERR(ep->mem_res->elbi_base);
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@@ -1269,7 +1269,7 @@ static void imx6_pcie_quirk(struct pci_dev *dev)
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if (bus->dev.parent->parent->driver != &imx6_pcie_driver.driver)
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return;
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if (bus->number == pp->root_bus_nr) {
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if (pci_is_root_bus(bus)) {
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struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
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struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
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@@ -440,7 +440,7 @@ static int ks_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,
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reg = CFG_BUS(bus->number) | CFG_DEVICE(PCI_SLOT(devfn)) |
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CFG_FUNC(PCI_FUNC(devfn));
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if (bus->parent->number != pp->root_bus_nr)
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if (!pci_is_root_bus(bus->parent))
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reg |= CFG_TYPE1;
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ks_pcie_app_writel(ks_pcie, CFG_SETUP, reg);
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@@ -457,7 +457,7 @@ static int ks_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus,
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reg = CFG_BUS(bus->number) | CFG_DEVICE(PCI_SLOT(devfn)) |
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CFG_FUNC(PCI_FUNC(devfn));
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if (bus->parent->number != pp->root_bus_nr)
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if (!pci_is_root_bus(bus->parent))
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reg |= CFG_TYPE1;
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ks_pcie_app_writel(ks_pcie, CFG_SETUP, reg);
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@@ -67,13 +67,8 @@ static int al_pcie_init(struct pci_config_window *cfg)
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dev_dbg(dev, "Root port dbi res: %pR\n", res);
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al_pcie->dbi_base = devm_pci_remap_cfg_resource(dev, res);
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if (IS_ERR(al_pcie->dbi_base)) {
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long err = PTR_ERR(al_pcie->dbi_base);
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dev_err(dev, "couldn't remap dbi base %pR (err:%ld)\n",
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res, err);
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return err;
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}
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if (IS_ERR(al_pcie->dbi_base))
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return PTR_ERR(al_pcie->dbi_base);
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cfg->priv = al_pcie;
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@@ -408,10 +403,8 @@ static int al_pcie_probe(struct platform_device *pdev)
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dbi_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
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pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_res);
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if (IS_ERR(pci->dbi_base)) {
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dev_err(dev, "couldn't remap dbi base %pR\n", dbi_res);
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if (IS_ERR(pci->dbi_base))
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return PTR_ERR(pci->dbi_base);
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}
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ecam_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "config");
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if (!ecam_res) {
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@@ -317,7 +317,6 @@ static int armada8k_pcie_probe(struct platform_device *pdev)
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base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
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pci->dbi_base = devm_pci_remap_cfg_resource(dev, base);
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if (IS_ERR(pci->dbi_base)) {
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dev_err(dev, "couldn't remap regs base %p\n", base);
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ret = PTR_ERR(pci->dbi_base);
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goto fail_clkreg;
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}
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@@ -346,11 +346,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
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if (!bridge)
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return -ENOMEM;
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ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
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&bridge->dma_ranges, NULL);
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if (ret)
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return ret;
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/* Get the I/O and memory ranges from DT */
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resource_list_for_each_entry(win, &bridge->windows) {
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switch (resource_type(win->res)) {
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@@ -473,14 +468,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
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goto err_free_msi;
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}
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pp->root_bus_nr = pp->busn->start;
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bridge->dev.parent = dev;
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bridge->sysdata = pp;
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bridge->busnr = pp->root_bus_nr;
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bridge->ops = &dw_pcie_ops;
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bridge->map_irq = of_irq_parse_and_map_pci;
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bridge->swizzle_irq = pci_common_swizzle;
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ret = pci_scan_root_bus_bridge(bridge);
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if (ret)
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@@ -529,7 +518,7 @@ static int dw_pcie_access_other_conf(struct pcie_port *pp, struct pci_bus *bus,
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busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) |
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PCIE_ATU_FUNC(PCI_FUNC(devfn));
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if (bus->parent->number == pp->root_bus_nr) {
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if (pci_is_root_bus(bus->parent)) {
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type = PCIE_ATU_TYPE_CFG0;
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cpu_addr = pp->cfg0_base;
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cfg_size = pp->cfg0_size;
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@@ -585,13 +574,11 @@ static int dw_pcie_valid_device(struct pcie_port *pp, struct pci_bus *bus,
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struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
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/* If there is no link, then there is no device */
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if (bus->number != pp->root_bus_nr) {
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if (!pci_is_root_bus(bus)) {
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if (!dw_pcie_link_up(pci))
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return 0;
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}
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/* Access only one slot on each root port */
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if (bus->number == pp->root_bus_nr && dev > 0)
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} else if (dev > 0)
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/* Access only one slot on each root port */
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return 0;
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return 1;
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@@ -607,7 +594,7 @@ static int dw_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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if (bus->number == pp->root_bus_nr)
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if (pci_is_root_bus(bus))
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return dw_pcie_rd_own_conf(pp, where, size, val);
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return dw_pcie_rd_other_conf(pp, bus, devfn, where, size, val);
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@@ -621,7 +608,7 @@ static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
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if (!dw_pcie_valid_device(pp, bus, PCI_SLOT(devfn)))
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (bus->number == pp->root_bus_nr)
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if (pci_is_root_bus(bus))
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return dw_pcie_wr_own_conf(pp, where, size, val);
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return dw_pcie_wr_other_conf(pp, bus, devfn, where, size, val);
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@@ -173,7 +173,6 @@ struct dw_pcie_host_ops {
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};
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struct pcie_port {
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u8 root_bus_nr;
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u64 cfg0_base;
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void __iomem *va_cfg0_base;
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u32 cfg0_size;
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@@ -273,7 +273,6 @@ static int spear13xx_pcie_probe(struct platform_device *pdev)
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dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
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pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base);
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if (IS_ERR(pci->dbi_base)) {
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dev_err(dev, "couldn't remap dbi base %p\n", dbi_base);
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ret = PTR_ERR(pci->dbi_base);
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goto fail_clk;
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}
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