rsi: chip reset for SDIO interface
We need to reset the chip in teardown path so that it can work next time when driver is loaded. This patch adds support for this reset configuration for SDIO. Signed-off-by: Karun Eagalapati <karun256@gmail.com> Signed-off-by: Amitkumar Karwar <amit.karwar@redpinesignals.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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@@ -58,6 +58,7 @@ enum sdio_interrupt_type {
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#define SDIO_READ_START_LVL 0x000FC
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#define SDIO_READ_FIFO_CTL 0x000FD
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#define SDIO_WRITE_FIFO_CTL 0x000FE
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#define SDIO_WAKEUP_REG 0x000FF
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#define SDIO_FUN1_INTR_CLR_REG 0x0008
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#define SDIO_REG_HIGH_SPEED 0x0013
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