ARM: OMAP2+: powerdomain/PRM: move the low-level powerdomain functions into PRM
Move the low-level SoC-specific powerdomain control functions into prm*.c. For example, OMAP2xxx low-level powerdomain functions go into prm2xxx.c. Then remove the unnecessary powerdomain*xxx*.c files. The objective is to centralize low-level PRM register accesses into the prm*.[ch] files, and then to export an OMAP SoC-independent API to higher-level OMAP power management code. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tento commit je obsažen v:
Paul Walmsley
@@ -22,6 +22,7 @@
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#include <plat/common.h>
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#include "common.h"
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#include "powerdomain.h"
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#include "prm33xx.h"
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#include "prm-regbits-33xx.h"
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@@ -133,3 +134,204 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
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return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
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}
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static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
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{
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am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK,
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(pwrst << OMAP_POWERSTATE_SHIFT),
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pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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return 0;
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}
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static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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v &= OMAP_POWERSTATE_MASK;
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v >>= OMAP_POWERSTATE_SHIFT;
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return v;
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}
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static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
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v &= OMAP_POWERSTATEST_MASK;
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v >>= OMAP_POWERSTATEST_SHIFT;
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return v;
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}
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static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
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v &= AM33XX_LASTPOWERSTATEENTERED_MASK;
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v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT;
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return v;
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}
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static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
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{
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am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK,
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(1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT),
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pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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return 0;
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}
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static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
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{
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am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK,
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AM33XX_LASTPOWERSTATEENTERED_MASK,
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pwrdm->prcm_offs, pwrdm->pwrstst_offs);
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return 0;
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}
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static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
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{
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u32 m;
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m = pwrdm->logicretstate_mask;
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if (!m)
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return -EINVAL;
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am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
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pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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return 0;
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}
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static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
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v &= AM33XX_LOGICSTATEST_MASK;
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v >>= AM33XX_LOGICSTATEST_SHIFT;
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return v;
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}
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static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
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{
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u32 v, m;
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m = pwrdm->logicretstate_mask;
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if (!m)
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return -EINVAL;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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v &= m;
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v >>= __ffs(m);
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return v;
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}
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static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
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u8 pwrst)
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{
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u32 m;
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m = pwrdm->mem_on_mask[bank];
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if (!m)
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return -EINVAL;
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am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
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pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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return 0;
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}
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static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
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u8 pwrst)
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{
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u32 m;
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m = pwrdm->mem_ret_mask[bank];
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if (!m)
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return -EINVAL;
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am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
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pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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return 0;
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}
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static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
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{
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u32 m, v;
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m = pwrdm->mem_pwrst_mask[bank];
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if (!m)
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return -EINVAL;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
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v &= m;
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v >>= __ffs(m);
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return v;
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}
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static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
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{
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u32 m, v;
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m = pwrdm->mem_retst_mask[bank];
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if (!m)
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return -EINVAL;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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v &= m;
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v >>= __ffs(m);
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return v;
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}
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static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm)
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{
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u32 c = 0;
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/*
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* REVISIT: pwrdm_wait_transition() may be better implemented
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* via a callback and a periodic timer check -- how long do we expect
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* powerdomain transitions to take?
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*/
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/* XXX Is this udelay() value meaningful? */
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while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs)
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& OMAP_INTRANSITION_MASK) &&
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(c++ < PWRDM_TRANSITION_BAILOUT))
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udelay(1);
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if (c > PWRDM_TRANSITION_BAILOUT) {
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pr_err("powerdomain: %s: waited too long to complete transition\n",
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pwrdm->name);
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return -EAGAIN;
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}
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pr_debug("powerdomain: completed transition in %d loops\n", c);
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return 0;
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}
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struct pwrdm_ops am33xx_pwrdm_operations = {
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.pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst,
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.pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst,
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.pwrdm_read_pwrst = am33xx_pwrdm_read_pwrst,
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.pwrdm_read_prev_pwrst = am33xx_pwrdm_read_prev_pwrst,
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.pwrdm_set_logic_retst = am33xx_pwrdm_set_logic_retst,
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.pwrdm_read_logic_pwrst = am33xx_pwrdm_read_logic_pwrst,
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.pwrdm_read_logic_retst = am33xx_pwrdm_read_logic_retst,
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.pwrdm_clear_all_prev_pwrst = am33xx_pwrdm_clear_all_prev_pwrst,
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.pwrdm_set_lowpwrstchange = am33xx_pwrdm_set_lowpwrstchange,
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.pwrdm_read_mem_pwrst = am33xx_pwrdm_read_mem_pwrst,
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.pwrdm_read_mem_retst = am33xx_pwrdm_read_mem_retst,
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.pwrdm_set_mem_onst = am33xx_pwrdm_set_mem_onst,
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.pwrdm_set_mem_retst = am33xx_pwrdm_set_mem_retst,
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.pwrdm_wait_transition = am33xx_pwrdm_wait_transition,
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};
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