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usb: cdns3: Fix uvc fail when DMA cross 4k boundery since sg enabled

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[ Upstream commit 40c304109e866a7dc123661a5c8ca72f6b5e14e0 ]

Supposed DMA cross 4k bounder problem should be fixed at DEV_VER_V2, but
still met problem when do ISO transfer if sg enabled.

Data pattern likes below when sg enabled, package size is 1k and mult is 2
	[UVC Header(8B) ] [data(3k - 8)] ...

The received data at offset 0xd000 will get 0xc000 data, len 0x70. Error
happen position as below pattern:
	0xd000: wrong
	0xe000: wrong
	0xf000: correct
	0x10000: wrong
	0x11000: wrong
	0x12000: correct
	...

To avoid DMA cross 4k bounder at ISO transfer, reduce burst len according
to start DMA address's alignment.

Cc:  <stable@vger.kernel.org>
Fixes: 7733f6c32e ("usb: cdns3: Add Cadence USB3 DRD Driver")
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20231224153816.1664687-4-Frank.Li@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Frank Li
2023-12-24 10:38:15 -05:00
committed by Greg Kroah-Hartman
parent bf70321419
commit 490eaca842
1 changed files with 31 additions and 1 deletions
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32
drivers/usb/cdns3/gadget.c
View File

@@ -1119,6 +1119,7 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
u32 togle_pcs = 1; u32 togle_pcs = 1;
int sg_iter = 0; int sg_iter = 0;
int num_trb_req; int num_trb_req;
int trb_burst;
int num_trb; int num_trb;
int address; int address;
u32 control; u32 control;
@@ -1241,7 +1242,36 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
total_tdl += DIV_ROUND_UP(length, total_tdl += DIV_ROUND_UP(length,
priv_ep->endpoint.maxpacket); priv_ep->endpoint.maxpacket);
trb->length |= cpu_to_le32(TRB_BURST_LEN(priv_ep->trb_burst_size) | trb_burst = priv_ep->trb_burst_size;
/*
* Supposed DMA cross 4k bounder problem should be fixed at DEV_VER_V2, but still
* met problem when do ISO transfer if sg enabled.
*
* Data pattern likes below when sg enabled, package size is 1k and mult is 2
* [UVC Header(8B) ] [data(3k - 8)] ...
*
* The received data at offset 0xd000 will get 0xc000 data, len 0x70. Error happen
* as below pattern:
* 0xd000: wrong
* 0xe000: wrong
* 0xf000: correct
* 0x10000: wrong
* 0x11000: wrong
* 0x12000: correct
* ...
*
* But it is still unclear about why error have not happen below 0xd000, it should
* cross 4k bounder. But anyway, the below code can fix this problem.
*
* To avoid DMA cross 4k bounder at ISO transfer, reduce burst len according to 16.
*/
if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && priv_dev->dev_ver <= DEV_VER_V2)
if (ALIGN_DOWN(trb->buffer, SZ_4K) !=
ALIGN_DOWN(trb->buffer + length, SZ_4K))
trb_burst = 16;
trb->length |= cpu_to_le32(TRB_BURST_LEN(trb_burst) |
TRB_LEN(length)); TRB_LEN(length));
pcs = priv_ep->pcs ? TRB_CYCLE : 0; pcs = priv_ep->pcs ? TRB_CYCLE : 0;