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net: axienet: Cleanup DMA device reset and halt process

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The Xilinx DMA blocks each have their own reset register, but they both
reset the entire DMA engine, so only one of them needs to be reset.

Also, when stopping the device, we need to not just command the DMA
blocks to stop, but wait for them to stop, and trigger a device reset
to ensure that they are completely stopped.

Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Robert Hancock
2019-06-06 16:28:12 -06:00
committed by David S. Miller
parent 7789e9ed05
commit 489d4d7713
2 changed files with 42 additions and 14 deletions
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2
drivers/net/ethernet/xilinx/xilinx_axienet.h
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@@ -83,6 +83,8 @@
#define XAXIDMA_CR_RUNSTOP_MASK 0x00000001 /* Start/stop DMA channel */
#define XAXIDMA_CR_RESET_MASK 0x00000004 /* Reset DMA engine */
#define XAXIDMA_SR_HALT_MASK 0x00000001 /* Indicates DMA channel halted */
#define XAXIDMA_BD_NDESC_OFFSET 0x00 /* Next descriptor pointer */
#define XAXIDMA_BD_BUFA_OFFSET 0x08 /* Buffer address */
#define XAXIDMA_BD_CTRL_LEN_OFFSET 0x18 /* Control/buffer length */