ARM: dts: dra7: Fix NAND device nodes
Add compatible id, GPMC register resource and interrupt resource to NAND controller nodes. The GPMC node will provide an interrupt controller for the NAND IRQs. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@@ -741,9 +741,13 @@
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&nand_flash_x16>;
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ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
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ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* device IO registers */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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ti,nand-ecc-opt = "bch8";
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ti,elm-id = <&elm>;
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nand-bus-width = <16>;
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