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Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next

Browse Source 
Pull networking updates from David Miller:

 1) Support 6Ghz band in ath11k driver, from Rajkumar Manoharan.

 2) Support UDP segmentation in code TSO code, from Eric Dumazet.

 3) Allow flashing different flash images in cxgb4 driver, from Vishal
    Kulkarni.

 4) Add drop frames counter and flow status to tc flower offloading,
    from Po Liu.

 5) Support n-tuple filters in cxgb4, from Vishal Kulkarni.

 6) Various new indirect call avoidance, from Eric Dumazet and Brian
    Vazquez.

 7) Fix BPF verifier failures on 32-bit pointer arithmetic, from
    Yonghong Song.

 8) Support querying and setting hardware address of a port function via
    devlink, use this in mlx5, from Parav Pandit.

 9) Support hw ipsec offload on bonding slaves, from Jarod Wilson.

10) Switch qca8k driver over to phylink, from Jonathan McDowell.

11) In bpftool, show list of processes holding BPF FD references to
    maps, programs, links, and btf objects. From Andrii Nakryiko.

12) Several conversions over to generic power management, from Vaibhav
    Gupta.

13) Add support for SO_KEEPALIVE et al. to bpf_setsockopt(), from Dmitry
    Yakunin.

14) Various https url conversions, from Alexander A. Klimov.

15) Timestamping and PHC support for mscc PHY driver, from Antoine
    Tenart.

16) Support bpf iterating over tcp and udp sockets, from Yonghong Song.

17) Support 5GBASE-T i40e NICs, from Aleksandr Loktionov.

18) Add kTLS RX HW offload support to mlx5e, from Tariq Toukan.

19) Fix the ->ndo_start_xmit() return type to be netdev_tx_t in several
    drivers. From Luc Van Oostenryck.

20) XDP support for xen-netfront, from Denis Kirjanov.

21) Support receive buffer autotuning in MPTCP, from Florian Westphal.

22) Support EF100 chip in sfc driver, from Edward Cree.

23) Add XDP support to mvpp2 driver, from Matteo Croce.

24) Support MPTCP in sock_diag, from Paolo Abeni.

25) Commonize UDP tunnel offloading code by creating udp_tunnel_nic
    infrastructure, from Jakub Kicinski.

26) Several pci_ --> dma_ API conversions, from Christophe JAILLET.

27) Add FLOW_ACTION_POLICE support to mlxsw, from Ido Schimmel.

28) Add SK_LOOKUP bpf program type, from Jakub Sitnicki.

29) Refactor a lot of networking socket option handling code in order to
    avoid set_fs() calls, from Christoph Hellwig.

30) Add rfc4884 support to icmp code, from Willem de Bruijn.

31) Support TBF offload in dpaa2-eth driver, from Ioana Ciornei.

32) Support XDP_REDIRECT in qede driver, from Alexander Lobakin.

33) Support PCI relaxed ordering in mlx5 driver, from Aya Levin.

34) Support TCP syncookies in MPTCP, from Flowian Westphal.

35) Fix several tricky cases of PMTU handling wrt. briding, from Stefano
    Brivio.

* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (2056 commits)
  net: thunderx: initialize VF's mailbox mutex before first usage
  usb: hso: remove bogus check for EINPROGRESS
  usb: hso: no complaint about kmalloc failure
  hso: fix bailout in error case of probe
  ip_tunnel_core: Fix build for archs without _HAVE_ARCH_IPV6_CSUM
  selftests/net: relax cpu affinity requirement in msg_zerocopy test
  mptcp: be careful on subflow creation
  selftests: rtnetlink: make kci_test_encap() return sub-test result
  selftests: rtnetlink: correct the final return value for the test
  net: dsa: sja1105: use detected device id instead of DT one on mismatch
  tipc: set ub->ifindex for local ipv6 address
  ipv6: add ipv6_dev_find()
  net: openvswitch: silence suspicious RCU usage warning
  Revert "vxlan: fix tos value before xmit"
  ptp: only allow phase values lower than 1 period
  farsync: switch from 'pci_' to 'dma_' API
  wan: wanxl: switch from 'pci_' to 'dma_' API
  hv_netvsc: do not use VF device if link is down
  dpaa2-eth: Fix passing zero to 'PTR_ERR' warning
  net: macb: Properly handle phylink on at91sam9x
  ...
This commit is contained in:
Linus Torvalds
2020-08-05 20:13:21 -07:00
parent 8186749621 c1055b76ad
commit 47ec5303d7
2088 changed files with 117472 additions and 40981 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
View File

@@ -10,7 +10,7 @@ such as network interfaces, crypto accelerator instances, L2 switches,
etc.
For an overview of the DPAA2 architecture and fsl-mc bus see:
Documentation/networking/device_drivers/freescale/dpaa2/overview.rst
Documentation/networking/device_drivers/ethernet/freescale/dpaa2/overview.rst
As described in the above overview, all DPAA2 objects in a DPRC share the
same hardware "isolation context" and a 10-bit value called an ICID

3
Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml
View File

@@ -22,6 +22,7 @@ select:
- amlogic,meson8m2-dwmac
- amlogic,meson-gxbb-dwmac
- amlogic,meson-axg-dwmac
- amlogic,meson-g12a-dwmac
required:
- compatible
@@ -36,6 +37,7 @@ allOf:
- amlogic,meson8m2-dwmac
- amlogic,meson-gxbb-dwmac
- amlogic,meson-axg-dwmac
- amlogic,meson-g12a-dwmac
then:
properties:
@@ -95,6 +97,7 @@ properties:
- amlogic,meson8m2-dwmac
- amlogic,meson-gxbb-dwmac
- amlogic,meson-axg-dwmac
- amlogic,meson-g12a-dwmac
contains:
enum:
- snps,dwmac-3.70a

255
Documentation/devicetree/bindings/net/dsa/dsa.txt
View File

@@ -1,257 +1,4 @@
Distributed Switch Architecture Device Tree Bindings
----------------------------------------------------
Switches are true Linux devices and can be probed by any means. Once
probed, they register to the DSA framework, passing a node
pointer. This node is expected to fulfil the following binding, and
may contain additional properties as required by the device it is
embedded within.
Required properties:
- ports : A container for child nodes representing switch ports.
Optional properties:
- dsa,member : A two element list indicates which DSA cluster, and position
within the cluster a switch takes. <0 0> is cluster 0,
switch 0. <0 1> is cluster 0, switch 1. <1 0> is cluster 1,
switch 0. A switch not part of any cluster (single device
hanging off a CPU port) must not specify this property
The ports container has the following properties
Required properties:
- #address-cells : Must be 1
- #size-cells : Must be 0
Each port children node must have the following mandatory properties:
- reg : Describes the port address in the switch
An uplink/downlink port between switches in the cluster has the following
mandatory property:
- link : Should be a list of phandles to other switch's DSA
port. This port is used as the outgoing port
towards the phandle ports. The full routing
information must be given, not just the one hop
routes to neighbouring switches.
A CPU port has the following mandatory property:
- ethernet : Should be a phandle to a valid Ethernet device node.
This host device is what the switch port is
connected to.
A user port has the following optional property:
- label : Describes the label associated with this port, which
will become the netdev name.
Port child nodes may also contain the following optional standardised
properties, described in binding documents:
- phy-handle : Phandle to a PHY on an MDIO bus. See
Documentation/devicetree/bindings/net/ethernet.txt
for details.
- phy-mode : See
Documentation/devicetree/bindings/net/ethernet.txt
for details.
- fixed-link : Fixed-link subnode describing a link to a non-MDIO
managed entity. See
Documentation/devicetree/bindings/net/fixed-link.txt
for details.
The MAC address will be determined using the optional properties
defined in ethernet.txt.
Example
The following example shows three switches on three MDIO busses,
linked into one DSA cluster.
&mdio1 {
#address-cells = <1>;
#size-cells = <0>;
switch0: switch0@0 {
compatible = "marvell,mv88e6085";
reg = <0>;
dsa,member = <0 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan0";
};
port@1 {
reg = <1>;
label = "lan1";
local-mac-address = [00 00 00 00 00 00];
};
port@2 {
reg = <2>;
label = "lan2";
};
switch0port5: port@5 {
reg = <5>;
phy-mode = "rgmii-txid";
link = <&switch1port6
&switch2port9>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@6 {
reg = <6>;
ethernet = <&fec1>;
fixed-link {
speed = <100>;
full-duplex;
};
};
};
};
};
&mdio2 {
#address-cells = <1>;
#size-cells = <0>;
switch1: switch1@0 {
compatible = "marvell,mv88e6085";
reg = <0>;
dsa,member = <0 1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan3";
phy-handle = <&switch1phy0>;
};
port@1 {
reg = <1>;
label = "lan4";
phy-handle = <&switch1phy1>;
};
port@2 {
reg = <2>;
label = "lan5";
phy-handle = <&switch1phy2>;
};
switch1port5: port@5 {
reg = <5>;
link = <&switch2port9>;
phy-mode = "rgmii-txid";
fixed-link {
speed = <1000>;
full-duplex;
};
};
switch1port6: port@6 {
reg = <6>;
phy-mode = "rgmii-txid";
link = <&switch0port5>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch1phy0: switch1phy0@0 {
reg = <0>;
};
switch1phy1: switch1phy0@1 {
reg = <1>;
};
switch1phy2: switch1phy0@2 {
reg = <2>;
};
};
};
};
&mdio4 {
#address-cells = <1>;
#size-cells = <0>;
switch2: switch2@0 {
compatible = "marvell,mv88e6085";
reg = <0>;
dsa,member = <0 2>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan6";
};
port@1 {
reg = <1>;
label = "lan7";
};
port@2 {
reg = <2>;
label = "lan8";
};
port@3 {
reg = <3>;
label = "optical3";
fixed-link {
speed = <1000>;
full-duplex;
link-gpios = <&gpio6 2
GPIO_ACTIVE_HIGH>;
};
};
port@4 {
reg = <4>;
label = "optical4";
fixed-link {
speed = <1000>;
full-duplex;
link-gpios = <&gpio6 3
GPIO_ACTIVE_HIGH>;
};
};
switch2port9: port@9 {
reg = <9>;
phy-mode = "rgmii-txid";
link = <&switch1port5
&switch0port5>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
See Documentation/devicetree/bindings/net/dsa/dsa.yaml for the documenation.

92
Documentation/devicetree/bindings/net/dsa/dsa.yaml Normal file
View File

@@ -0,0 +1,92 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/dsa/dsa.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ethernet Switch Device Tree Bindings
maintainers:
- Andrew Lunn <andrew@lunn.ch>
- Florian Fainelli <f.fainelli@gmail.com>
- Vivien Didelot <vivien.didelot@gmail.com>
description:
This binding represents Ethernet Switches which have a dedicated CPU
port. That port is usually connected to an Ethernet Controller of the
SoC. Such setups are typical for embedded devices.
select: false
properties:
$nodename:
pattern: "^switch(@.*)?$"
dsa,member:
minItems: 2
maxItems: 2
description:
A two element list indicates which DSA cluster, and position within the
cluster a switch takes. <0 0> is cluster 0, switch 0. <0 1> is cluster 0,
switch 1. <1 0> is cluster 1, switch 0. A switch not part of any cluster
(single device hanging off a CPU port) must not specify this property
$ref: /schemas/types.yaml#/definitions/uint32-array
patternProperties:
"^(ethernet-)?ports$":
type: object
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
patternProperties:
"^(ethernet-)?port@[0-9]+$":
type: object
description: Ethernet switch ports
properties:
reg:
description: Port number
label:
description:
Describes the label associated with this port, which will become
the netdev name
$ref: /schemas/types.yaml#definitions/string
link:
description:
Should be a list of phandles to other switch's DSA port. This
port is used as the outgoing port towards the phandle ports. The
full routing information must be given, not just the one hop
routes to neighbouring switches
$ref: /schemas/types.yaml#definitions/phandle-array
ethernet:
description:
Should be a phandle to a valid Ethernet device node. This host
device is what the switch port is connected to
$ref: /schemas/types.yaml#definitions/phandle
phy-handle: true
phy-mode: true
fixed-link: true
mac-address: true
required:
- reg
additionalProperties: false
oneOf:
- required:
- ports
- required:
- ethernet-ports
...

105
Documentation/devicetree/bindings/net/dsa/ocelot.txt
View File

@@ -4,10 +4,15 @@ Microchip Ocelot switch driver family
Felix
-----
The VSC9959 core is currently the only switch supported by the driver, and is
found in the NXP LS1028A. It is a PCI device, part of the larger ENETC root
complex. As a result, the ethernet-switch node is a sub-node of the PCIe root
complex node and its "reg" property conforms to the parent node bindings:
Currently the switches supported by the felix driver are:
- VSC9959 (Felix)
- VSC9953 (Seville)
The VSC9959 switch is found in the NXP LS1028A. It is a PCI device, part of the
larger ENETC root complex. As a result, the ethernet-switch node is a sub-node
of the PCIe root complex node and its "reg" property conforms to the parent
node bindings:
* reg: Specifies PCIe Device Number and Function Number of the endpoint device,
in this case for the Ethernet L2Switch it is PF5 (of device 0, bus 0).
@@ -114,3 +119,95 @@ Example:
};
};
};
The VSC9953 switch is found inside NXP T1040. It is a platform device with the
following required properties:
- compatible:
Must be "mscc,vsc9953-switch".
Supported PHY interface types (appropriate SerDes protocol setting changes are
needed in the RCW binary):
* phy_mode = "internal": on ports 8 and 9
* phy_mode = "sgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7
* phy_mode = "qsgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7
Example:
&soc {
ethernet-switch@800000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "mscc,vsc9953-switch";
little-endian;
reg = <0x800000 0x290000>;
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
port@0 {
reg = <0x0>;
label = "swp0";
};
port@1 {
reg = <0x1>;
label = "swp1";
};
port@2 {
reg = <0x2>;
label = "swp2";
};
port@3 {
reg = <0x3>;
label = "swp3";
};
port@4 {
reg = <0x4>;
label = "swp4";
};
port@5 {
reg = <0x5>;
label = "swp5";
};
port@6 {
reg = <0x6>;
label = "swp6";
};
port@7 {
reg = <0x7>;
label = "swp7";
};
port@8 {
reg = <0x8>;
phy-mode = "internal";
ethernet = <&enet0>;
fixed-link {
speed = <2500>;
full-duplex;
};
};
port@9 {
reg = <0x9>;
phy-mode = "internal";
status = "disabled";
fixed-link {
speed = <2500>;
full-duplex;
};
};
};
};
};

12
Documentation/devicetree/bindings/net/ethernet-phy.yaml
View File

@@ -162,6 +162,18 @@ properties:
description:
Specifies a reference to a node representing a SFP cage.
rx-internal-delay-ps:
description: |
RGMII Receive PHY Clock Delay defined in pico seconds. This is used for
PHY's that have configurable RX internal delays. If this property is
present then the PHY applies the RX delay.
tx-internal-delay-ps:
description: |
RGMII Transmit PHY Clock Delay defined in pico seconds. This is used for
PHY's that have configurable TX internal delays. If this property is
present then the PHY applies the TX delay.
required:
- reg

7
Documentation/devicetree/bindings/net/mdio.yaml
View File

@@ -39,6 +39,13 @@ properties:
and must therefore be appropriately determined based on all devices
requirements (maximum value of all per-device RESET pulse widths).
reset-post-delay-us:
description:
Delay after reset deassert in microseconds. It applies to all MDIO
devices and it's determined by how fast all devices are ready for
communication. This delay happens just before e.g. Ethernet PHY
type ID auto detection.
clock-frequency:
description:
Desired MDIO bus clock frequency in Hz. Values greater than IEEE 802.3

3
Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt
View File

@@ -31,6 +31,8 @@ Optional properties:
VSC8531_LINK_100_ACTIVITY (2),
VSC8531_LINK_ACTIVITY (0) and
VSC8531_DUPLEX_COLLISION (8).
- load-save-gpios : GPIO used for the load/save operation of the PTP
hardware clock (PHC).
Table: 1 - Edge rate change
@@ -67,4 +69,5 @@ Example:
vsc8531,edge-slowdown = <7>;
vsc8531,led-0-mode = <LINK_1000_ACTIVITY>;
vsc8531,led-1-mode = <LINK_100_ACTIVITY>;
load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
};

2
Documentation/devicetree/bindings/net/realtek-bluetooth.yaml
View File

@@ -44,7 +44,7 @@ examples:
uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
uart-has-rtscts = <1>;
uart-has-rtscts;
bluetooth {
compatible = "realtek,rtl8723bs-bt";

2
Documentation/devicetree/bindings/net/ti,dp83867.yaml
View File

@@ -24,7 +24,7 @@ description: |
IEEE 802.3 Standard Media Independent Interface (MII), the IEEE 802.3 Gigabit
Media Independent Interface (GMII) or Reduced GMII (RGMII).
Specifications about the charger can be found at:
Specifications about the Ethernet PHY can be found at:
https://www.ti.com/lit/gpn/dp83867ir
properties:

18
Documentation/devicetree/bindings/net/ti,dp83869.yaml
View File

@@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: TI DP83869 ethernet PHY
allOf:
- $ref: "ethernet-controller.yaml#"
- $ref: "ethernet-phy.yaml#"
maintainers:
- Dan Murphy <dmurphy@ti.com>
@@ -24,7 +24,7 @@ description: |
conversions. The DP83869HM can also support Bridge Conversion from RGMII to
SGMII and SGMII to RGMII.
Specifications about the charger can be found at:
Specifications about the Ethernet PHY can be found at:
http://www.ti.com/lit/ds/symlink/dp83869hm.pdf
properties:
@@ -64,6 +64,18 @@ properties:
Operational mode for the PHY. If this is not set then the operational
mode is set by the straps. see dt-bindings/net/ti-dp83869.h for values
rx-internal-delay-ps:
description: Delay is in pico seconds
enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000,
3250, 3500, 3750, 4000 ]
default: 2000
tx-internal-delay-ps:
description: Delay is in pico seconds
enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000,
3250, 3500, 3750, 4000 ]
default: 2000
required:
- reg
@@ -80,5 +92,7 @@ examples:
ti,op-mode = <DP83869_RGMII_COPPER_ETHERNET>;
ti,max-output-impedance = "true";
ti,clk-output-sel = <DP83869_CLK_O_SEL_CHN_A_RCLK>;
rx-internal-delay-ps = <2000>;
tx-internal-delay-ps = <2000>;
};
};

71
Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml Normal file
View File

@@ -0,0 +1,71 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/wireless/microchip,wilc1000.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip WILC wireless devicetree bindings
maintainers:
- Adham Abozaeid <adham.abozaeid@microchip.com>
- Ajay Singh <ajay.kathat@microchip.com>
description:
The wilc1000 chips can be connected via SPI or SDIO. This document
describes the binding to connect wilc devices.
properties:
compatible:
const: microchip,wilc1000
spi-max-frequency: true
interrupts:
maxItems: 1
clocks:
description: phandle to the clock connected on rtc clock line.
maxItems: 1
clock-names:
const: rtc
required:
- compatible
- interrupts
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
wifi@0 {
compatible = "microchip,wilc1000";
spi-max-frequency = <48000000>;
reg = <0>;
interrupt-parent = <&pioC>;
interrupts = <27 0>;
clocks = <&pck1>;
clock-names = "rtc";
};
};
- |
mmc {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
non-removable;
vmmc-supply = <&vcc_mmc1_reg>;
vqmmc-supply = <&vcc_3v3_reg>;
bus-width = <4>;
wifi@0 {
compatible = "microchip,wilc1000";
reg = <0>;
interrupt-parent = <&pioC>;
interrupts = <27 0>;
clocks = <&pck1>;
clock-names = "rtc";
};
};