dmaengine: ste_dma40: physical channels number correction
DMAC_ICFG[0:2]=SCHNB only allows to count 'multiple of 4' physical channels so it was ok with platforms having 8 channels but cannot be used for next versions (with 10 or 14 channels). This patch allows to provide the number of physical channels for a DMA device via platform_data, or still rely on SCHNB if platform_data announces 0 channel. Signed-off-by: Gerald Baeza <gerald.baeza@stericsson.com> Reviewed-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
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committed by
Fabio Baltieri

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commit
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@@ -147,6 +147,9 @@ struct stedma40_chan_cfg {
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* @memcpy_conf_log: default configuration of logical channel memcpy
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* @disabled_channels: A vector, ending with -1, that marks physical channels
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* that are for different reasons not available for the driver.
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* @num_of_phy_chans: The number of physical channels implemented in HW.
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* 0 means reading the number of channels from DMA HW but this is only valid
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* for 'multiple of 4' channels, like 8.
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*/
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struct stedma40_platform_data {
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u32 dev_len;
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@@ -158,6 +161,7 @@ struct stedma40_platform_data {
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struct stedma40_chan_cfg *memcpy_conf_log;
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int disabled_channels[STEDMA40_MAX_PHYS];
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bool use_esram_lcla;
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int num_of_phy_chans;
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};
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#ifdef CONFIG_STE_DMA40
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