isdn: whitespace coding style cleanup

isdn source code uses a not-current coding style.

Update the coding style used on a per-line basis
so that git diff -w shows only elided blank lines
at EOF.

Done with emacs and some scripts and some typing.

Built x86 allyesconfig.
No detected change in objdump -d or size.

Signed-off-by: Joe Perches <joe@perches.com>
This commit is contained in:
Joe Perches
2012-02-19 19:52:38 -08:00
förälder 0b0a635f79
incheckning 475be4d85a
314 ändrade filer med 49170 tillägg och 49266 borttagningar

Filskillnaden har hållits tillbaka eftersom den är för stor Load Diff

Visa fil

@@ -9,7 +9,7 @@
* of the GNU General Public License, incorporated herein by reference.
*
*/
#include <linux/sched.h>
#include "hisax.h"
#include "isdnl1.h"
@@ -22,9 +22,9 @@ static void
add_arcofi_timer(struct IsdnCardState *cs) {
if (test_and_set_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) {
del_timer(&cs->dc.isac.arcofitimer);
}
}
init_timer(&cs->dc.isac.arcofitimer);
cs->dc.isac.arcofitimer.expires = jiffies + ((ARCOFI_TIMER_VALUE * HZ)/1000);
cs->dc.isac.arcofitimer.expires = jiffies + ((ARCOFI_TIMER_VALUE * HZ) / 1000);
add_timer(&cs->dc.isac.arcofitimer);
}
@@ -34,11 +34,11 @@ send_arcofi(struct IsdnCardState *cs) {
cs->dc.isac.mon_txp = 0;
cs->dc.isac.mon_txc = cs->dc.isac.arcofi_list->len;
memcpy(cs->dc.isac.mon_tx, cs->dc.isac.arcofi_list->msg, cs->dc.isac.mon_txc);
switch(cs->dc.isac.arcofi_bc) {
case 0: break;
case 1: cs->dc.isac.mon_tx[1] |= 0x40;
break;
default: break;
switch (cs->dc.isac.arcofi_bc) {
case 0: break;
case 1: cs->dc.isac.mon_tx[1] |= 0x40;
break;
default: break;
}
cs->dc.isac.mocr &= 0x0f;
cs->dc.isac.mocr |= 0xa0;
@@ -58,42 +58,25 @@ arcofi_fsm(struct IsdnCardState *cs, int event, void *data) {
cs->dc.isac.arcofi_state = ARCOFI_NOP;
test_and_set_bit(FLG_ARCOFI_ERROR, &cs->HW_Flags);
wake_up(&cs->dc.isac.arcofi_wait);
return(1);
return (1);
}
switch (cs->dc.isac.arcofi_state) {
case ARCOFI_NOP:
if (event == ARCOFI_START) {
cs->dc.isac.arcofi_list = data;
cs->dc.isac.arcofi_state = ARCOFI_TRANSMIT;
send_arcofi(cs);
}
break;
case ARCOFI_TRANSMIT:
if (event == ARCOFI_TX_END) {
if (cs->dc.isac.arcofi_list->receive) {
add_arcofi_timer(cs);
cs->dc.isac.arcofi_state = ARCOFI_RECEIVE;
} else {
if (cs->dc.isac.arcofi_list->next) {
cs->dc.isac.arcofi_list =
cs->dc.isac.arcofi_list->next;
send_arcofi(cs);
} else {
if (test_and_clear_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) {
del_timer(&cs->dc.isac.arcofitimer);
}
cs->dc.isac.arcofi_state = ARCOFI_NOP;
wake_up(&cs->dc.isac.arcofi_wait);
}
}
}
break;
case ARCOFI_RECEIVE:
if (event == ARCOFI_RX_END) {
case ARCOFI_NOP:
if (event == ARCOFI_START) {
cs->dc.isac.arcofi_list = data;
cs->dc.isac.arcofi_state = ARCOFI_TRANSMIT;
send_arcofi(cs);
}
break;
case ARCOFI_TRANSMIT:
if (event == ARCOFI_TX_END) {
if (cs->dc.isac.arcofi_list->receive) {
add_arcofi_timer(cs);
cs->dc.isac.arcofi_state = ARCOFI_RECEIVE;
} else {
if (cs->dc.isac.arcofi_list->next) {
cs->dc.isac.arcofi_list =
cs->dc.isac.arcofi_list->next;
cs->dc.isac.arcofi_state = ARCOFI_TRANSMIT;
send_arcofi(cs);
} else {
if (test_and_clear_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) {
@@ -103,12 +86,29 @@ arcofi_fsm(struct IsdnCardState *cs, int event, void *data) {
wake_up(&cs->dc.isac.arcofi_wait);
}
}
break;
default:
debugl1(cs, "Arcofi unknown state %x", cs->dc.isac.arcofi_state);
return(2);
}
break;
case ARCOFI_RECEIVE:
if (event == ARCOFI_RX_END) {
if (cs->dc.isac.arcofi_list->next) {
cs->dc.isac.arcofi_list =
cs->dc.isac.arcofi_list->next;
cs->dc.isac.arcofi_state = ARCOFI_TRANSMIT;
send_arcofi(cs);
} else {
if (test_and_clear_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) {
del_timer(&cs->dc.isac.arcofitimer);
}
cs->dc.isac.arcofi_state = ARCOFI_NOP;
wake_up(&cs->dc.isac.arcofi_wait);
}
}
break;
default:
debugl1(cs, "Arcofi unknown state %x", cs->dc.isac.arcofi_state);
return (2);
}
return(0);
return (0);
}
static void

Visa fil

@@ -9,7 +9,7 @@
* of the GNU General Public License, incorporated herein by reference.
*
*/
#define ARCOFI_USE 1
/* states */

Visa fil

@@ -22,7 +22,7 @@
static const char *Asuscom_revision = "$Revision: 1.14.2.4 $";
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
#define ASUS_ISAC 0
@@ -51,7 +51,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
}
static inline void
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
insb(adr, data, size);
@@ -66,7 +66,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
}
static inline void
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
outsb(adr, data, size);
@@ -87,13 +87,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size);
}
@@ -101,23 +101,23 @@ WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
static u_char
ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset)
{
return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset|0x80));
return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset | 0x80));
}
static void
WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value)
{
writereg(cs->hw.asus.adr, cs->hw.asus.isac, offset|0x80, value);
writereg(cs->hw.asus.adr, cs->hw.asus.isac, offset | 0x80, value);
}
static void
ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0x80, data, size);
}
static void
WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0x80, data, size);
}
@@ -140,16 +140,16 @@ WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
* fast interrupt HSCX stuff goes here
*/
#define READHSCX(cs, nr, reg) readreg(cs->hw.asus.adr, \
cs->hw.asus.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.asus.adr, \
cs->hw.asus.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCX(cs, nr, reg) readreg(cs->hw.asus.adr, \
cs->hw.asus.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.asus.adr, \
cs->hw.asus.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.asus.adr, \
cs->hw.asus.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.asus.adr, \
cs->hw.asus.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.asus.adr, \
cs->hw.asus.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.asus.adr, \
cs->hw.asus.hscx, (nr ? 0x40 : 0), ptr, cnt)
#include "hscx_irq.c"
@@ -162,11 +162,11 @@ asuscom_interrupt(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
Start_HSCX:
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
@@ -274,39 +274,39 @@ Asus_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_asuscom(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_asuscom(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
cs->debug |= L1_DEB_IPAC;
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_asuscom(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_asuscom(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
cs->debug |= L1_DEB_IPAC;
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
#ifdef __ISAPNP__
static struct isapnp_device_id asus_ids[] __devinitdata = {
{ ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1688),
ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1688),
ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1688),
(unsigned long) "Asus1688 PnP" },
{ ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1690),
ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1690),
ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1690),
(unsigned long) "Asus1690 PnP" },
{ ISAPNP_VENDOR('S', 'I', 'E'), ISAPNP_FUNCTION(0x0020),
ISAPNP_VENDOR('S', 'I', 'E'), ISAPNP_FUNCTION(0x0020),
ISAPNP_VENDOR('S', 'I', 'E'), ISAPNP_FUNCTION(0x0020),
(unsigned long) "Isurf2 PnP" },
{ ISAPNP_VENDOR('E', 'L', 'F'), ISAPNP_FUNCTION(0x0000),
ISAPNP_VENDOR('E', 'L', 'F'), ISAPNP_FUNCTION(0x0000),
ISAPNP_VENDOR('E', 'L', 'F'), ISAPNP_FUNCTION(0x0000),
(unsigned long) "Iscas TE320" },
{ 0, }
};
@@ -330,30 +330,30 @@ setup_asuscom(struct IsdnCard *card)
#ifdef __ISAPNP__
if (!card->para[1] && isapnp_present()) {
struct pnp_dev *pnp_d;
while(ipid->card_vendor) {
while (ipid->card_vendor) {
if ((pnp_c = pnp_find_card(ipid->card_vendor,
ipid->card_device, pnp_c))) {
ipid->card_device, pnp_c))) {
pnp_d = NULL;
if ((pnp_d = pnp_find_dev(pnp_c,
ipid->vendor, ipid->function, pnp_d))) {
ipid->vendor, ipid->function, pnp_d))) {
int err;
printk(KERN_INFO "HiSax: %s detected\n",
(char *)ipid->driver_data);
(char *)ipid->driver_data);
pnp_disable_dev(pnp_d);
err = pnp_activate_dev(pnp_d);
if (err<0) {
if (err < 0) {
printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
__func__, err);
return(0);
__func__, err);
return (0);
}
card->para[1] = pnp_port_start(pnp_d, 0);
card->para[0] = pnp_irq(pnp_d, 0);
if (!card->para[0] || !card->para[1]) {
printk(KERN_ERR "AsusPnP:some resources are missing %ld/%lx\n",
card->para[0], card->para[1]);
card->para[0], card->para[1]);
pnp_disable_dev(pnp_d);
return(0);
return (0);
}
break;
} else {
@@ -362,10 +362,10 @@ setup_asuscom(struct IsdnCard *card)
}
ipid++;
pnp_c = NULL;
}
}
if (!ipid->card_vendor) {
printk(KERN_INFO "AsusPnP: no ISAPnP card found\n");
return(0);
return (0);
}
}
#endif
@@ -380,14 +380,14 @@ setup_asuscom(struct IsdnCard *card)
return (0);
}
printk(KERN_INFO "ISDNLink: defined at 0x%x IRQ %d\n",
cs->hw.asus.cfg_reg, cs->irq);
cs->hw.asus.cfg_reg, cs->irq);
setup_isac(cs);
cs->BC_Read_Reg = &ReadHSCX;
cs->BC_Write_Reg = &WriteHSCX;
cs->BC_Send_Data = &hscx_fill_fifo;
cs->cardmsg = &Asus_card_msg;
val = readreg(cs->hw.asus.cfg_reg + ASUS_IPAC_ALE,
cs->hw.asus.cfg_reg + ASUS_IPAC_DATA, IPAC_ID);
val = readreg(cs->hw.asus.cfg_reg + ASUS_IPAC_ALE,
cs->hw.asus.cfg_reg + ASUS_IPAC_DATA, IPAC_ID);
if ((val == 1) || (val == 2)) {
cs->subtyp = ASUS_IPAC;
cs->hw.asus.adr = cs->hw.asus.cfg_reg + ASUS_IPAC_ALE;
@@ -415,7 +415,7 @@ setup_asuscom(struct IsdnCard *card)
ISACVersion(cs, "ISDNLink:");
if (HscxVersion(cs, "ISDNLink:")) {
printk(KERN_WARNING
"ISDNLink: wrong HSCX versions check IO address\n");
"ISDNLink: wrong HSCX versions check IO address\n");
release_io_asuscom(cs);
return (0);
}

Visa fil

@@ -22,7 +22,7 @@ static const char *avm_revision = "$Revision: 2.15.2.4 $";
#define AVM_A1_STAT_HSCX 0x02
#define AVM_A1_STAT_TIMER 0x04
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
static inline u_char
@@ -39,13 +39,13 @@ writereg(unsigned int adr, u_char off, u_char data)
static inline void
read_fifo(unsigned int adr, u_char * data, int size)
read_fifo(unsigned int adr, u_char *data, int size)
{
insb(adr, data, size);
}
static void
write_fifo(unsigned int adr, u_char * data, int size)
write_fifo(unsigned int adr, u_char *data, int size)
{
outsb(adr, data, size);
}
@@ -65,13 +65,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
read_fifo(cs->hw.avm.isacfifo, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
write_fifo(cs->hw.avm.isacfifo, data, size);
}
@@ -158,23 +158,23 @@ AVM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
return(0);
case CARD_RELEASE:
release_ioregs(cs, 0x3f);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 1);
byteout(cs->hw.avm.cfg_reg, 0x16);
byteout(cs->hw.avm.cfg_reg, 0x1E);
inithscxisac(cs, 2);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
return (0);
case CARD_RELEASE:
release_ioregs(cs, 0x3f);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 1);
byteout(cs->hw.avm.cfg_reg, 0x16);
byteout(cs->hw.avm.cfg_reg, 0x1E);
inithscxisac(cs, 2);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
int __devinit

Visa fil

@@ -39,7 +39,7 @@
#define ASL0_R_ISAC 0x20 /* active low */
#define ASL0_R_HSCX 0x40 /* active low */
#define ASL0_R_TESTBIT 0x80
#define ASL0_R_IRQPENDING (ASL0_R_ISAC|ASL0_R_HSCX|ASL0_R_TIMER)
#define ASL0_R_IRQPENDING (ASL0_R_ISAC | ASL0_R_HSCX | ASL0_R_TIMER)
/* write bits ASL0 */
#define ASL0_W_RESET 0x01
@@ -52,8 +52,8 @@
#define ASL1_W_LED0 0x10
#define ASL1_W_LED1 0x20
#define ASL1_W_ENABLE_S0 0xC0
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
static const char *avm_revision = "$Revision: 2.9.2.5 $";
@@ -61,34 +61,34 @@ static const char *avm_revision = "$Revision: 2.9.2.5 $";
static inline u_char
ReadISAC(struct IsdnCardState *cs, u_char offset)
{
u_char ret;
u_char ret;
offset -= 0x20;
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_REG_OFFSET+offset);
ret = bytein(cs->hw.avm.cfg_reg+DATAREG_OFFSET);
offset -= 0x20;
byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, ISAC_REG_OFFSET + offset);
ret = bytein(cs->hw.avm.cfg_reg + DATAREG_OFFSET);
return ret;
}
static inline void
WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
{
offset -= 0x20;
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_REG_OFFSET+offset);
byteout(cs->hw.avm.cfg_reg+DATAREG_OFFSET, value);
offset -= 0x20;
byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, ISAC_REG_OFFSET + offset);
byteout(cs->hw.avm.cfg_reg + DATAREG_OFFSET, value);
}
static inline void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_FIFO_OFFSET);
insb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size);
byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, ISAC_FIFO_OFFSET);
insb(cs->hw.avm.cfg_reg + DATAREG_OFFSET, data, size);
}
static inline void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_FIFO_OFFSET);
outsb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size);
byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, ISAC_FIFO_OFFSET);
outsb(cs->hw.avm.cfg_reg + DATAREG_OFFSET, data, size);
}
static inline u_char
@@ -96,36 +96,36 @@ ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
{
u_char ret;
offset -= 0x20;
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
HSCX_REG_OFFSET+hscx*HSCX_CH_DIFF+offset);
ret = bytein(cs->hw.avm.cfg_reg+DATAREG_OFFSET);
offset -= 0x20;
byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET,
HSCX_REG_OFFSET + hscx * HSCX_CH_DIFF + offset);
ret = bytein(cs->hw.avm.cfg_reg + DATAREG_OFFSET);
return ret;
}
static inline void
WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
{
offset -= 0x20;
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
HSCX_REG_OFFSET+hscx*HSCX_CH_DIFF+offset);
byteout(cs->hw.avm.cfg_reg+DATAREG_OFFSET, value);
offset -= 0x20;
byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET,
HSCX_REG_OFFSET + hscx * HSCX_CH_DIFF + offset);
byteout(cs->hw.avm.cfg_reg + DATAREG_OFFSET, value);
}
static inline void
ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
{
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
HSCX_FIFO_OFFSET+hscx*HSCX_CH_DIFF);
insb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size);
byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET,
HSCX_FIFO_OFFSET + hscx * HSCX_CH_DIFF);
insb(cs->hw.avm.cfg_reg + DATAREG_OFFSET, data, size);
}
static inline void
WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
{
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
HSCX_FIFO_OFFSET+hscx*HSCX_CH_DIFF);
outsb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size);
byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET,
HSCX_FIFO_OFFSET + hscx * HSCX_CH_DIFF);
outsb(cs->hw.avm.cfg_reg + DATAREG_OFFSET, data, size);
}
/*
@@ -134,7 +134,7 @@ WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
#define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg)
#define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data)
#define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt)
#define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt)
#include "hscx_irq.c"
@@ -147,11 +147,11 @@ avm_a1p_interrupt(int intno, void *dev_id)
u_long flags;
spin_lock_irqsave(&cs->lock, flags);
while ((sval = (~bytein(cs->hw.avm.cfg_reg+ASL0_OFFSET) & ASL0_R_IRQPENDING))) {
while ((sval = (~bytein(cs->hw.avm.cfg_reg + ASL0_OFFSET) & ASL0_R_IRQPENDING))) {
if (cs->debug & L1_DEB_INTSTAT)
debugl1(cs, "avm IntStatus %x", sval);
if (sval & ASL0_R_HSCX) {
val = ReadHSCX(cs, 1, HSCX_ISTA);
val = ReadHSCX(cs, 1, HSCX_ISTA);
if (val)
hscx_int_main(cs, val);
}
@@ -177,38 +177,38 @@ AVM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00);
HZDELAY(HZ / 5 + 1);
byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,ASL0_W_RESET);
HZDELAY(HZ / 5 + 1);
byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00);
spin_unlock_irqrestore(&cs->lock, flags);
return 0;
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, 0x00);
HZDELAY(HZ / 5 + 1);
byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, ASL0_W_RESET);
HZDELAY(HZ / 5 + 1);
byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, 0x00);
spin_unlock_irqrestore(&cs->lock, flags);
return 0;
case CARD_RELEASE:
/* free_irq is done in HiSax_closecard(). */
/* free_irq(cs->irq, cs); */
return 0;
case CARD_RELEASE:
/* free_irq is done in HiSax_closecard(). */
/* free_irq(cs->irq, cs); */
return 0;
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,ASL0_W_TDISABLE|ASL0_W_TRESET|ASL0_W_IRQENABLE);
clear_pending_isac_ints(cs);
clear_pending_hscx_ints(cs);
inithscxisac(cs, 1);
inithscxisac(cs, 2);
spin_unlock_irqrestore(&cs->lock, flags);
return 0;
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, ASL0_W_TDISABLE | ASL0_W_TRESET | ASL0_W_IRQENABLE);
clear_pending_isac_ints(cs);
clear_pending_hscx_ints(cs);
inithscxisac(cs, 1);
inithscxisac(cs, 2);
spin_unlock_irqrestore(&cs->lock, flags);
return 0;
case CARD_TEST:
/* we really don't need it for the PCMCIA Version */
return 0;
case CARD_TEST:
/* we really don't need it for the PCMCIA Version */
return 0;
default:
/* all card drivers ignore others, so we do the same */
return 0;
default:
/* all card drivers ignore others, so we do the same */
return 0;
}
return 0;
}
@@ -222,7 +222,7 @@ int __devinit setup_avm_a1_pcmcia(struct IsdnCard *card)
strcpy(tmp, avm_revision);
printk(KERN_INFO "HiSax: AVM A1 PCMCIA driver Rev. %s\n",
HiSax_getrev(tmp));
HiSax_getrev(tmp));
if (cs->typ != ISDN_CTYPE_A1_PCMCIA)
return (0);
@@ -230,20 +230,20 @@ int __devinit setup_avm_a1_pcmcia(struct IsdnCard *card)
cs->irq = card->para[0];
byteout(cs->hw.avm.cfg_reg+ASL1_OFFSET, ASL1_W_ENABLE_S0);
byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00);
byteout(cs->hw.avm.cfg_reg + ASL1_OFFSET, ASL1_W_ENABLE_S0);
byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, 0x00);
HZDELAY(HZ / 5 + 1);
byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,ASL0_W_RESET);
byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, ASL0_W_RESET);
HZDELAY(HZ / 5 + 1);
byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00);
byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, 0x00);
byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET, ASL0_W_TDISABLE|ASL0_W_TRESET);
byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, ASL0_W_TDISABLE | ASL0_W_TRESET);
model = bytein(cs->hw.avm.cfg_reg+MODREG_OFFSET);
vers = bytein(cs->hw.avm.cfg_reg+VERREG_OFFSET);
model = bytein(cs->hw.avm.cfg_reg + MODREG_OFFSET);
vers = bytein(cs->hw.avm.cfg_reg + VERREG_OFFSET);
printk(KERN_INFO "AVM A1 PCMCIA: io 0x%x irq %d model %d version %d\n",
cs->hw.avm.cfg_reg, cs->irq, model, vers);
cs->hw.avm.cfg_reg, cs->irq, model, vers);
setup_isac(cs);
cs->readisac = &ReadISAC;

Visa fil

@@ -95,14 +95,14 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
outb(AVM_ISAC_FIFO, cs->hw.avm.cfg_reg + 4);
insb(cs->hw.avm.isac, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
outb(AVM_ISAC_FIFO, cs->hw.avm.cfg_reg + 4);
outsb(cs->hw.avm.isac, data, size);
@@ -151,7 +151,7 @@ WriteHDLCPnP(struct IsdnCardState *cs, int chan, u_char offset, u_char value)
static u_char
ReadHDLC_s(struct IsdnCardState *cs, int chan, u_char offset)
{
return(0xff & ReadHDLCPCI(cs, chan, offset));
return (0xff & ReadHDLCPCI(cs, chan, offset));
}
static void
@@ -164,11 +164,11 @@ static inline
struct BCState *Sel_BCS(struct IsdnCardState *cs, int channel)
{
if (cs->bcs[0].mode && (cs->bcs[0].channel == channel))
return(&cs->bcs[0]);
return (&cs->bcs[0]);
else if (cs->bcs[1].mode && (cs->bcs[1].channel == channel))
return(&cs->bcs[1]);
return (&cs->bcs[1]);
else
return(NULL);
return (NULL);
}
static void
@@ -182,13 +182,13 @@ write_ctrl(struct BCState *bcs, int which) {
} else {
if (which & 4)
WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS + 2,
bcs->hw.hdlc.ctrl.sr.mode);
bcs->hw.hdlc.ctrl.sr.mode);
if (which & 2)
WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS + 1,
bcs->hw.hdlc.ctrl.sr.xml);
bcs->hw.hdlc.ctrl.sr.xml);
if (which & 1)
WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS,
bcs->hw.hdlc.ctrl.sr.cmd);
bcs->hw.hdlc.ctrl.sr.cmd);
}
}
@@ -203,41 +203,41 @@ modehdlc(struct BCState *bcs, int mode, int bc)
'A' + hdlc, bcs->mode, mode, hdlc, bc);
bcs->hw.hdlc.ctrl.ctrl = 0;
switch (mode) {
case (-1): /* used for init */
bcs->mode = 1;
bcs->channel = bc;
bc = 0;
case (L1_MODE_NULL):
if (bcs->mode == L1_MODE_NULL)
return;
bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_TRANS;
write_ctrl(bcs, 5);
bcs->mode = L1_MODE_NULL;
bcs->channel = bc;
break;
case (L1_MODE_TRANS):
bcs->mode = mode;
bcs->channel = bc;
bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_TRANS;
write_ctrl(bcs, 5);
bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS;
write_ctrl(bcs, 1);
bcs->hw.hdlc.ctrl.sr.cmd = 0;
schedule_event(bcs, B_XMTBUFREADY);
break;
case (L1_MODE_HDLC):
bcs->mode = mode;
bcs->channel = bc;
bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_ITF_FLG;
write_ctrl(bcs, 5);
bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS;
write_ctrl(bcs, 1);
bcs->hw.hdlc.ctrl.sr.cmd = 0;
schedule_event(bcs, B_XMTBUFREADY);
break;
case (-1): /* used for init */
bcs->mode = 1;
bcs->channel = bc;
bc = 0;
case (L1_MODE_NULL):
if (bcs->mode == L1_MODE_NULL)
return;
bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_TRANS;
write_ctrl(bcs, 5);
bcs->mode = L1_MODE_NULL;
bcs->channel = bc;
break;
case (L1_MODE_TRANS):
bcs->mode = mode;
bcs->channel = bc;
bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_TRANS;
write_ctrl(bcs, 5);
bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS;
write_ctrl(bcs, 1);
bcs->hw.hdlc.ctrl.sr.cmd = 0;
schedule_event(bcs, B_XMTBUFREADY);
break;
case (L1_MODE_HDLC):
bcs->mode = mode;
bcs->channel = bc;
bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_ITF_FLG;
write_ctrl(bcs, 5);
bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS;
write_ctrl(bcs, 1);
bcs->hw.hdlc.ctrl.sr.cmd = 0;
schedule_event(bcs, B_XMTBUFREADY);
break;
}
}
@@ -247,7 +247,7 @@ hdlc_empty_fifo(struct BCState *bcs, int count)
register u_int *ptr;
u_char *p;
u_char idx = bcs->channel ? AVM_HDLC_2 : AVM_HDLC_1;
int cnt=0;
int cnt = 0;
struct IsdnCardState *cs = bcs->cs;
if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
@@ -264,7 +264,7 @@ hdlc_empty_fifo(struct BCState *bcs, int count)
outl(idx, cs->hw.avm.cfg_reg + 4);
while (cnt < count) {
#ifdef __powerpc__
*ptr++ = in_be32((unsigned *)(cs->hw.avm.isac +_IO_BASE));
*ptr++ = in_be32((unsigned *)(cs->hw.avm.isac + _IO_BASE));
#else
*ptr++ = inl(cs->hw.avm.isac);
#endif /* __powerpc__ */
@@ -293,7 +293,7 @@ static inline void
hdlc_fill_fifo(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
int count, cnt =0;
int count, cnt = 0;
int fifo_size = 32;
u_char *p;
u_int *ptr;
@@ -323,16 +323,16 @@ hdlc_fill_fifo(struct BCState *bcs)
bcs->hw.hdlc.ctrl.sr.xml = ((count == fifo_size) ? 0 : count);
write_ctrl(bcs, 3); /* sets the correct index too */
if (cs->subtyp == AVM_FRITZ_PCI) {
while (cnt<count) {
while (cnt < count) {
#ifdef __powerpc__
out_be32((unsigned *)(cs->hw.avm.isac +_IO_BASE), *ptr++);
out_be32((unsigned *)(cs->hw.avm.isac + _IO_BASE), *ptr++);
#else
outl(*ptr++, cs->hw.avm.isac);
#endif /* __powerpc__ */
cnt += 4;
}
} else {
while (cnt<count) {
while (cnt < count) {
outb(*p++, cs->hw.avm.isac);
cnt++;
}
@@ -369,17 +369,17 @@ HDLC_irq(struct BCState *bcs, u_int stat) {
write_ctrl(bcs, 1);
bcs->hw.hdlc.rcvidx = 0;
} else {
if (!(len = (stat & HDLC_STAT_RML_MASK)>>8))
if (!(len = (stat & HDLC_STAT_RML_MASK) >> 8))
len = 32;
hdlc_empty_fifo(bcs, len);
if ((stat & HDLC_STAT_RME) || (bcs->mode == L1_MODE_TRANS)) {
if (((stat & HDLC_STAT_CRCVFRRAB)==HDLC_STAT_CRCVFR) ||
(bcs->mode == L1_MODE_TRANS)) {
if (((stat & HDLC_STAT_CRCVFRRAB) == HDLC_STAT_CRCVFR) ||
(bcs->mode == L1_MODE_TRANS)) {
if (!(skb = dev_alloc_skb(bcs->hw.hdlc.rcvidx)))
printk(KERN_WARNING "HDLC: receive out of memory\n");
else {
memcpy(skb_put(skb, bcs->hw.hdlc.rcvidx),
bcs->hw.hdlc.rcvbuf, bcs->hw.hdlc.rcvidx);
bcs->hw.hdlc.rcvbuf, bcs->hw.hdlc.rcvidx);
skb_queue_tail(&bcs->rqueue, skb);
}
bcs->hw.hdlc.rcvidx = 0;
@@ -418,9 +418,9 @@ HDLC_irq(struct BCState *bcs, u_int stat) {
hdlc_fill_fifo(bcs);
return;
} else {
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
u_long flags;
if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
u_long flags;
spin_lock_irqsave(&bcs->aclock, flags);
bcs->ackcnt += bcs->hw.hdlc.count;
spin_unlock_irqrestore(&bcs->aclock, flags);
@@ -453,7 +453,7 @@ HDLC_irq_main(struct IsdnCardState *cs)
} else {
stat = ReadHDLCPnP(cs, 0, HDLC_STATUS);
if (stat & HDLC_INT_RPR)
stat |= (ReadHDLCPnP(cs, 0, HDLC_STATUS+1))<<8;
stat |= (ReadHDLCPnP(cs, 0, HDLC_STATUS + 1)) << 8;
}
if (stat & HDLC_INT_MASK) {
if (!(bcs = Sel_BCS(cs, 0))) {
@@ -467,7 +467,7 @@ HDLC_irq_main(struct IsdnCardState *cs)
} else {
stat = ReadHDLCPnP(cs, 1, HDLC_STATUS);
if (stat & HDLC_INT_RPR)
stat |= (ReadHDLCPnP(cs, 1, HDLC_STATUS+1))<<8;
stat |= (ReadHDLCPnP(cs, 1, HDLC_STATUS + 1)) << 8;
}
if (stat & HDLC_INT_MASK) {
if (!(bcs = Sel_BCS(cs, 1))) {
@@ -486,55 +486,55 @@ hdlc_l2l1(struct PStack *st, int pr, void *arg)
u_long flags;
switch (pr) {
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->hw.hdlc.count = 0;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
printk(KERN_WARNING "hdlc_l2l1: this shouldn't happen\n");
} else {
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->hw.hdlc.count = 0;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
modehdlc(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
modehdlc(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->hw.hdlc.count = 0;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
printk(KERN_WARNING "hdlc_l2l1: this shouldn't happen\n");
} else {
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->hw.hdlc.count = 0;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
modehdlc(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
modehdlc(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
}
}
@@ -568,7 +568,7 @@ open_hdlcstate(struct IsdnCardState *cs, struct BCState *bcs)
}
if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) {
printk(KERN_WARNING
"HiSax: No memory for bcs->blog\n");
"HiSax: No memory for bcs->blog\n");
test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
kfree(bcs->hw.hdlc.rcvbuf);
bcs->hw.hdlc.rcvbuf = NULL;
@@ -688,34 +688,34 @@ AVM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_avmpcipnp(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
outb(0, cs->hw.avm.cfg_reg + 2);
release_region(cs->hw.avm.cfg_reg, 32);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
reset_avmpcipnp(cs);
clear_pending_isac_ints(cs);
initisac(cs);
inithdlc(cs);
outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER,
cs->hw.avm.cfg_reg + 2);
WriteISAC(cs, ISAC_MASK, 0);
outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER |
AVM_STATUS0_ENA_IRQ, cs->hw.avm.cfg_reg + 2);
/* RESET Receiver and Transmitter */
WriteISAC(cs, ISAC_CMDR, 0x41);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_avmpcipnp(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
outb(0, cs->hw.avm.cfg_reg + 2);
release_region(cs->hw.avm.cfg_reg, 32);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
reset_avmpcipnp(cs);
clear_pending_isac_ints(cs);
initisac(cs);
inithdlc(cs);
outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER,
cs->hw.avm.cfg_reg + 2);
WriteISAC(cs, ISAC_MASK, 0);
outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER |
AVM_STATUS0_ENA_IRQ, cs->hw.avm.cfg_reg + 2);
/* RESET Receiver and Transmitter */
WriteISAC(cs, ISAC_CMDR, 0x41);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
static int __devinit avm_setup_rest(struct IsdnCardState *cs)
@@ -724,7 +724,7 @@ static int __devinit avm_setup_rest(struct IsdnCardState *cs)
cs->hw.avm.isac = cs->hw.avm.cfg_reg + 0x10;
if (!request_region(cs->hw.avm.cfg_reg, 32,
(cs->subtyp == AVM_FRITZ_PCI) ? "avm PCI" : "avm PnP")) {
(cs->subtyp == AVM_FRITZ_PCI) ? "avm PCI" : "avm PnP")) {
printk(KERN_WARNING
"HiSax: Fritz!PCI/PNP config port %x-%x already in use\n",
cs->hw.avm.cfg_reg,
@@ -732,28 +732,28 @@ static int __devinit avm_setup_rest(struct IsdnCardState *cs)
return (0);
}
switch (cs->subtyp) {
case AVM_FRITZ_PCI:
case AVM_FRITZ_PCI:
val = inl(cs->hw.avm.cfg_reg);
printk(KERN_INFO "AVM PCI: stat %#x\n", val);
printk(KERN_INFO "AVM PCI: Class %X Rev %d\n",
val & 0xff, (val>>8) & 0xff);
val & 0xff, (val >> 8) & 0xff);
cs->BC_Read_Reg = &ReadHDLC_s;
cs->BC_Write_Reg = &WriteHDLC_s;
break;
case AVM_FRITZ_PNP:
case AVM_FRITZ_PNP:
val = inb(cs->hw.avm.cfg_reg);
ver = inb(cs->hw.avm.cfg_reg + 1);
printk(KERN_INFO "AVM PnP: Class %X Rev %d\n", val, ver);
cs->BC_Read_Reg = &ReadHDLCPnP;
cs->BC_Write_Reg = &WriteHDLCPnP;
break;
default:
printk(KERN_WARNING "AVM unknown subtype %d\n", cs->subtyp);
return(0);
default:
printk(KERN_WARNING "AVM unknown subtype %d\n", cs->subtyp);
return (0);
}
printk(KERN_INFO "HiSax: %s config irq:%d base:0x%X\n",
(cs->subtyp == AVM_FRITZ_PCI) ? "AVM Fritz!PCI" : "AVM Fritz!PnP",
cs->irq, cs->hw.avm.cfg_reg);
(cs->subtyp == AVM_FRITZ_PCI) ? "AVM Fritz!PCI" : "AVM Fritz!PnP",
cs->irq, cs->hw.avm.cfg_reg);
setup_isac(cs);
cs->readisac = &ReadISAC;
@@ -772,7 +772,7 @@ static int __devinit avm_setup_rest(struct IsdnCardState *cs)
static int __devinit avm_pnp_setup(struct IsdnCardState *cs)
{
return(1); /* no-op: success */
return (1); /* no-op: success */
}
#else
@@ -784,33 +784,33 @@ static int __devinit avm_pnp_setup(struct IsdnCardState *cs)
struct pnp_dev *pnp_avm_d = NULL;
if (!isapnp_present())
return(1); /* no-op: success */
return (1); /* no-op: success */
if ((pnp_avm_c = pnp_find_card(
ISAPNP_VENDOR('A', 'V', 'M'),
ISAPNP_FUNCTION(0x0900), pnp_avm_c))) {
ISAPNP_VENDOR('A', 'V', 'M'),
ISAPNP_FUNCTION(0x0900), pnp_avm_c))) {
if ((pnp_avm_d = pnp_find_dev(pnp_avm_c,
ISAPNP_VENDOR('A', 'V', 'M'),
ISAPNP_FUNCTION(0x0900), pnp_avm_d))) {
ISAPNP_VENDOR('A', 'V', 'M'),
ISAPNP_FUNCTION(0x0900), pnp_avm_d))) {
int err;
pnp_disable_dev(pnp_avm_d);
err = pnp_activate_dev(pnp_avm_d);
if (err<0) {
if (err < 0) {
printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
__func__, err);
return(0);
__func__, err);
return (0);
}
cs->hw.avm.cfg_reg =
pnp_port_start(pnp_avm_d, 0);
cs->irq = pnp_irq(pnp_avm_d, 0);
if (!cs->irq) {
printk(KERN_ERR "FritzPnP:No IRQ\n");
return(0);
return (0);
}
if (!cs->hw.avm.cfg_reg) {
printk(KERN_ERR "FritzPnP:No IO address\n");
return(0);
return (0);
}
cs->subtyp = AVM_FRITZ_PNP;
@@ -827,7 +827,7 @@ static int __devinit avm_pnp_setup(struct IsdnCardState *cs)
static int __devinit avm_pci_setup(struct IsdnCardState *cs)
{
return(1); /* no-op: success */
return (1); /* no-op: success */
}
#else
@@ -837,27 +837,27 @@ static struct pci_dev *dev_avm __devinitdata = NULL;
static int __devinit avm_pci_setup(struct IsdnCardState *cs)
{
if ((dev_avm = hisax_find_pci_device(PCI_VENDOR_ID_AVM,
PCI_DEVICE_ID_AVM_A1, dev_avm))) {
PCI_DEVICE_ID_AVM_A1, dev_avm))) {
if (pci_enable_device(dev_avm))
return(0);
return (0);
cs->irq = dev_avm->irq;
if (!cs->irq) {
printk(KERN_ERR "FritzPCI: No IRQ for PCI card found\n");
return(0);
return (0);
}
cs->hw.avm.cfg_reg = pci_resource_start(dev_avm, 1);
if (!cs->hw.avm.cfg_reg) {
printk(KERN_ERR "FritzPCI: No IO-Adr for PCI card found\n");
return(0);
return (0);
}
cs->subtyp = AVM_FRITZ_PCI;
} else {
printk(KERN_WARNING "FritzPCI: No PCI card found\n");
return(0);
return (0);
}
cs->irq_flags |= IRQF_SHARED;

Visa fil

@@ -3,7 +3,7 @@
*
* Author Carsten Paeth
* Copyright 1998-2001 by Carsten Paeth <calle@calle.in-berlin.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -39,20 +39,20 @@ module_param(isdnprot, int, 0);
/*====================================================================*/
static int avma1cs_config(struct pcmcia_device *link) __devinit ;
static int avma1cs_config(struct pcmcia_device *link) __devinit;
static void avma1cs_release(struct pcmcia_device *link);
static void avma1cs_detach(struct pcmcia_device *p_dev) __devexit ;
static void avma1cs_detach(struct pcmcia_device *p_dev) __devexit;
static int __devinit avma1cs_probe(struct pcmcia_device *p_dev)
{
dev_dbg(&p_dev->dev, "avma1cs_attach()\n");
dev_dbg(&p_dev->dev, "avma1cs_attach()\n");
/* General socket configuration */
p_dev->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
p_dev->config_index = 1;
p_dev->config_regs = PRESENT_OPTION;
/* General socket configuration */
p_dev->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
p_dev->config_index = 1;
p_dev->config_regs = PRESENT_OPTION;
return avma1cs_config(p_dev);
return avma1cs_config(p_dev);
} /* avma1cs_attach */
static void __devexit avma1cs_detach(struct pcmcia_device *link)
@@ -75,63 +75,63 @@ static int avma1cs_configcheck(struct pcmcia_device *p_dev, void *priv_data)
static int __devinit avma1cs_config(struct pcmcia_device *link)
{
int i = -1;
char devname[128];
IsdnCard_t icard;
int busy = 0;
int i = -1;
char devname[128];
IsdnCard_t icard;
int busy = 0;
dev_dbg(&link->dev, "avma1cs_config(0x%p)\n", link);
dev_dbg(&link->dev, "avma1cs_config(0x%p)\n", link);
devname[0] = 0;
if (link->prod_id[1])
strlcpy(devname, link->prod_id[1], sizeof(devname));
devname[0] = 0;
if (link->prod_id[1])
strlcpy(devname, link->prod_id[1], sizeof(devname));
if (pcmcia_loop_config(link, avma1cs_configcheck, NULL))
return -ENODEV;
if (pcmcia_loop_config(link, avma1cs_configcheck, NULL))
return -ENODEV;
do {
/*
* allocate an interrupt line
*/
if (!link->irq) {
/* undo */
pcmcia_disable_device(link);
break;
}
do {
/*
* allocate an interrupt line
*/
if (!link->irq) {
/* undo */
pcmcia_disable_device(link);
break;
}
/*
* configure the PCMCIA socket
*/
i = pcmcia_enable_device(link);
/*
* configure the PCMCIA socket
*/
i = pcmcia_enable_device(link);
if (i != 0) {
pcmcia_disable_device(link);
break;
}
} while (0);
/* If any step failed, release any partially configured state */
if (i != 0) {
pcmcia_disable_device(link);
break;
avma1cs_release(link);
return -ENODEV;
}
} while (0);
icard.para[0] = link->irq;
icard.para[1] = link->resource[0]->start;
icard.protocol = isdnprot;
icard.typ = ISDN_CTYPE_A1_PCMCIA;
/* If any step failed, release any partially configured state */
if (i != 0) {
avma1cs_release(link);
return -ENODEV;
}
i = hisax_init_pcmcia(link, &busy, &icard);
if (i < 0) {
printk(KERN_ERR "avma1_cs: failed to initialize AVM A1 "
"PCMCIA %d at i/o %#x\n", i,
(unsigned int) link->resource[0]->start);
avma1cs_release(link);
return -ENODEV;
}
link->priv = (void *) (unsigned long) i;
icard.para[0] = link->irq;
icard.para[1] = link->resource[0]->start;
icard.protocol = isdnprot;
icard.typ = ISDN_CTYPE_A1_PCMCIA;
i = hisax_init_pcmcia(link, &busy, &icard);
if (i < 0) {
printk(KERN_ERR "avma1_cs: failed to initialize AVM A1 "
"PCMCIA %d at i/o %#x\n", i,
(unsigned int) link->resource[0]->start);
avma1cs_release(link);
return -ENODEV;
}
link->priv = (void *) (unsigned long) i;
return 0;
return 0;
} /* avma1cs_config */
static void avma1cs_release(struct pcmcia_device *link)

Visa fil

@@ -4,7 +4,7 @@
*
* Author Roland Klabunde
* Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -39,7 +39,7 @@ readreg(unsigned int ale, unsigned long adr, u_char off)
static inline void
readfifo(unsigned int ale, unsigned long adr, u_char off, u_char * data, int size)
readfifo(unsigned int ale, unsigned long adr, u_char off, u_char *data, int size)
{
int i;
for (i = 0; i < size; i++)
@@ -59,7 +59,7 @@ writereg(unsigned int ale, unsigned long adr, u_char off, u_char data)
static inline void
writefifo(unsigned int ale, unsigned long adr, u_char off, u_char * data, int size)
writefifo(unsigned int ale, unsigned long adr, u_char off, u_char *data, int size)
{
int i;
@@ -83,13 +83,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size);
}
@@ -110,15 +110,15 @@ WriteJADE(struct IsdnCardState *cs, int jade, u_char offset, u_char value)
* fast interrupt JADE stuff goes here
*/
#define READJADE(cs, nr, reg) readreg(cs->hw.ax.jade_ale,\
cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)))
#define WRITEJADE(cs, nr, reg, data) writereg(cs->hw.ax.jade_ale,\
cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), data)
#define READJADE(cs, nr, reg) readreg(cs->hw.ax.jade_ale, \
cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)))
#define WRITEJADE(cs, nr, reg, data) writereg(cs->hw.ax.jade_ale, \
cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), data)
#define READJADEFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.jade_ale,\
cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt)
#define WRITEJADEFIFO(cs, nr, ptr, cnt) writefifo( cs->hw.ax.jade_ale,\
cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt)
#define READJADEFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.jade_ale, \
cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt)
#define WRITEJADEFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ax.jade_ale, \
cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt)
#include "jade_irq.c"
@@ -201,11 +201,11 @@ reset_bkm(struct IsdnCardState *cs)
pI20_Regs->i20SysControl = sysRESET | sysCFG;
/* Issue ISDN reset */
pI20_Regs->i20GuestControl = guestWAIT_CFG |
g_A4T_JADE_RES |
g_A4T_ISAR_RES |
g_A4T_ISAC_RES |
g_A4T_JADE_BOOTR |
g_A4T_ISAR_BOOTR;
g_A4T_JADE_RES |
g_A4T_ISAR_RES |
g_A4T_ISAC_RES |
g_A4T_JADE_BOOTR |
g_A4T_ISAR_BOOTR;
mdelay(10);
/* Remove RESET state from ISDN */
@@ -222,33 +222,33 @@ BKM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
/* Disable ints */
spin_lock_irqsave(&cs->lock, flags);
enable_bkm_int(cs, 0);
reset_bkm(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
/* Sanity */
spin_lock_irqsave(&cs->lock, flags);
enable_bkm_int(cs, 0);
reset_bkm(cs);
spin_unlock_irqrestore(&cs->lock, flags);
release_io_bkm(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
clear_pending_isac_ints(cs);
clear_pending_jade_ints(cs);
initisac(cs);
initjade(cs);
/* Enable ints */
enable_bkm_int(cs, 1);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
case CARD_RESET:
/* Disable ints */
spin_lock_irqsave(&cs->lock, flags);
enable_bkm_int(cs, 0);
reset_bkm(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
/* Sanity */
spin_lock_irqsave(&cs->lock, flags);
enable_bkm_int(cs, 0);
reset_bkm(cs);
spin_unlock_irqrestore(&cs->lock, flags);
release_io_bkm(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
clear_pending_isac_ints(cs);
clear_pending_jade_ints(cs);
initisac(cs);
initjade(cs);
/* Enable ints */
enable_bkm_int(cs, 1);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return (0);
}
@@ -341,7 +341,7 @@ setup_bkm_a4t(struct IsdnCard *card)
return (0);
while ((dev_a4t = hisax_find_pci_device(PCI_VENDOR_ID_ZORAN,
PCI_DEVICE_ID_ZORAN_36120, dev_a4t))) {
PCI_DEVICE_ID_ZORAN_36120, dev_a4t))) {
ret = a4t_pci_probe(dev_a4t, cs, &found, &pci_memaddr);
if (!ret)
return (0);

Visa fil

@@ -4,7 +4,7 @@
*
* Author Roland Klabunde
* Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -34,7 +34,7 @@ static const char *sct_quadro_subtypes[] =
};
#define wordout(addr,val) outw(val,addr)
#define wordout(addr, val) outw(val, addr)
#define wordin(addr) inw(addr)
static inline u_char
@@ -47,7 +47,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
}
static inline void
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
int i;
wordout(ale, off);
@@ -64,7 +64,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
}
static inline void
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
int i;
wordout(ale, off);
@@ -87,13 +87,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.ax.base, cs->hw.ax.data_adr, 0x80, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.ax.base, cs->hw.ax.data_adr, 0x80, data, size);
}
@@ -117,21 +117,21 @@ set_ipac_active(struct IsdnCardState *cs, u_int active)
{
/* set irq mask */
writereg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_MASK,
active ? 0xc0 : 0xff);
active ? 0xc0 : 0xff);
}
/*
* fast interrupt HSCX stuff goes here
*/
#define READHSCX(cs, nr, reg) readreg(cs->hw.ax.base, \
cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ax.base, \
cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0), data)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.base, \
cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ax.base, \
cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt)
#define READHSCX(cs, nr, reg) readreg(cs->hw.ax.base, \
cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ax.base, \
cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0), data)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.base, \
cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ax.base, \
cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt)
#include "hscx_irq.c"
@@ -148,7 +148,7 @@ bkm_interrupt_ipac(int intno, void *dev_id)
spin_unlock_irqrestore(&cs->lock, flags);
return IRQ_NONE;
}
Start_IPAC:
Start_IPAC:
if (cs->debug & L1_DEB_IPAC)
debugl1(cs, "IPAC ISTA %02X", ista);
if (ista & 0x0f) {
@@ -224,33 +224,33 @@ BKM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
/* Disable ints */
set_ipac_active(cs, 0);
enable_bkm_int(cs, 0);
reset_bkm(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
/* Sanity */
spin_lock_irqsave(&cs->lock, flags);
set_ipac_active(cs, 0);
enable_bkm_int(cs, 0);
spin_unlock_irqrestore(&cs->lock, flags);
release_io_sct_quadro(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
cs->debug |= L1_DEB_IPAC;
set_ipac_active(cs, 1);
inithscxisac(cs, 3);
/* Enable ints */
enable_bkm_int(cs, 1);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
/* Disable ints */
set_ipac_active(cs, 0);
enable_bkm_int(cs, 0);
reset_bkm(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
/* Sanity */
spin_lock_irqsave(&cs->lock, flags);
set_ipac_active(cs, 0);
enable_bkm_int(cs, 0);
spin_unlock_irqrestore(&cs->lock, flags);
release_io_sct_quadro(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
cs->debug |= L1_DEB_IPAC;
set_ipac_active(cs, 1);
inithscxisac(cs, 3);
/* Enable ints */
enable_bkm_int(cs, 1);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return (0);
}
@@ -260,11 +260,11 @@ sct_alloc_io(u_int adr, u_int len)
{
if (!request_region(adr, len, "scitel")) {
printk(KERN_WARNING
"HiSax: Scitel port %#x-%#x already in use\n",
adr, adr + len);
"HiSax: Scitel port %#x-%#x already in use\n",
adr, adr + len);
return (1);
}
return(0);
return (0);
}
static struct pci_dev *dev_a8 __devinitdata = NULL;
@@ -298,18 +298,18 @@ setup_sct_quadro(struct IsdnCard *card)
return (0);
}
if ((cs->subtyp != SCT_1) && ((sub_sys_id != PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO) ||
(sub_vendor_id != PCI_VENDOR_ID_BERKOM)))
(sub_vendor_id != PCI_VENDOR_ID_BERKOM)))
return (0);
if (cs->subtyp == SCT_1) {
while ((dev_a8 = hisax_find_pci_device(PCI_VENDOR_ID_PLX,
PCI_DEVICE_ID_PLX_9050, dev_a8))) {
PCI_DEVICE_ID_PLX_9050, dev_a8))) {
sub_vendor_id = dev_a8->subsystem_vendor;
sub_sys_id = dev_a8->subsystem_device;
if ((sub_sys_id == PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO) &&
(sub_vendor_id == PCI_VENDOR_ID_BERKOM)) {
(sub_vendor_id == PCI_VENDOR_ID_BERKOM)) {
if (pci_enable_device(dev_a8))
return(0);
return (0);
pci_ioaddr1 = pci_resource_start(dev_a8, 1);
pci_irq = dev_a8->irq;
pci_bus = dev_a8->bus->number;
@@ -320,23 +320,23 @@ setup_sct_quadro(struct IsdnCard *card)
}
if (!found) {
printk(KERN_WARNING "HiSax: Scitel Quadro (%s): "
"Card not found\n",
sct_quadro_subtypes[cs->subtyp]);
"Card not found\n",
sct_quadro_subtypes[cs->subtyp]);
return (0);
}
#ifdef ATTEMPT_PCI_REMAPPING
/* HACK: PLX revision 1 bug: PLX address bit 7 must not be set */
if ((pci_ioaddr1 & 0x80) && (dev_a8->revision == 1)) {
printk(KERN_WARNING "HiSax: Scitel Quadro (%s): "
"PLX rev 1, remapping required!\n",
sct_quadro_subtypes[cs->subtyp]);
"PLX rev 1, remapping required!\n",
sct_quadro_subtypes[cs->subtyp]);
/* Restart PCI negotiation */
pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, (u_int) - 1);
pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, (u_int)-1);
/* Move up by 0x80 byte */
pci_ioaddr1 += 0x80;
pci_ioaddr1 &= PCI_BASE_ADDRESS_IO_MASK;
pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, pci_ioaddr1);
dev_a8->resource[ 1].start = pci_ioaddr1;
dev_a8->resource[1].start = pci_ioaddr1;
}
#endif /* End HACK */
}
@@ -371,39 +371,39 @@ setup_sct_quadro(struct IsdnCard *card)
/* pci_ioaddr5 is for the first subdevice only */
cs->hw.ax.plx_adr = pci_ioaddr1;
/* Enter all ipac_base addresses */
switch(cs->subtyp) {
case 1:
cs->hw.ax.base = pci_ioaddr5 + 0x00;
if (sct_alloc_io(pci_ioaddr1, 128))
return(0);
if (sct_alloc_io(pci_ioaddr5, 64))
return(0);
/* disable all IPAC */
writereg(pci_ioaddr5, pci_ioaddr5 + 4,
IPAC_MASK, 0xFF);
writereg(pci_ioaddr4 + 0x08, pci_ioaddr4 + 0x0c,
IPAC_MASK, 0xFF);
writereg(pci_ioaddr3 + 0x10, pci_ioaddr3 + 0x14,
IPAC_MASK, 0xFF);
writereg(pci_ioaddr2 + 0x20, pci_ioaddr2 + 0x24,
IPAC_MASK, 0xFF);
break;
case 2:
cs->hw.ax.base = pci_ioaddr4 + 0x08;
if (sct_alloc_io(pci_ioaddr4, 64))
return(0);
break;
case 3:
cs->hw.ax.base = pci_ioaddr3 + 0x10;
if (sct_alloc_io(pci_ioaddr3, 64))
return(0);
break;
case 4:
cs->hw.ax.base = pci_ioaddr2 + 0x20;
if (sct_alloc_io(pci_ioaddr2, 64))
return(0);
break;
}
switch (cs->subtyp) {
case 1:
cs->hw.ax.base = pci_ioaddr5 + 0x00;
if (sct_alloc_io(pci_ioaddr1, 128))
return (0);
if (sct_alloc_io(pci_ioaddr5, 64))
return (0);
/* disable all IPAC */
writereg(pci_ioaddr5, pci_ioaddr5 + 4,
IPAC_MASK, 0xFF);
writereg(pci_ioaddr4 + 0x08, pci_ioaddr4 + 0x0c,
IPAC_MASK, 0xFF);
writereg(pci_ioaddr3 + 0x10, pci_ioaddr3 + 0x14,
IPAC_MASK, 0xFF);
writereg(pci_ioaddr2 + 0x20, pci_ioaddr2 + 0x24,
IPAC_MASK, 0xFF);
break;
case 2:
cs->hw.ax.base = pci_ioaddr4 + 0x08;
if (sct_alloc_io(pci_ioaddr4, 64))
return (0);
break;
case 3:
cs->hw.ax.base = pci_ioaddr3 + 0x10;
if (sct_alloc_io(pci_ioaddr3, 64))
return (0);
break;
case 4:
cs->hw.ax.base = pci_ioaddr2 + 0x20;
if (sct_alloc_io(pci_ioaddr2, 64))
return (0);
break;
}
/* For isac and hscx data path */
cs->hw.ax.data_adr = cs->hw.ax.base + 4;
@@ -429,7 +429,7 @@ setup_sct_quadro(struct IsdnCard *card)
cs->irq_func = &bkm_interrupt_ipac;
printk(KERN_INFO "HiSax: Scitel Quadro (%s): IPAC Version %d\n",
sct_quadro_subtypes[cs->subtyp],
readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ID));
sct_quadro_subtypes[cs->subtyp],
readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ID));
return (1);
}

Visa fil

@@ -4,7 +4,7 @@
*
* Author Roland Klabunde
* Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -32,36 +32,36 @@
/* Application specific registers I20 (Siemens SZB6120H) */
typedef struct {
/* Video front end horizontal configuration register */
/* Video front end horizontal configuration register */
volatile u_int i20VFEHorzCfg; /* Offset 00 */
/* Video front end vertical configuration register */
volatile u_int i20VFEVertCfg; /* Offset 04 */
/* Video front end scaler and pixel format register */
volatile u_int i20VFEScaler; /* Offset 08 */
/* Video display top register */
volatile u_int i20VDispTop; /* Offset 0C */
/* Video display bottom register */
volatile u_int i20VDispBottom; /* Offset 10 */
/* Video stride, status and frame grab register */
volatile u_int i20VidFrameGrab;/* Offset 14 */
/* Video display configuration register */
volatile u_int i20VDispCfg; /* Offset 18 */
/* Video masking map top */
volatile u_int i20VMaskTop; /* Offset 1C */
/* Video masking map bottom */
volatile u_int i20VMaskBottom; /* Offset 20 */
/* Overlay control register */
volatile u_int i20OvlyControl; /* Offset 24 */
/* System, PCI and general purpose pins control register */
volatile u_int i20SysControl; /* Offset 28 */
/* Video front end vertical configuration register */
volatile u_int i20VFEVertCfg; /* Offset 04 */
/* Video front end scaler and pixel format register */
volatile u_int i20VFEScaler; /* Offset 08 */
/* Video display top register */
volatile u_int i20VDispTop; /* Offset 0C */
/* Video display bottom register */
volatile u_int i20VDispBottom; /* Offset 10 */
/* Video stride, status and frame grab register */
volatile u_int i20VidFrameGrab;/* Offset 14 */
/* Video display configuration register */
volatile u_int i20VDispCfg; /* Offset 18 */
/* Video masking map top */
volatile u_int i20VMaskTop; /* Offset 1C */
/* Video masking map bottom */
volatile u_int i20VMaskBottom; /* Offset 20 */
/* Overlay control register */
volatile u_int i20OvlyControl; /* Offset 24 */
/* System, PCI and general purpose pins control register */
volatile u_int i20SysControl; /* Offset 28 */
#define sysRESET 0x01000000 /* bit 24:Softreset (Low) */
/* GPIO 4...0: Output fixed for our cfg! */
/* GPIO 4...0: Output fixed for our cfg! */
#define sysCFG 0x000000E0 /* GPIO 7,6,5: Input */
/* General purpose pins and guest bus control register */
volatile u_int i20GuestControl;/* Offset 2C */
volatile u_int i20GuestControl;/* Offset 2C */
#define guestWAIT_CFG 0x00005555 /* 4 PCI waits for all */
#define guestISDN_INT_E 0x01000000 /* ISDN Int en (low) */
#define guestVID_INT_E 0x02000000 /* Video interrupt en (low) */
#define guestVID_INT_E 0x02000000 /* Video interrupt en (low) */
#define guestADI1_INT_R 0x04000000 /* ADI #1 int req (low) */
#define guestADI2_INT_R 0x08000000 /* ADI #2 int req (low) */
#define guestISDN_RES 0x10000000 /* ISDN reset bit (high) */
@@ -78,18 +78,18 @@ typedef struct {
#define g_A4T_ISAR_INT_S 0x40000000 /* ISAR interrupt pnd (Low) */
#define g_A4T_ISAC_INT_S 0x80000000 /* ISAC interrupt pnd (Low) */
volatile u_int i20CodeSource; /* Offset 30 */
volatile u_int i20CodeXferCtrl;/* Offset 34 */
volatile u_int i20CodeMemPtr; /* Offset 38 */
volatile u_int i20CodeSource; /* Offset 30 */
volatile u_int i20CodeXferCtrl;/* Offset 34 */
volatile u_int i20CodeMemPtr; /* Offset 38 */
volatile u_int i20IntStatus; /* Offset 3C */
volatile u_int i20IntCtrl; /* Offset 40 */
volatile u_int i20IntStatus; /* Offset 3C */
volatile u_int i20IntCtrl; /* Offset 40 */
#define intISDN 0x40000000 /* GIRQ1En (ISAC/ADI) (High) */
#define intVID 0x20000000 /* GIRQ0En (VSYNC) (High) */
#define intCOD 0x10000000 /* CodRepIrqEn (High) */
#define intPCI 0x01000000 /* PCI IntA enable (High) */
#define intPCI 0x01000000 /* PCI IntA enable (High) */
volatile u_int i20I2CCtrl; /* Offset 44 */
volatile u_int i20I2CCtrl; /* Offset 44 */
} I20_REGISTER_FILE, *PI20_REGISTER_FILE;
/*
@@ -98,7 +98,7 @@ typedef struct {
*/
#define PO_OFFSET 0x00000200 /* Postoffice offset from base */
#define GCS_0 0x00000000 /* Guest bus chip selects */
#define GCS_0 0x00000000 /* Guest bus chip selects */
#define GCS_1 0x00100000
#define GCS_2 0x00200000
#define GCS_3 0x00300000
@@ -108,12 +108,12 @@ typedef struct {
#define PO_PEND 0x02000000
#define POSTOFFICE(postoffice) *(volatile unsigned int*)(postoffice)
#define POSTOFFICE(postoffice) *(volatile unsigned int *)(postoffice)
/* Wait unlimited (don't worry) */
#define __WAITI20__(postoffice) \
do { \
while ((POSTOFFICE(postoffice) & PO_PEND)) ; \
} while (0)
/* Wait unlimited (don't worry) */
#define __WAITI20__(postoffice) \
do { \
while ((POSTOFFICE(postoffice) & PO_PEND)) ; \
} while (0)
#endif /* __BKM_AX_H__ */

Filskillnaden har hållits tillbaka eftersom den är för stor Load Diff

Visa fil

@@ -3,7 +3,7 @@
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
* by Kai Germaschewski <kai.germaschewski@gmx.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -61,8 +61,8 @@
* 24 Dr Neuhaus Niccy PnP/PCI card p0=irq p1=IO0 p2=IO1 (PnP only)
* 25 Teles S0Box p0=irq p1=iobase (from isapnp setup)
* 26 AVM A1 PCMCIA (Fritz) p0=irq p1=iobase
* 27 AVM PnP/PCI p0=irq p1=iobase (PCI no parameter)
* 28 Sedlbauer Speed Fax+ p0=irq p1=iobase (from isapnp setup)
* 27 AVM PnP/PCI p0=irq p1=iobase (PCI no parameter)
* 28 Sedlbauer Speed Fax+ p0=irq p1=iobase (from isapnp setup)
* 29 Siemens I-Surf p0=irq p1=iobase p2=memory (from isapnp setup)
* 30 ACER P10 p0=irq p1=iobase (from isapnp setup)
* 31 HST Saphir p0=irq p1=iobase
@@ -88,200 +88,200 @@ const char *CardType[] = {
"Teles PCMCIA", "ITK ix1-micro Rev.2", "Elsa PCMCIA",
"Eicon.Diehl Diva", "ISDNLink", "TeleInt", "Teles 16.3c",
"Sedlbauer Speed Card", "USR Sportster", "ith mic Linux",
"Elsa PCI", "Compaq ISA", "NETjet-S", "Teles PCI",
"Elsa PCI", "Compaq ISA", "NETjet-S", "Teles PCI",
"Sedlbauer Speed Star (PCMCIA)", "AMD 7930", "NICCY", "S0Box",
"AVM A1 (PCMCIA)", "AVM Fritz PnP/PCI", "Sedlbauer Speed Fax +",
"Siemens I-Surf", "Acer P10", "HST Saphir", "Telekom A4T",
"Scitel Quadro", "Gazel", "HFC 2BDS0 PCI", "Winbond 6692",
"HFC 2BDS0 SX", "NETspider-U", "HFC-2BDS0-SP PCMCIA",
"Hotplug", "Formula-n enter:now PCI a/b",
"Hotplug", "Formula-n enter:now PCI a/b",
};
#ifdef CONFIG_HISAX_ELSA
#define DEFAULT_CARD ISDN_CTYPE_ELSA
#define DEFAULT_CFG {0,0,0,0}
#define DEFAULT_CFG {0, 0, 0, 0}
#endif
#ifdef CONFIG_HISAX_AVM_A1
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_A1
#define DEFAULT_CFG {10,0x340,0,0}
#define DEFAULT_CFG {10, 0x340, 0, 0}
#endif
#ifdef CONFIG_HISAX_AVM_A1_PCMCIA
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_A1_PCMCIA
#define DEFAULT_CFG {11,0x170,0,0}
#define DEFAULT_CFG {11, 0x170, 0, 0}
#endif
#ifdef CONFIG_HISAX_FRITZPCI
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_FRITZPCI
#define DEFAULT_CFG {0,0,0,0}
#define DEFAULT_CFG {0, 0, 0, 0}
#endif
#ifdef CONFIG_HISAX_16_3
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_16_3
#define DEFAULT_CFG {15,0x180,0,0}
#define DEFAULT_CFG {15, 0x180, 0, 0}
#endif
#ifdef CONFIG_HISAX_S0BOX
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_S0BOX
#define DEFAULT_CFG {7,0x378,0,0}
#define DEFAULT_CFG {7, 0x378, 0, 0}
#endif
#ifdef CONFIG_HISAX_16_0
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_16_0
#define DEFAULT_CFG {15,0xd0000,0xd80,0}
#define DEFAULT_CFG {15, 0xd0000, 0xd80, 0}
#endif
#ifdef CONFIG_HISAX_TELESPCI
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_TELESPCI
#define DEFAULT_CFG {0,0,0,0}
#define DEFAULT_CFG {0, 0, 0, 0}
#endif
#ifdef CONFIG_HISAX_IX1MICROR2
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_IX1MICROR2
#define DEFAULT_CFG {5,0x390,0,0}
#define DEFAULT_CFG {5, 0x390, 0, 0}
#endif
#ifdef CONFIG_HISAX_DIEHLDIVA
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_DIEHLDIVA
#define DEFAULT_CFG {0,0x0,0,0}
#define DEFAULT_CFG {0, 0x0, 0, 0}
#endif
#ifdef CONFIG_HISAX_ASUSCOM
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_ASUSCOM
#define DEFAULT_CFG {5,0x200,0,0}
#define DEFAULT_CFG {5, 0x200, 0, 0}
#endif
#ifdef CONFIG_HISAX_TELEINT
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_TELEINT
#define DEFAULT_CFG {5,0x300,0,0}
#define DEFAULT_CFG {5, 0x300, 0, 0}
#endif
#ifdef CONFIG_HISAX_SEDLBAUER
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_SEDLBAUER
#define DEFAULT_CFG {11,0x270,0,0}
#define DEFAULT_CFG {11, 0x270, 0, 0}
#endif
#ifdef CONFIG_HISAX_SPORTSTER
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_SPORTSTER
#define DEFAULT_CFG {7,0x268,0,0}
#define DEFAULT_CFG {7, 0x268, 0, 0}
#endif
#ifdef CONFIG_HISAX_MIC
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_MIC
#define DEFAULT_CFG {12,0x3e0,0,0}
#define DEFAULT_CFG {12, 0x3e0, 0, 0}
#endif
#ifdef CONFIG_HISAX_NETJET
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_NETJET_S
#define DEFAULT_CFG {0,0,0,0}
#define DEFAULT_CFG {0, 0, 0, 0}
#endif
#ifdef CONFIG_HISAX_HFCS
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_TELES3C
#define DEFAULT_CFG {5,0x500,0,0}
#define DEFAULT_CFG {5, 0x500, 0, 0}
#endif
#ifdef CONFIG_HISAX_HFC_PCI
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_HFC_PCI
#define DEFAULT_CFG {0,0,0,0}
#define DEFAULT_CFG {0, 0, 0, 0}
#endif
#ifdef CONFIG_HISAX_HFC_SX
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_HFC_SX
#define DEFAULT_CFG {5,0x2E0,0,0}
#define DEFAULT_CFG {5, 0x2E0, 0, 0}
#endif
#ifdef CONFIG_HISAX_NICCY
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_NICCY
#define DEFAULT_CFG {0,0x0,0,0}
#define DEFAULT_CFG {0, 0x0, 0, 0}
#endif
#ifdef CONFIG_HISAX_ISURF
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_ISURF
#define DEFAULT_CFG {5,0x100,0xc8000,0}
#define DEFAULT_CFG {5, 0x100, 0xc8000, 0}
#endif
#ifdef CONFIG_HISAX_HSTSAPHIR
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_HSTSAPHIR
#define DEFAULT_CFG {5,0x250,0,0}
#define DEFAULT_CFG {5, 0x250, 0, 0}
#endif
#ifdef CONFIG_HISAX_BKM_A4T
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_BKM_A4T
#define DEFAULT_CFG {0,0x0,0,0}
#define DEFAULT_CFG {0, 0x0, 0, 0}
#endif
#ifdef CONFIG_HISAX_SCT_QUADRO
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_SCT_QUADRO
#define DEFAULT_CFG {1,0x0,0,0}
#define DEFAULT_CFG {1, 0x0, 0, 0}
#endif
#ifdef CONFIG_HISAX_GAZEL
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_GAZEL
#define DEFAULT_CFG {15,0x180,0,0}
#define DEFAULT_CFG {15, 0x180, 0, 0}
#endif
#ifdef CONFIG_HISAX_W6692
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_W6692
#define DEFAULT_CFG {0,0,0,0}
#define DEFAULT_CFG {0, 0, 0, 0}
#endif
#ifdef CONFIG_HISAX_NETJET_U
#undef DEFAULT_CARD
#undef DEFAULT_CFG
#define DEFAULT_CARD ISDN_CTYPE_NETJET_U
#define DEFAULT_CFG {0,0,0,0}
#define DEFAULT_CFG {0, 0, 0, 0}
#endif
#ifdef CONFIG_HISAX_1TR6
@@ -306,21 +306,21 @@ const char *CardType[] = {
#endif
#ifndef DEFAULT_CARD
#define DEFAULT_CARD 0
#define DEFAULT_CFG {0,0,0,0}
#define DEFAULT_CFG {0, 0, 0, 0}
#endif
#define FIRST_CARD { \
DEFAULT_CARD, \
DEFAULT_PROTO, \
DEFAULT_CFG, \
NULL, \
}
#define FIRST_CARD { \
DEFAULT_CARD, \
DEFAULT_PROTO, \
DEFAULT_CFG, \
NULL, \
}
struct IsdnCard cards[HISAX_MAX_CARDS] = {
FIRST_CARD,
};
#define HISAX_IDSIZE (HISAX_MAX_CARDS*8)
#define HISAX_IDSIZE (HISAX_MAX_CARDS * 8)
static char HiSaxID[HISAX_IDSIZE] = { 0, };
static char *HiSax_id = HiSaxID;
@@ -400,7 +400,7 @@ static void __init HiSaxVersion(void)
}
#ifndef MODULE
#define MAX_ARG (HISAX_MAX_CARDS*5)
#define MAX_ARG (HISAX_MAX_CARDS * 5)
static int __init HiSax_setup(char *line)
{
int i, j, argc;
@@ -441,7 +441,7 @@ static int __init HiSax_setup(char *line)
}
i++;
}
if (str && *str) {
if (str && *str) {
if (strlen(str) < HISAX_IDSIZE)
strcpy(HiSaxID, str);
else
@@ -813,11 +813,11 @@ static irqreturn_t card_irq(int intno, void *dev_id)
static int init_card(struct IsdnCardState *cs)
{
int irq_cnt, cnt = 3, ret;
int irq_cnt, cnt = 3, ret;
if (!cs->irq) {
ret = cs->cardmsg(cs, CARD_INIT, NULL);
return(ret);
return (ret);
}
irq_cnt = cs->irq_cnt = 0;
printk(KERN_INFO "%s: IRQ %d count %d\n", CardType[cs->typ],
@@ -1142,12 +1142,12 @@ static int hisax_cs_setup(int cardnr, struct IsdnCard *card,
/* init_card only handles interrupts which are not */
/* used here for the loadable driver */
switch (card->typ) {
case ISDN_CTYPE_DYNAMIC:
ret = 0;
break;
default:
ret = init_card(cs);
break;
case ISDN_CTYPE_DYNAMIC:
ret = 0;
break;
default:
ret = init_card(cs);
break;
}
if (ret) {
closecard(cardnr);
@@ -1203,10 +1203,10 @@ static int __ref checkcard(int cardnr, char *id, int *busy_flag,
ret = hisax_cs_setup(cardnr, card, cs);
goto out;
outf_cs:
outf_cs:
kfree(cs);
card->cs = NULL;
out:
out:
return ret;
}
@@ -1256,8 +1256,8 @@ static int __init HiSax_inithardware(int *busy_flag)
/* make sure we don't oops the module */
if (cards[i].typ > 0 && cards[i].typ <= ISDN_CTYPE_COUNT) {
printk(KERN_WARNING
"HiSax: Card %s not installed !\n",
CardType[cards[i].typ]);
"HiSax: Card %s not installed !\n",
CardType[cards[i].typ]);
}
HiSax_shiftcards(i);
nrcards--;
@@ -1521,15 +1521,15 @@ static int __init HiSax_init(void)
return -ENODEV;
return 0;
out_tei:
out_tei:
TeiFree();
out_isdnl2:
out_isdnl2:
Isdnl2Free();
out_isdnl3:
out_isdnl3:
Isdnl3Free();
out_callc:
out_callc:
CallcFree();
out:
out:
return retval;
}
@@ -1614,7 +1614,7 @@ int hisax_register(struct hisax_d_if *hisax_d_if, struct hisax_b_if *b_if[],
sprintf(id, "%s%d", name, i);
nrcards++;
retval = checkcard(i, id, NULL, hisax_d_if->owner,
hisax_setup_card_dynamic);
hisax_setup_card_dynamic);
if (retval == 0) { // yuck
cards[i].typ = 0;
nrcards--;
@@ -1637,7 +1637,7 @@ int hisax_register(struct hisax_d_if *hisax_d_if, struct hisax_b_if *b_if[],
hisax_d_if->ifc.l1l2 = hisax_d_l1l2;
skb_queue_head_init(&hisax_d_if->erq);
clear_bit(0, &hisax_d_if->ph_state);
return 0;
}
@@ -1674,7 +1674,7 @@ static void hisax_bh(struct work_struct *work)
pr = PH_DEACTIVATE | INDICATION;
for (st = cs->stlist; st; st = st->next)
st->l1.l1l2(st, pr, NULL);
}
}
@@ -1764,7 +1764,7 @@ static void hisax_b_l1l2(struct hisax_if *ifc, int pr, void *arg)
break;
case PH_DATA | CONFIRM:
bcs->tx_cnt -= (long)arg;
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag)) {
if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag)) {
u_long flags;
spin_lock_irqsave(&bcs->aclock, flags);
bcs->ackcnt += (long)arg;

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -27,7 +27,7 @@
static const char *Diva_revision = "$Revision: 1.33.2.6 $";
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
#define DIVA_HSCX_DATA 0
@@ -89,7 +89,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
}
static inline void
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
insb(adr, data, size);
@@ -113,15 +113,15 @@ writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size
static inline u_char
memreadreg(unsigned long adr, u_char off)
{
return(*((unsigned char *)
(((unsigned int *)adr) + off)));
return (*((unsigned char *)
(((unsigned int *)adr) + off)));
}
static inline void
memwritereg(unsigned long adr, u_char off, u_char data)
{
register u_char *p;
p = (unsigned char *)(((unsigned int *)adr) + off);
*p = data;
}
@@ -131,7 +131,7 @@ memwritereg(unsigned long adr, u_char off, u_char data)
static u_char
ReadISAC(struct IsdnCardState *cs, u_char offset)
{
return(readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset));
return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset));
}
static void
@@ -155,23 +155,23 @@ WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
static u_char
ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset)
{
return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset+0x80));
return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset + 0x80));
}
static void
WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value)
{
writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset|0x80, value);
writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset | 0x80, value);
}
static void
ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size);
}
static void
WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size);
}
@@ -179,47 +179,47 @@ WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
static u_char
ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
{
return(readreg(cs->hw.diva.hscx_adr,
cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0)));
return (readreg(cs->hw.diva.hscx_adr,
cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0)));
}
static void
WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
{
writereg(cs->hw.diva.hscx_adr,
cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0), value);
cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0), value);
}
static u_char
MemReadISAC_IPAC(struct IsdnCardState *cs, u_char offset)
{
return (memreadreg(cs->hw.diva.cfg_reg, offset+0x80));
return (memreadreg(cs->hw.diva.cfg_reg, offset + 0x80));
}
static void
MemWriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value)
{
memwritereg(cs->hw.diva.cfg_reg, offset|0x80, value);
memwritereg(cs->hw.diva.cfg_reg, offset | 0x80, value);
}
static void
MemReadISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
MemReadISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
{
while(size--)
while (size--)
*data++ = memreadreg(cs->hw.diva.cfg_reg, 0x80);
}
static void
MemWriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
MemWriteISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
{
while(size--)
while (size--)
memwritereg(cs->hw.diva.cfg_reg, 0x80, *data++);
}
static u_char
MemReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
{
return(memreadreg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0)));
return (memreadreg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0)));
}
static void
@@ -242,47 +242,47 @@ MemWriteISAC_IPACX(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
MemReadISACfifo_IPACX(struct IsdnCardState *cs, u_char * data, int size)
MemReadISACfifo_IPACX(struct IsdnCardState *cs, u_char *data, int size)
{
while(size--)
while (size--)
*data++ = memreadreg(cs->hw.diva.cfg_reg, 0);
}
static void
MemWriteISACfifo_IPACX(struct IsdnCardState *cs, u_char * data, int size)
MemWriteISACfifo_IPACX(struct IsdnCardState *cs, u_char *data, int size)
{
while(size--)
while (size--)
memwritereg(cs->hw.diva.cfg_reg, 0, *data++);
}
static u_char
MemReadHSCX_IPACX(struct IsdnCardState *cs, int hscx, u_char offset)
{
return(memreadreg(cs->hw.diva.cfg_reg, offset +
(hscx ? IPACX_OFF_B2 : IPACX_OFF_B1)));
return (memreadreg(cs->hw.diva.cfg_reg, offset +
(hscx ? IPACX_OFF_B2 : IPACX_OFF_B1)));
}
static void
MemWriteHSCX_IPACX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
{
memwritereg(cs->hw.diva.cfg_reg, offset +
(hscx ? IPACX_OFF_B2 : IPACX_OFF_B1), value);
memwritereg(cs->hw.diva.cfg_reg, offset +
(hscx ? IPACX_OFF_B2 : IPACX_OFF_B1), value);
}
/*
* fast interrupt HSCX stuff goes here
*/
#define READHSCX(cs, nr, reg) readreg(cs->hw.diva.hscx_adr, \
cs->hw.diva.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.diva.hscx_adr, \
cs->hw.diva.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCX(cs, nr, reg) readreg(cs->hw.diva.hscx_adr, \
cs->hw.diva.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.diva.hscx_adr, \
cs->hw.diva.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.diva.hscx_adr, \
cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.diva.hscx_adr, \
cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.diva.hscx_adr, \
cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt)
cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt)
#include "hscx_irq.c"
@@ -292,7 +292,7 @@ diva_interrupt(int intno, void *dev_id)
struct IsdnCardState *cs = dev_id;
u_char val, sval;
u_long flags;
int cnt=5;
int cnt = 5;
spin_lock_irqsave(&cs->lock, flags);
while (((sval = bytein(cs->hw.diva.ctrl)) & DIVA_IRQ_REQ) && cnt) {
@@ -320,9 +320,9 @@ static irqreturn_t
diva_irq_ipac_isa(int intno, void *dev_id)
{
struct IsdnCardState *cs = dev_id;
u_char ista,val;
u_char ista, val;
u_long flags;
int icnt=5;
int icnt = 5;
spin_lock_irqsave(&cs->lock, flags);
ista = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ISTA);
@@ -436,8 +436,8 @@ Memhscx_fill_fifo(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
int more, count, cnt;
int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags)? 64: 32;
u_char *ptr,*p;
int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags) ? 64 : 32;
u_char *ptr, *p;
if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
debugl1(cs, "hscx_fill_fifo");
@@ -459,9 +459,9 @@ Memhscx_fill_fifo(struct BCState *bcs)
skb_pull(bcs->tx_skb, count);
bcs->tx_cnt -= count;
bcs->hw.hscx.count += count;
while(cnt--)
while (cnt--)
memwritereg(cs->hw.diva.cfg_reg, bcs->hw.hscx.hscx ? 0x40 : 0,
*p++);
*p++);
MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, more ? 0x8 : 0xa);
if (cs->debug & L1_DEB_HSCX_FIFO) {
char *t = bcs->blog;
@@ -479,7 +479,7 @@ Memhscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
u_char r;
struct BCState *bcs = cs->bcs + hscx;
struct sk_buff *skb;
int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags)? 64: 32;
int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags) ? 64 : 32;
int count;
if (!test_bit(BC_FLG_INIT, &bcs->Flag))
@@ -501,7 +501,7 @@ Memhscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
MemWriteHSCXCMDR(cs, hscx, 0x80);
} else {
count = MemReadHSCX(cs, hscx, HSCX_RBCL) & (
test_bit(HW_IPAC, &cs->HW_Flags)? 0x3f: 0x1f);
test_bit(HW_IPAC, &cs->HW_Flags) ? 0x3f : 0x1f);
if (count == 0)
count = fifo_size;
Memhscx_empty_fifo(bcs, count);
@@ -539,8 +539,8 @@ Memhscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
Memhscx_fill_fifo(bcs);
return;
} else {
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
u_long flags;
spin_lock_irqsave(&bcs->aclock, flags);
bcs->ackcnt += bcs->hw.hscx.count;
@@ -548,7 +548,7 @@ Memhscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
schedule_event(bcs, B_ACKPENDING);
}
dev_kfree_skb_irq(bcs->tx_skb);
bcs->hw.hscx.count = 0;
bcs->hw.hscx.count = 0;
bcs->tx_skb = NULL;
}
}
@@ -578,7 +578,7 @@ Memhscx_int_main(struct IsdnCardState *cs, u_char val)
Memhscx_fill_fifo(bcs);
else {
/* Here we lost an TX interrupt, so
* restart transmitting the whole frame.
* restart transmitting the whole frame.
*/
if (bcs->tx_skb) {
skb_push(bcs->tx_skb, bcs->hw.hscx.count);
@@ -605,7 +605,7 @@ Memhscx_int_main(struct IsdnCardState *cs, u_char val)
Memhscx_fill_fifo(bcs);
else {
/* Here we lost an TX interrupt, so
* restart transmitting the whole frame.
* restart transmitting the whole frame.
*/
if (bcs->tx_skb) {
skb_push(bcs->tx_skb, bcs->hw.hscx.count);
@@ -631,8 +631,8 @@ static irqreturn_t
diva_irq_ipac_pci(int intno, void *dev_id)
{
struct IsdnCardState *cs = dev_id;
u_char ista,val;
int icnt=5;
u_char ista, val;
int icnt = 5;
u_char *cfg;
u_long flags;
@@ -693,11 +693,11 @@ diva_irq_ipacx_pci(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
cfg = (u_char *) cs->hw.diva.pci_cfg;
val = *cfg;
if (!(val &PITA_INT0_STATUS)) {
if (!(val & PITA_INT0_STATUS)) {
spin_unlock_irqrestore(&cs->lock, flags);
return IRQ_NONE; // other shared IRQ
}
interrupt_ipacx(cs); // handler for chip
interrupt_ipacx(cs); // handler for chip
*cfg = PITA_INT0_STATUS; // Reset PLX interrupt
spin_unlock_irqrestore(&cs->lock, flags);
return IRQ_HANDLED;
@@ -708,11 +708,11 @@ release_io_diva(struct IsdnCardState *cs)
{
int bytecnt;
if ((cs->subtyp == DIVA_IPAC_PCI) ||
(cs->subtyp == DIVA_IPACX_PCI) ) {
if ((cs->subtyp == DIVA_IPAC_PCI) ||
(cs->subtyp == DIVA_IPACX_PCI)) {
u_int *cfg = (unsigned int *)cs->hw.diva.pci_cfg;
*cfg = 0; /* disable INT0/1 */
*cfg = 0; /* disable INT0/1 */
*cfg = 2; /* reset pending INT0 */
if (cs->hw.diva.cfg_reg)
iounmap((void *)cs->hw.diva.cfg_reg);
@@ -761,7 +761,7 @@ reset_diva(struct IsdnCardState *cs)
writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xc0);
} else if (cs->subtyp == DIVA_IPAC_PCI) {
unsigned int *ireg = (unsigned int *)(cs->hw.diva.pci_cfg +
PITA_MISC_REG);
PITA_MISC_REG);
*ireg = PITA_PARA_SOFTRESET | PITA_PARA_MPX_MODE;
mdelay(10);
*ireg = PITA_PARA_MPX_MODE;
@@ -769,7 +769,7 @@ reset_diva(struct IsdnCardState *cs)
memwritereg(cs->hw.diva.cfg_reg, IPAC_MASK, 0xc0);
} else if (cs->subtyp == DIVA_IPACX_PCI) {
unsigned int *ireg = (unsigned int *)(cs->hw.diva.pci_cfg +
PITA_MISC_REG);
PITA_MISC_REG);
*ireg = PITA_PARA_SOFTRESET | PITA_PARA_MPX_MODE;
mdelay(10);
*ireg = PITA_PARA_MPX_MODE | PITA_SER_SOFTRESET;
@@ -802,7 +802,7 @@ diva_led_handler(struct IsdnCardState *cs)
if ((cs->subtyp == DIVA_IPAC_ISA) ||
(cs->subtyp == DIVA_IPAC_PCI) ||
(cs->subtyp == DIVA_IPACX_PCI) )
(cs->subtyp == DIVA_IPACX_PCI))
return;
del_timer(&cs->hw.diva.tl);
if (cs->hw.diva.status & DIVA_ASSIGN)
@@ -822,7 +822,7 @@ diva_led_handler(struct IsdnCardState *cs)
blink = 500;
} else
cs->hw.diva.ctrl_reg &= ~((DIVA_ISA == cs->subtyp) ?
DIVA_ISA_LED_B : DIVA_PCI_LED_B);
DIVA_ISA_LED_B : DIVA_PCI_LED_B);
byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);
if (blink) {
@@ -839,69 +839,69 @@ Diva_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_diva(cs);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_diva(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_diva(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
reset_diva(cs);
if (cs->subtyp == DIVA_IPACX_PCI) {
ireg = (unsigned int *)cs->hw.diva.pci_cfg;
*ireg = PITA_INT0_ENABLE;
init_ipacx(cs, 3); // init chip and enable interrupts
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_diva(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
reset_diva(cs);
if (cs->subtyp == DIVA_IPACX_PCI) {
ireg = (unsigned int *)cs->hw.diva.pci_cfg;
*ireg = PITA_INT0_ENABLE;
init_ipacx(cs, 3); // init chip and enable interrupts
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
}
if (cs->subtyp == DIVA_IPAC_PCI) {
ireg = (unsigned int *)cs->hw.diva.pci_cfg;
*ireg = PITA_INT0_ENABLE;
}
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case (MDL_REMOVE | REQUEST):
cs->hw.diva.status = 0;
break;
case (MDL_ASSIGN | REQUEST):
cs->hw.diva.status |= DIVA_ASSIGN;
break;
case MDL_INFO_SETUP:
if ((long)arg)
cs->hw.diva.status |= 0x0200;
else
cs->hw.diva.status |= 0x0100;
break;
case MDL_INFO_CONN:
if ((long)arg)
cs->hw.diva.status |= 0x2000;
else
cs->hw.diva.status |= 0x1000;
break;
case MDL_INFO_REL:
if ((long)arg) {
cs->hw.diva.status &= ~0x2000;
cs->hw.diva.status &= ~0x0200;
} else {
cs->hw.diva.status &= ~0x1000;
cs->hw.diva.status &= ~0x0100;
}
break;
return (0);
}
if (cs->subtyp == DIVA_IPAC_PCI) {
ireg = (unsigned int *)cs->hw.diva.pci_cfg;
*ireg = PITA_INT0_ENABLE;
}
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
case (MDL_REMOVE | REQUEST):
cs->hw.diva.status = 0;
break;
case (MDL_ASSIGN | REQUEST):
cs->hw.diva.status |= DIVA_ASSIGN;
break;
case MDL_INFO_SETUP:
if ((long)arg)
cs->hw.diva.status |= 0x0200;
else
cs->hw.diva.status |= 0x0100;
break;
case MDL_INFO_CONN:
if ((long)arg)
cs->hw.diva.status |= 0x2000;
else
cs->hw.diva.status |= 0x1000;
break;
case MDL_INFO_REL:
if ((long)arg) {
cs->hw.diva.status &= ~0x2000;
cs->hw.diva.status &= ~0x0200;
} else {
cs->hw.diva.status &= ~0x1000;
cs->hw.diva.status &= ~0x0100;
}
break;
}
if ((cs->subtyp != DIVA_IPAC_ISA) &&
if ((cs->subtyp != DIVA_IPAC_ISA) &&
(cs->subtyp != DIVA_IPAC_PCI) &&
(cs->subtyp != DIVA_IPACX_PCI)) {
spin_lock_irqsave(&cs->lock, flags);
spin_lock_irqsave(&cs->lock, flags);
diva_led_handler(cs);
spin_unlock_irqrestore(&cs->lock, flags);
}
return(0);
return (0);
}
static int __devinit setup_diva_common(struct IsdnCardState *cs)
@@ -915,21 +915,21 @@ static int __devinit setup_diva_common(struct IsdnCardState *cs)
bytecnt = 32;
printk(KERN_INFO
"Diva: %s card configured at %#lx IRQ %d\n",
(cs->subtyp == DIVA_PCI) ? "PCI" :
(cs->subtyp == DIVA_ISA) ? "ISA" :
(cs->subtyp == DIVA_IPAC_ISA) ? "IPAC ISA" :
(cs->subtyp == DIVA_IPAC_PCI) ? "IPAC PCI" : "IPACX PCI",
cs->hw.diva.cfg_reg, cs->irq);
if ((cs->subtyp == DIVA_IPAC_PCI) ||
(cs->subtyp == DIVA_IPACX_PCI) ||
(cs->subtyp == DIVA_PCI) )
"Diva: %s card configured at %#lx IRQ %d\n",
(cs->subtyp == DIVA_PCI) ? "PCI" :
(cs->subtyp == DIVA_ISA) ? "ISA" :
(cs->subtyp == DIVA_IPAC_ISA) ? "IPAC ISA" :
(cs->subtyp == DIVA_IPAC_PCI) ? "IPAC PCI" : "IPACX PCI",
cs->hw.diva.cfg_reg, cs->irq);
if ((cs->subtyp == DIVA_IPAC_PCI) ||
(cs->subtyp == DIVA_IPACX_PCI) ||
(cs->subtyp == DIVA_PCI))
printk(KERN_INFO "Diva: %s space at %#lx\n",
(cs->subtyp == DIVA_PCI) ? "PCI" :
(cs->subtyp == DIVA_IPAC_PCI) ? "IPAC PCI" : "IPACX PCI",
cs->hw.diva.pci_cfg);
(cs->subtyp == DIVA_PCI) ? "PCI" :
(cs->subtyp == DIVA_IPAC_PCI) ? "IPAC PCI" : "IPACX PCI",
cs->hw.diva.pci_cfg);
if ((cs->subtyp != DIVA_IPAC_PCI) &&
(cs->subtyp != DIVA_IPACX_PCI) ) {
(cs->subtyp != DIVA_IPACX_PCI)) {
if (!request_region(cs->hw.diva.cfg_reg, bytecnt, "diva isdn")) {
printk(KERN_WARNING
"HiSax: %s config port %lx-%lx already in use\n",
@@ -973,8 +973,8 @@ static int __devinit setup_diva_common(struct IsdnCardState *cs)
cs->BC_Write_Reg = &MemWriteHSCX_IPACX;
cs->BC_Send_Data = NULL; // function located in ipacx module
cs->irq_func = &diva_irq_ipacx_pci;
printk(KERN_INFO "Diva: IPACX Design Id: %x\n",
MemReadISAC_IPACX(cs, IPACX_ID) &0x3F);
printk(KERN_INFO "Diva: IPACX Design Id: %x\n",
MemReadISAC_IPACX(cs, IPACX_ID) & 0x3F);
} else { /* DIVA 2.0 */
cs->hw.diva.tl.function = (void *) diva_led_handler;
cs->hw.diva.tl.data = (long) cs;
@@ -987,7 +987,7 @@ static int __devinit setup_diva_common(struct IsdnCardState *cs)
ISACVersion(cs, "Diva:");
if (HscxVersion(cs, "Diva:")) {
printk(KERN_WARNING
"Diva: wrong HSCX versions check IO address\n");
"Diva: wrong HSCX versions check IO address\n");
release_io_diva(cs);
return (0);
}
@@ -1008,9 +1008,9 @@ static int __devinit setup_diva_isa(struct IsdnCard *card)
cs->hw.diva.ctrl_reg = 0;
cs->hw.diva.cfg_reg = card->para[1];
val = readreg(cs->hw.diva.cfg_reg + DIVA_IPAC_ADR,
cs->hw.diva.cfg_reg + DIVA_IPAC_DATA, IPAC_ID);
cs->hw.diva.cfg_reg + DIVA_IPAC_DATA, IPAC_ID);
printk(KERN_INFO "Diva: IPAC version %x\n", val);
if ((val == 1) || (val==2)) {
if ((val == 1) || (val == 2)) {
cs->subtyp = DIVA_IPAC_ISA;
cs->hw.diva.ctrl = 0;
cs->hw.diva.isac = card->para[1] + DIVA_IPAC_DATA;
@@ -1043,22 +1043,22 @@ static int __devinit setup_diva_isa(struct IsdnCard *card)
#ifdef __ISAPNP__
static struct isapnp_device_id diva_ids[] __devinitdata = {
{ ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51),
ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51),
ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51),
(unsigned long) "Diva picola" },
{ ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51),
ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0x51),
ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0x51),
(unsigned long) "Diva picola" },
{ ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71),
ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71),
ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71),
(unsigned long) "Diva 2.0" },
{ ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71),
ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0x71),
ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0x71),
(unsigned long) "Diva 2.0" },
{ ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1),
ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1),
ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1),
(unsigned long) "Diva 2.01" },
{ ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1),
ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0xA1),
ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0xA1),
(unsigned long) "Diva 2.01" },
{ 0, }
};
@@ -1074,30 +1074,30 @@ static int __devinit setup_diva_isapnp(struct IsdnCard *card)
if (!isapnp_present())
return (-1); /* card not found; continue search */
while(ipid->card_vendor) {
while (ipid->card_vendor) {
if ((pnp_c = pnp_find_card(ipid->card_vendor,
ipid->card_device, pnp_c))) {
ipid->card_device, pnp_c))) {
pnp_d = NULL;
if ((pnp_d = pnp_find_dev(pnp_c,
ipid->vendor, ipid->function, pnp_d))) {
ipid->vendor, ipid->function, pnp_d))) {
int err;
printk(KERN_INFO "HiSax: %s detected\n",
(char *)ipid->driver_data);
(char *)ipid->driver_data);
pnp_disable_dev(pnp_d);
err = pnp_activate_dev(pnp_d);
if (err<0) {
if (err < 0) {
printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
__func__, err);
return(0);
__func__, err);
return (0);
}
card->para[1] = pnp_port_start(pnp_d, 0);
card->para[0] = pnp_irq(pnp_d, 0);
if (!card->para[0] || !card->para[1]) {
printk(KERN_ERR "Diva PnP:some resources are missing %ld/%lx\n",
card->para[0], card->para[1]);
pnp_disable_dev(pnp_d);
return(0);
card->para[0], card->para[1]);
pnp_disable_dev(pnp_d);
return (0);
}
cs->hw.diva.cfg_reg = card->para[1];
cs->irq = card->para[0];
@@ -1129,12 +1129,12 @@ static int __devinit setup_diva_isapnp(struct IsdnCard *card)
return (1); /* card found */
} else {
printk(KERN_ERR "Diva PnP: PnP error card found, no device\n");
return(0);
return (0);
}
}
ipid++;
pnp_c=NULL;
}
pnp_c = NULL;
}
return (-1); /* card not found; continue search */
}
@@ -1160,23 +1160,23 @@ static int __devinit setup_diva_pci(struct IsdnCard *card)
cs->subtyp = 0;
if ((dev_diva = hisax_find_pci_device(PCI_VENDOR_ID_EICON,
PCI_DEVICE_ID_EICON_DIVA20, dev_diva))) {
PCI_DEVICE_ID_EICON_DIVA20, dev_diva))) {
if (pci_enable_device(dev_diva))
return(0);
return (0);
cs->subtyp = DIVA_PCI;
cs->irq = dev_diva->irq;
cs->hw.diva.cfg_reg = pci_resource_start(dev_diva, 2);
} else if ((dev_diva_u = hisax_find_pci_device(PCI_VENDOR_ID_EICON,
PCI_DEVICE_ID_EICON_DIVA20_U, dev_diva_u))) {
PCI_DEVICE_ID_EICON_DIVA20_U, dev_diva_u))) {
if (pci_enable_device(dev_diva_u))
return(0);
return (0);
cs->subtyp = DIVA_PCI;
cs->irq = dev_diva_u->irq;
cs->hw.diva.cfg_reg = pci_resource_start(dev_diva_u, 2);
} else if ((dev_diva201 = hisax_find_pci_device(PCI_VENDOR_ID_EICON,
PCI_DEVICE_ID_EICON_DIVA201, dev_diva201))) {
PCI_DEVICE_ID_EICON_DIVA201, dev_diva201))) {
if (pci_enable_device(dev_diva201))
return(0);
return (0);
cs->subtyp = DIVA_IPAC_PCI;
cs->irq = dev_diva201->irq;
cs->hw.diva.pci_cfg =
@@ -1184,9 +1184,9 @@ static int __devinit setup_diva_pci(struct IsdnCard *card)
cs->hw.diva.cfg_reg =
(ulong) ioremap(pci_resource_start(dev_diva201, 1), 4096);
} else if ((dev_diva202 = hisax_find_pci_device(PCI_VENDOR_ID_EICON,
PCI_DEVICE_ID_EICON_DIVA202, dev_diva202))) {
PCI_DEVICE_ID_EICON_DIVA202, dev_diva202))) {
if (pci_enable_device(dev_diva202))
return(0);
return (0);
cs->subtyp = DIVA_IPACX_PCI;
cs->irq = dev_diva202->irq;
cs->hw.diva.pci_cfg =
@@ -1200,18 +1200,18 @@ static int __devinit setup_diva_pci(struct IsdnCard *card)
if (!cs->irq) {
printk(KERN_WARNING "Diva: No IRQ for PCI card found\n");
iounmap_diva(cs);
return(0);
return (0);
}
if (!cs->hw.diva.cfg_reg) {
printk(KERN_WARNING "Diva: No IO-Adr for PCI card found\n");
iounmap_diva(cs);
return(0);
return (0);
}
cs->irq_flags |= IRQF_SHARED;
if ((cs->subtyp == DIVA_IPAC_PCI) ||
(cs->subtyp == DIVA_IPACX_PCI) ) {
(cs->subtyp == DIVA_IPACX_PCI)) {
cs->hw.diva.ctrl = 0;
cs->hw.diva.isac = 0;
cs->hw.diva.hscx = 0;
@@ -1248,7 +1248,7 @@ setup_diva(struct IsdnCard *card)
strcpy(tmp, Diva_revision);
printk(KERN_INFO "HiSax: Eicon.Diehl Diva driver Rev. %s\n", HiSax_getrev(tmp));
if (cs->typ != ISDN_CTYPE_DIEHLDIVA)
return(0);
return (0);
cs->hw.diva.status = 0;
rc = setup_diva_isa(card);
@@ -1276,7 +1276,7 @@ setup_diva(struct IsdnCard *card)
ready:
if (!have_card) {
printk(KERN_WARNING "Diva: No ISA, ISAPNP or PCI card found\n");
return(0);
return (0);
}
return setup_diva_common(card->cs);

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -34,14 +34,14 @@
static const char *Elsa_revision = "$Revision: 2.32.2.4 $";
static const char *Elsa_Types[] =
{"None", "PC", "PCC-8", "PCC-16", "PCF", "PCF-Pro",
"PCMCIA", "QS 1000", "QS 3000", "Microlink PCI", "QS 3000 PCI",
"PCMCIA", "QS 1000", "QS 3000", "Microlink PCI", "QS 3000 PCI",
"PCMCIA-IPAC" };
static const char *ITACVer[] =
{"?0?", "?1?", "?2?", "?3?", "?4?", "V2.2",
"B1", "A1"};
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
#define ELSA_ISAC 0
@@ -113,25 +113,25 @@ static const char *ITACVer[] =
#if ARCOFI_USE
static struct arcofi_msg ARCOFI_XOP_F =
{NULL,0,2,{0xa1,0x3f,0,0,0,0,0,0,0,0}}; /* Normal OP */
{NULL,0,2,{0xa1,0x3f,0,0,0,0,0,0,0,0}}; /* Normal OP */
static struct arcofi_msg ARCOFI_XOP_1 =
{&ARCOFI_XOP_F,0,2,{0xa1,0x31,0,0,0,0,0,0,0,0}}; /* PWR UP */
static struct arcofi_msg ARCOFI_SOP_F =
{&ARCOFI_XOP_1,0,10,{0xa1,0x1f,0x00,0x50,0x10,0x00,0x00,0x80,0x02,0x12}};
{&ARCOFI_XOP_F,0,2,{0xa1,0x31,0,0,0,0,0,0,0,0}}; /* PWR UP */
static struct arcofi_msg ARCOFI_SOP_F =
{&ARCOFI_XOP_1,0,10,{0xa1,0x1f,0x00,0x50,0x10,0x00,0x00,0x80,0x02,0x12}};
static struct arcofi_msg ARCOFI_COP_9 =
{&ARCOFI_SOP_F,0,10,{0xa1,0x29,0x80,0xcb,0xe9,0x88,0x00,0xc8,0xd8,0x80}}; /* RX */
{&ARCOFI_SOP_F,0,10,{0xa1,0x29,0x80,0xcb,0xe9,0x88,0x00,0xc8,0xd8,0x80}}; /* RX */
static struct arcofi_msg ARCOFI_COP_8 =
{&ARCOFI_COP_9,0,10,{0xa1,0x28,0x49,0x31,0x8,0x13,0x6e,0x88,0x2a,0x61}}; /* TX */
{&ARCOFI_COP_9,0,10,{0xa1,0x28,0x49,0x31,0x8,0x13,0x6e,0x88,0x2a,0x61}}; /* TX */
static struct arcofi_msg ARCOFI_COP_7 =
{&ARCOFI_COP_8,0,4,{0xa1,0x27,0x80,0x80,0,0,0,0,0,0}}; /* GZ */
{&ARCOFI_COP_8,0,4,{0xa1,0x27,0x80,0x80,0,0,0,0,0,0}}; /* GZ */
static struct arcofi_msg ARCOFI_COP_6 =
{&ARCOFI_COP_7,0,6,{0xa1,0x26,0,0,0x82,0x7c,0,0,0,0}}; /* GRL GRH */
{&ARCOFI_COP_7,0,6,{0xa1,0x26,0,0,0x82,0x7c,0,0,0,0}}; /* GRL GRH */
static struct arcofi_msg ARCOFI_COP_5 =
{&ARCOFI_COP_6,0,4,{0xa1,0x25,0xbb,0x4a,0,0,0,0,0,0}}; /* GTX */
{&ARCOFI_COP_6,0,4,{0xa1,0x25,0xbb,0x4a,0,0,0,0,0,0}}; /* GTX */
static struct arcofi_msg ARCOFI_VERSION =
{NULL,1,2,{0xa0,0,0,0,0,0,0,0,0,0}};
{NULL,1,2,{0xa0,0,0,0,0,0,0,0,0,0}};
static struct arcofi_msg ARCOFI_XOP_0 =
{NULL,0,2,{0xa1,0x30,0,0,0,0,0,0,0,0}}; /* PWR Down */
{NULL,0,2,{0xa1,0x30,0,0,0,0,0,0,0,0}}; /* PWR Down */
static void set_arcofi(struct IsdnCardState *cs, int bc);
@@ -149,7 +149,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
}
static inline void
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
insb(adr, data, size);
@@ -164,7 +164,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
}
static inline void
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
outsb(adr, data, size);
@@ -185,13 +185,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0, data, size);
}
@@ -199,23 +199,23 @@ WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
static u_char
ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset)
{
return (readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset+0x80));
return (readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset + 0x80));
}
static void
WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value)
{
writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset|0x80, value);
writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset | 0x80, value);
}
static void
ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0x80, data, size);
}
static void
WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0x80, data, size);
}
@@ -267,16 +267,16 @@ TimerRun(struct IsdnCardState *cs)
* fast interrupt HSCX stuff goes here
*/
#define READHSCX(cs, nr, reg) readreg(cs->hw.elsa.ale, \
cs->hw.elsa.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.elsa.ale, \
cs->hw.elsa.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCX(cs, nr, reg) readreg(cs->hw.elsa.ale, \
cs->hw.elsa.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.elsa.ale, \
cs->hw.elsa.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.elsa.ale, \
cs->hw.elsa.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.elsa.ale, \
cs->hw.elsa.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.elsa.ale, \
cs->hw.elsa.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.elsa.ale, \
cs->hw.elsa.hscx, (nr ? 0x40 : 0), ptr, cnt)
#include "hscx_irq.c"
@@ -286,11 +286,11 @@ elsa_interrupt(int intno, void *dev_id)
struct IsdnCardState *cs = dev_id;
u_long flags;
u_char val;
int icnt=5;
int icnt = 5;
if ((cs->typ == ISDN_CTYPE_ELSA_PCMCIA) && (*cs->busy_flag == 1)) {
/* The card tends to generate interrupts while being removed
causing us to just crash the kernel. bad. */
/* The card tends to generate interrupts while being removed
causing us to just crash the kernel. bad. */
printk(KERN_WARNING "Elsa: card not available!\n");
return IRQ_NONE;
}
@@ -299,18 +299,18 @@ elsa_interrupt(int intno, void *dev_id)
if (cs->hw.elsa.MFlag) {
val = serial_inp(cs, UART_IIR);
if (!(val & UART_IIR_NO_INT)) {
debugl1(cs,"IIR %02x", val);
debugl1(cs, "IIR %02x", val);
rs_interrupt_elsa(cs);
}
}
#endif
val = readreg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_ISTA + 0x40);
Start_HSCX:
Start_HSCX:
if (val) {
hscx_int_main(cs, val);
}
val = readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val) {
isac_interrupt(cs, val);
}
@@ -364,8 +364,8 @@ elsa_interrupt_ipac(int intno, void *dev_id)
{
struct IsdnCardState *cs = dev_id;
u_long flags;
u_char ista,val;
int icnt=5;
u_char ista, val;
int icnt = 5;
spin_lock_irqsave(&cs->lock, flags);
if (cs->subtyp == ELSA_QS1000PCI || cs->subtyp == ELSA_QS3000PCI) {
@@ -379,7 +379,7 @@ elsa_interrupt_ipac(int intno, void *dev_id)
if (cs->hw.elsa.MFlag) {
val = serial_inp(cs, UART_IIR);
if (!(val & UART_IIR_NO_INT)) {
debugl1(cs,"IIR %02x", val);
debugl1(cs, "IIR %02x", val);
rs_interrupt_elsa(cs);
}
}
@@ -444,13 +444,13 @@ release_io_elsa(struct IsdnCardState *cs)
writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, IPAC_ATX, 0xff);
release_region(cs->hw.elsa.cfg, 0x80);
}
if (cs->subtyp == ELSA_PCMCIA_IPAC) {
if (cs->subtyp == ELSA_PCMCIA_IPAC) {
writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, IPAC_ATX, 0xff);
}
}
if ((cs->subtyp == ELSA_PCFPRO) ||
(cs->subtyp == ELSA_QS3000) ||
(cs->subtyp == ELSA_PCF) ||
(cs->subtyp == ELSA_QS3000PCI)) {
(cs->subtyp == ELSA_QS3000) ||
(cs->subtyp == ELSA_PCF) ||
(cs->subtyp == ELSA_QS3000PCI)) {
bytecnt = 16;
#if ARCOFI_USE
release_modem(cs);
@@ -521,84 +521,84 @@ check_arcofi(struct IsdnCardState *cs)
u_char *p;
if (!cs->dc.isac.mon_tx)
if (!(cs->dc.isac.mon_tx=kmalloc(MAX_MON_FRAME, GFP_ATOMIC))) {
if (!(cs->dc.isac.mon_tx = kmalloc(MAX_MON_FRAME, GFP_ATOMIC))) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "ISAC MON TX out of buffers!");
return(0);
return (0);
}
cs->dc.isac.arcofi_bc = 0;
arcofi_fsm(cs, ARCOFI_START, &ARCOFI_VERSION);
interruptible_sleep_on(&cs->dc.isac.arcofi_wait);
if (!test_and_clear_bit(FLG_ARCOFI_ERROR, &cs->HW_Flags)) {
debugl1(cs, "Arcofi response received %d bytes", cs->dc.isac.mon_rxp);
p = cs->dc.isac.mon_rx;
t = tmp;
t += sprintf(tmp, "Arcofi data");
QuickHex(t, p, cs->dc.isac.mon_rxp);
debugl1(cs, tmp);
if ((cs->dc.isac.mon_rxp == 2) && (cs->dc.isac.mon_rx[0] == 0xa0)) {
switch(cs->dc.isac.mon_rx[1]) {
case 0x80:
debugl1(cs, "Arcofi 2160 detected");
arcofi_present = 1;
break;
case 0x82:
debugl1(cs, "Arcofi 2165 detected");
arcofi_present = 2;
break;
case 0x84:
debugl1(cs, "Arcofi 2163 detected");
arcofi_present = 3;
break;
default:
debugl1(cs, "unknown Arcofi response");
break;
}
} else
debugl1(cs, "undefined Monitor response");
cs->dc.isac.mon_rxp = 0;
debugl1(cs, "Arcofi response received %d bytes", cs->dc.isac.mon_rxp);
p = cs->dc.isac.mon_rx;
t = tmp;
t += sprintf(tmp, "Arcofi data");
QuickHex(t, p, cs->dc.isac.mon_rxp);
debugl1(cs, tmp);
if ((cs->dc.isac.mon_rxp == 2) && (cs->dc.isac.mon_rx[0] == 0xa0)) {
switch (cs->dc.isac.mon_rx[1]) {
case 0x80:
debugl1(cs, "Arcofi 2160 detected");
arcofi_present = 1;
break;
case 0x82:
debugl1(cs, "Arcofi 2165 detected");
arcofi_present = 2;
break;
case 0x84:
debugl1(cs, "Arcofi 2163 detected");
arcofi_present = 3;
break;
default:
debugl1(cs, "unknown Arcofi response");
break;
}
} else
debugl1(cs, "undefined Monitor response");
cs->dc.isac.mon_rxp = 0;
} else if (cs->dc.isac.mon_tx) {
debugl1(cs, "Arcofi not detected");
}
if (arcofi_present) {
if (cs->subtyp==ELSA_QS1000) {
if (cs->subtyp == ELSA_QS1000) {
cs->subtyp = ELSA_QS3000;
printk(KERN_INFO
"Elsa: %s detected modem at 0x%lx\n",
Elsa_Types[cs->subtyp],
cs->hw.elsa.base+8);
"Elsa: %s detected modem at 0x%lx\n",
Elsa_Types[cs->subtyp],
cs->hw.elsa.base + 8);
release_region(cs->hw.elsa.base, 8);
if (!request_region(cs->hw.elsa.base, 16, "elsa isdn modem")) {
printk(KERN_WARNING
"HiSax: %s config port %lx-%lx already in use\n",
Elsa_Types[cs->subtyp],
cs->hw.elsa.base + 8,
cs->hw.elsa.base + 16);
"HiSax: %s config port %lx-%lx already in use\n",
Elsa_Types[cs->subtyp],
cs->hw.elsa.base + 8,
cs->hw.elsa.base + 16);
}
} else if (cs->subtyp==ELSA_PCC16) {
} else if (cs->subtyp == ELSA_PCC16) {
cs->subtyp = ELSA_PCF;
printk(KERN_INFO
"Elsa: %s detected modem at 0x%lx\n",
Elsa_Types[cs->subtyp],
cs->hw.elsa.base+8);
"Elsa: %s detected modem at 0x%lx\n",
Elsa_Types[cs->subtyp],
cs->hw.elsa.base + 8);
release_region(cs->hw.elsa.base, 8);
if (!request_region(cs->hw.elsa.base, 16, "elsa isdn modem")) {
printk(KERN_WARNING
"HiSax: %s config port %lx-%lx already in use\n",
Elsa_Types[cs->subtyp],
cs->hw.elsa.base + 8,
cs->hw.elsa.base + 16);
"HiSax: %s config port %lx-%lx already in use\n",
Elsa_Types[cs->subtyp],
cs->hw.elsa.base + 8,
cs->hw.elsa.base + 16);
}
} else
printk(KERN_INFO
"Elsa: %s detected modem at 0x%lx\n",
Elsa_Types[cs->subtyp],
cs->hw.elsa.base+8);
"Elsa: %s detected modem at 0x%lx\n",
Elsa_Types[cs->subtyp],
cs->hw.elsa.base + 8);
arcofi_fsm(cs, ARCOFI_START, &ARCOFI_XOP_0);
interruptible_sleep_on(&cs->dc.isac.arcofi_wait);
return(1);
return (1);
}
return(0);
return (0);
}
#endif /* ARCOFI_USE */
@@ -627,7 +627,7 @@ elsa_led_handler(struct IsdnCardState *cs)
cs->hw.elsa.ctrl_reg &= ~ELSA_LINE_LED;
if ((cs->subtyp == ELSA_QS1000PCI) ||
(cs->subtyp == ELSA_QS3000PCI)) {
(cs->subtyp == ELSA_QS3000PCI)) {
u_char led = 0xff;
if (cs->hw.elsa.ctrl_reg & ELSA_LINE_LED)
led ^= ELSA_IPAC_LINE_LED;
@@ -650,111 +650,111 @@ Elsa_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_elsa(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_elsa(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
cs->debug |= L1_DEB_IPAC;
reset_elsa(cs);
inithscxisac(cs, 1);
if ((cs->subtyp == ELSA_QS1000) ||
(cs->subtyp == ELSA_QS3000))
{
byteout(cs->hw.elsa.timer, 0);
}
if (cs->hw.elsa.trig)
byteout(cs->hw.elsa.trig, 0xff);
inithscxisac(cs, 2);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
if ((cs->subtyp == ELSA_PCMCIA) ||
(cs->subtyp == ELSA_PCMCIA_IPAC) ||
(cs->subtyp == ELSA_QS1000PCI)) {
return (0);
} else if (cs->subtyp == ELSA_QS3000PCI) {
ret = 0;
} else {
spin_lock_irqsave(&cs->lock, flags);
reset_elsa(cs);
cs->hw.elsa.counter = 0;
cs->hw.elsa.ctrl_reg |= ELSA_ENA_TIMER_INT;
cs->hw.elsa.status |= ELIRQF_TIMER_AKTIV;
byteout(cs->hw.elsa.ctrl, cs->hw.elsa.ctrl_reg);
byteout(cs->hw.elsa.timer, 0);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_elsa(cs);
return(0);
case CARD_INIT:
msleep(110);
spin_lock_irqsave(&cs->lock, flags);
cs->debug |= L1_DEB_IPAC;
reset_elsa(cs);
inithscxisac(cs, 1);
if ((cs->subtyp == ELSA_QS1000) ||
(cs->subtyp == ELSA_QS3000))
{
byteout(cs->hw.elsa.timer, 0);
}
if (cs->hw.elsa.trig)
byteout(cs->hw.elsa.trig, 0xff);
inithscxisac(cs, 2);
cs->hw.elsa.ctrl_reg &= ~ELSA_ENA_TIMER_INT;
byteout(cs->hw.elsa.ctrl, cs->hw.elsa.ctrl_reg);
cs->hw.elsa.status &= ~ELIRQF_TIMER_AKTIV;
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
if ((cs->subtyp == ELSA_PCMCIA) ||
(cs->subtyp == ELSA_PCMCIA_IPAC) ||
(cs->subtyp == ELSA_QS1000PCI)) {
return(0);
} else if (cs->subtyp == ELSA_QS3000PCI) {
printk(KERN_INFO "Elsa: %d timer tics in 110 msek\n",
cs->hw.elsa.counter);
if ((cs->hw.elsa.counter > 10) &&
(cs->hw.elsa.counter < 16)) {
printk(KERN_INFO "Elsa: timer and irq OK\n");
ret = 0;
} else {
spin_lock_irqsave(&cs->lock, flags);
cs->hw.elsa.counter = 0;
cs->hw.elsa.ctrl_reg |= ELSA_ENA_TIMER_INT;
cs->hw.elsa.status |= ELIRQF_TIMER_AKTIV;
byteout(cs->hw.elsa.ctrl, cs->hw.elsa.ctrl_reg);
byteout(cs->hw.elsa.timer, 0);
spin_unlock_irqrestore(&cs->lock, flags);
msleep(110);
spin_lock_irqsave(&cs->lock, flags);
cs->hw.elsa.ctrl_reg &= ~ELSA_ENA_TIMER_INT;
byteout(cs->hw.elsa.ctrl, cs->hw.elsa.ctrl_reg);
cs->hw.elsa.status &= ~ELIRQF_TIMER_AKTIV;
spin_unlock_irqrestore(&cs->lock, flags);
printk(KERN_INFO "Elsa: %d timer tics in 110 msek\n",
cs->hw.elsa.counter);
if ((cs->hw.elsa.counter > 10) &&
(cs->hw.elsa.counter < 16)) {
printk(KERN_INFO "Elsa: timer and irq OK\n");
ret = 0;
} else {
printk(KERN_WARNING
"Elsa: timer tic problem (%d/12) maybe an IRQ(%d) conflict\n",
cs->hw.elsa.counter, cs->irq);
ret = 1;
}
printk(KERN_WARNING
"Elsa: timer tic problem (%d/12) maybe an IRQ(%d) conflict\n",
cs->hw.elsa.counter, cs->irq);
ret = 1;
}
}
#if ARCOFI_USE
if (check_arcofi(cs)) {
init_modem(cs);
}
if (check_arcofi(cs)) {
init_modem(cs);
}
#endif
elsa_led_handler(cs);
return(ret);
case (MDL_REMOVE | REQUEST):
cs->hw.elsa.status &= 0;
break;
case (MDL_ASSIGN | REQUEST):
cs->hw.elsa.status |= ELSA_ASSIGN;
break;
case MDL_INFO_SETUP:
if ((long) arg)
cs->hw.elsa.status |= 0x0200;
else
cs->hw.elsa.status |= 0x0100;
break;
case MDL_INFO_CONN:
if ((long) arg)
cs->hw.elsa.status |= 0x2000;
else
cs->hw.elsa.status |= 0x1000;
break;
case MDL_INFO_REL:
if ((long) arg) {
cs->hw.elsa.status &= ~0x2000;
cs->hw.elsa.status &= ~0x0200;
} else {
cs->hw.elsa.status &= ~0x1000;
cs->hw.elsa.status &= ~0x0100;
}
break;
elsa_led_handler(cs);
return (ret);
case (MDL_REMOVE | REQUEST):
cs->hw.elsa.status &= 0;
break;
case (MDL_ASSIGN | REQUEST):
cs->hw.elsa.status |= ELSA_ASSIGN;
break;
case MDL_INFO_SETUP:
if ((long) arg)
cs->hw.elsa.status |= 0x0200;
else
cs->hw.elsa.status |= 0x0100;
break;
case MDL_INFO_CONN:
if ((long) arg)
cs->hw.elsa.status |= 0x2000;
else
cs->hw.elsa.status |= 0x1000;
break;
case MDL_INFO_REL:
if ((long) arg) {
cs->hw.elsa.status &= ~0x2000;
cs->hw.elsa.status &= ~0x0200;
} else {
cs->hw.elsa.status &= ~0x1000;
cs->hw.elsa.status &= ~0x0100;
}
break;
#if ARCOFI_USE
case CARD_AUX_IND:
if (cs->hw.elsa.MFlag) {
int len;
u_char *msg;
case CARD_AUX_IND:
if (cs->hw.elsa.MFlag) {
int len;
u_char *msg;
if (!arg)
return(0);
msg = arg;
len = *msg;
msg++;
modem_write_cmd(cs, msg, len);
}
break;
if (!arg)
return (0);
msg = arg;
len = *msg;
msg++;
modem_write_cmd(cs, msg, len);
}
break;
#endif
}
if (cs->typ == ISDN_CTYPE_ELSA) {
@@ -765,14 +765,14 @@ Elsa_card_msg(struct IsdnCardState *cs, int mt, void *arg)
cs->hw.elsa.status &= ~ELSA_BAD_PWR;
}
elsa_led_handler(cs);
return(ret);
return (ret);
}
static unsigned char
probe_elsa_adr(unsigned int adr, int typ)
{
int i, in1, in2, p16_1 = 0, p16_2 = 0, p8_1 = 0, p8_2 = 0, pc_1 = 0,
pc_2 = 0, pfp_1 = 0, pfp_2 = 0;
pc_2 = 0, pfp_1 = 0, pfp_2 = 0;
/* In case of the elsa pcmcia card, this region is in use,
reserved for us by the card manager. So we do not check it
@@ -822,7 +822,7 @@ probe_elsa(struct IsdnCardState *cs)
{
int i;
unsigned int CARD_portlist[] =
{0x160, 0x170, 0x260, 0x360, 0};
{0x160, 0x170, 0x260, 0x360, 0};
for (i = 0; CARD_portlist[i]; i++) {
if ((cs->subtyp = probe_elsa_adr(CARD_portlist[i], cs->typ)))
@@ -867,15 +867,15 @@ setup_elsa_isa(struct IsdnCard *card)
val = bytein(cs->hw.elsa.cfg);
if (cs->subtyp == ELSA_PC) {
const u_char CARD_IrqTab[8] =
{7, 3, 5, 9, 0, 0, 0, 0};
{7, 3, 5, 9, 0, 0, 0, 0};
cs->irq = CARD_IrqTab[(val & ELSA_IRQ_IDX_PC) >> 2];
} else if (cs->subtyp == ELSA_PCC8) {
const u_char CARD_IrqTab[8] =
{7, 3, 5, 9, 0, 0, 0, 0};
{7, 3, 5, 9, 0, 0, 0, 0};
cs->irq = CARD_IrqTab[(val & ELSA_IRQ_IDX_PCC8) >> 4];
} else {
const u_char CARD_IrqTab[8] =
{15, 10, 15, 3, 11, 5, 11, 9};
{15, 10, 15, 3, 11, 5, 11, 9};
cs->irq = CARD_IrqTab[(val & ELSA_IRQ_IDX) >> 3];
}
val = bytein(cs->hw.elsa.ale) & ELSA_HW_RELEASE;
@@ -894,7 +894,7 @@ setup_elsa_isa(struct IsdnCard *card)
val = bytein(cs->hw.elsa.ale) & ELSA_S0_POWER_BAD;
if (val) {
printk(KERN_WARNING
"Elsa: Microlink S0 bus power bad\n");
"Elsa: Microlink S0 bus power bad\n");
cs->hw.elsa.status |= ELSA_BAD_PWR;
}
@@ -904,10 +904,10 @@ setup_elsa_isa(struct IsdnCard *card)
#ifdef __ISAPNP__
static struct isapnp_device_id elsa_ids[] __devinitdata = {
{ ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0133),
ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0133),
ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0133),
(unsigned long) "Elsa QS1000" },
{ ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0134),
ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0134),
ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0134),
(unsigned long) "Elsa QS3000" },
{ 0, }
};
@@ -924,31 +924,31 @@ setup_elsa_isapnp(struct IsdnCard *card)
#ifdef __ISAPNP__
if (!card->para[1] && isapnp_present()) {
struct pnp_dev *pnp_d;
while(ipid->card_vendor) {
while (ipid->card_vendor) {
if ((pnp_c = pnp_find_card(ipid->card_vendor,
ipid->card_device, pnp_c))) {
ipid->card_device, pnp_c))) {
pnp_d = NULL;
if ((pnp_d = pnp_find_dev(pnp_c,
ipid->vendor, ipid->function, pnp_d))) {
ipid->vendor, ipid->function, pnp_d))) {
int err;
printk(KERN_INFO "HiSax: %s detected\n",
(char *)ipid->driver_data);
(char *)ipid->driver_data);
pnp_disable_dev(pnp_d);
err = pnp_activate_dev(pnp_d);
if (err<0) {
if (err < 0) {
printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
__func__, err);
return(0);
__func__, err);
return (0);
}
card->para[1] = pnp_port_start(pnp_d, 0);
card->para[0] = pnp_irq(pnp_d, 0);
if (!card->para[0] || !card->para[1]) {
printk(KERN_ERR "Elsa PnP:some resources are missing %ld/%lx\n",
card->para[0], card->para[1]);
card->para[0], card->para[1]);
pnp_disable_dev(pnp_d);
return(0);
return (0);
}
if (ipid->function == ISAPNP_FUNCTION(0x133))
cs->subtyp = ELSA_QS1000;
@@ -957,20 +957,20 @@ setup_elsa_isapnp(struct IsdnCard *card)
break;
} else {
printk(KERN_ERR "Elsa PnP: PnP error card found, no device\n");
return(0);
return (0);
}
}
ipid++;
pnp_c=NULL;
}
pnp_c = NULL;
}
if (!ipid->card_vendor) {
printk(KERN_INFO "Elsa PnP: no ISAPnP card found\n");
return(0);
return (0);
}
}
#endif /* __ISAPNP__ */
if (card->para[1] && card->para[0]) {
if (card->para[1] && card->para[0]) {
cs->hw.elsa.base = card->para[1];
cs->irq = card->para[0];
if (!cs->subtyp)
@@ -1027,8 +1027,8 @@ setup_elsa_pcmcia(struct IsdnCard *card)
}
#ifdef CONFIG_PCI
static struct pci_dev *dev_qs1000 __devinitdata = NULL;
static struct pci_dev *dev_qs3000 __devinitdata = NULL;
static struct pci_dev *dev_qs1000 __devinitdata = NULL;
static struct pci_dev *dev_qs3000 __devinitdata = NULL;
static int __devinit
setup_elsa_pci(struct IsdnCard *card)
@@ -1037,33 +1037,33 @@ setup_elsa_pci(struct IsdnCard *card)
cs->subtyp = 0;
if ((dev_qs1000 = hisax_find_pci_device(PCI_VENDOR_ID_ELSA,
PCI_DEVICE_ID_ELSA_MICROLINK, dev_qs1000))) {
PCI_DEVICE_ID_ELSA_MICROLINK, dev_qs1000))) {
if (pci_enable_device(dev_qs1000))
return(0);
return (0);
cs->subtyp = ELSA_QS1000PCI;
cs->irq = dev_qs1000->irq;
cs->hw.elsa.cfg = pci_resource_start(dev_qs1000, 1);
cs->hw.elsa.base = pci_resource_start(dev_qs1000, 3);
} else if ((dev_qs3000 = hisax_find_pci_device(PCI_VENDOR_ID_ELSA,
PCI_DEVICE_ID_ELSA_QS3000, dev_qs3000))) {
PCI_DEVICE_ID_ELSA_QS3000, dev_qs3000))) {
if (pci_enable_device(dev_qs3000))
return(0);
return (0);
cs->subtyp = ELSA_QS3000PCI;
cs->irq = dev_qs3000->irq;
cs->hw.elsa.cfg = pci_resource_start(dev_qs3000, 1);
cs->hw.elsa.base = pci_resource_start(dev_qs3000, 3);
} else {
printk(KERN_WARNING "Elsa: No PCI card found\n");
return(0);
return (0);
}
if (!cs->irq) {
printk(KERN_WARNING "Elsa: No IRQ for PCI card found\n");
return(0);
return (0);
}
if (!(cs->hw.elsa.base && cs->hw.elsa.cfg)) {
printk(KERN_WARNING "Elsa: No IO-Adr for PCI card found\n");
return(0);
return (0);
}
if ((cs->hw.elsa.cfg & 0xff) || (cs->hw.elsa.base & 0xf)) {
printk(KERN_WARNING "Elsa: You may have a wrong PCI bios\n");
@@ -1071,8 +1071,8 @@ setup_elsa_pci(struct IsdnCard *card)
printk(KERN_WARNING "Elsa: Documentation/isdn/README.HiSax\n");
}
cs->hw.elsa.ale = cs->hw.elsa.base;
cs->hw.elsa.isac = cs->hw.elsa.base +1;
cs->hw.elsa.hscx = cs->hw.elsa.base +1;
cs->hw.elsa.isac = cs->hw.elsa.base + 1;
cs->hw.elsa.hscx = cs->hw.elsa.base + 1;
test_and_set_bit(HW_IPAC, &cs->HW_Flags);
cs->hw.elsa.timer = 0;
cs->hw.elsa.trig = 0;
@@ -1104,27 +1104,27 @@ setup_elsa_common(struct IsdnCard *card)
int bytecnt;
switch (cs->subtyp) {
case ELSA_PC:
case ELSA_PCC8:
case ELSA_PCC16:
case ELSA_QS1000:
case ELSA_PCMCIA:
case ELSA_PCMCIA_IPAC:
bytecnt = 8;
break;
case ELSA_PCFPRO:
case ELSA_PCF:
case ELSA_QS3000:
case ELSA_QS3000PCI:
bytecnt = 16;
break;
case ELSA_QS1000PCI:
bytecnt = 2;
break;
default:
printk(KERN_WARNING
"Unknown ELSA subtype %d\n", cs->subtyp);
return (0);
case ELSA_PC:
case ELSA_PCC8:
case ELSA_PCC16:
case ELSA_QS1000:
case ELSA_PCMCIA:
case ELSA_PCMCIA_IPAC:
bytecnt = 8;
break;
case ELSA_PCFPRO:
case ELSA_PCF:
case ELSA_QS3000:
case ELSA_QS3000PCI:
bytecnt = 16;
break;
case ELSA_QS1000PCI:
bytecnt = 2;
break;
default:
printk(KERN_WARNING
"Unknown ELSA subtype %d\n", cs->subtyp);
return (0);
}
/* In case of the elsa pcmcia card, this region is in use,
reserved for us by the card manager. So we do not check it
@@ -1140,8 +1140,8 @@ setup_elsa_common(struct IsdnCard *card)
if (!request_region(cs->hw.elsa.cfg, 0x80, "elsa isdn pci")) {
printk(KERN_WARNING
"HiSax: ELSA pci port %x-%x already in use\n",
cs->hw.elsa.cfg,
cs->hw.elsa.cfg + 0x80);
cs->hw.elsa.cfg,
cs->hw.elsa.cfg + 0x80);
release_region(cs->hw.elsa.base, bytecnt);
return (0);
}
@@ -1166,7 +1166,7 @@ setup_elsa_common(struct IsdnCard *card)
return (0);
}
}
HZDELAY((HZ/100) + 1); /* wait >=10 ms */
HZDELAY((HZ / 100) + 1); /* wait >=10 ms */
if (TimerRun(cs)) {
printk(KERN_WARNING "Elsa: timer do not run down\n");
release_io_elsa(cs);
@@ -1195,7 +1195,7 @@ setup_elsa_common(struct IsdnCard *card)
ISACVersion(cs, "Elsa:");
if (HscxVersion(cs, "Elsa:")) {
printk(KERN_WARNING
"Elsa: wrong HSCX versions check IO address\n");
"Elsa: wrong HSCX versions check IO address\n");
release_io_elsa(cs);
return (0);
}
@@ -1244,7 +1244,7 @@ setup_elsa(struct IsdnCard *card)
if (!rc)
return (0);
} else
} else
return (0);
return setup_elsa_common(card);

Visa fil

@@ -1,39 +1,39 @@
/*======================================================================
An elsa_cs PCMCIA client driver
An elsa_cs PCMCIA client driver
This driver is for the Elsa PCM ISDN Cards, i.e. the MicroLink
This driver is for the Elsa PCM ISDN Cards, i.e. the MicroLink
The contents of this file are subject to the Mozilla Public
License Version 1.1 (the "License"); you may not use this file
except in compliance with the License. You may obtain a copy of
the License at http://www.mozilla.org/MPL/
The contents of this file are subject to the Mozilla Public
License Version 1.1 (the "License"); you may not use this file
except in compliance with the License. You may obtain a copy of
the License at http://www.mozilla.org/MPL/
Software distributed under the License is distributed on an "AS
IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
implied. See the License for the specific language governing
rights and limitations under the License.
Software distributed under the License is distributed on an "AS
IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
implied. See the License for the specific language governing
rights and limitations under the License.
The initial developer of the original code is David A. Hinds
<dahinds@users.sourceforge.net>. Portions created by David A. Hinds
are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
The initial developer of the original code is David A. Hinds
<dahinds@users.sourceforge.net>. Portions created by David A. Hinds
are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
Modifications from dummy_cs.c are Copyright (C) 1999-2001 Klaus
Lichtenwalder <Lichtenwalder@ACM.org>. All Rights Reserved.
Modifications from dummy_cs.c are Copyright (C) 1999-2001 Klaus
Lichtenwalder <Lichtenwalder@ACM.org>. All Rights Reserved.
Alternatively, the contents of this file may be used under the
terms of the GNU General Public License version 2 (the "GPL"), in
which case the provisions of the GPL are applicable instead of the
above. If you wish to allow the use of your version of this file
only under the terms of the GPL and not to allow others to use
your version of this file under the MPL, indicate your decision
by deleting the provisions above and replace them with the notice
and other provisions required by the GPL. If you do not delete
the provisions above, a recipient may use your version of this
file under either the MPL or the GPL.
Alternatively, the contents of this file may be used under the
terms of the GNU General Public License version 2 (the "GPL"), in
which case the provisions of the GPL are applicable instead of the
above. If you wish to allow the use of your version of this file
only under the terms of the GPL and not to allow others to use
your version of this file under the MPL, indicate your decision
by deleting the provisions above and replace them with the notice
and other provisions required by the GPL. If you do not delete
the provisions above, a recipient may use your version of this
file under either the MPL or the GPL.
======================================================================*/
======================================================================*/
#include <linux/module.h>
#include <linux/kernel.h>
@@ -63,32 +63,32 @@ MODULE_LICENSE("Dual MPL/GPL");
static int protocol = 2; /* EURO-ISDN Default */
module_param(protocol, int, 0);
static int elsa_cs_config(struct pcmcia_device *link) __devinit ;
static int elsa_cs_config(struct pcmcia_device *link) __devinit;
static void elsa_cs_release(struct pcmcia_device *link);
static void elsa_cs_detach(struct pcmcia_device *p_dev) __devexit;
typedef struct local_info_t {
struct pcmcia_device *p_dev;
int busy;
int cardnr;
int busy;
int cardnr;
} local_info_t;
static int __devinit elsa_cs_probe(struct pcmcia_device *link)
{
local_info_t *local;
local_info_t *local;
dev_dbg(&link->dev, "elsa_cs_attach()\n");
dev_dbg(&link->dev, "elsa_cs_attach()\n");
/* Allocate space for private device-specific data */
local = kzalloc(sizeof(local_info_t), GFP_KERNEL);
if (!local) return -ENOMEM;
/* Allocate space for private device-specific data */
local = kzalloc(sizeof(local_info_t), GFP_KERNEL);
if (!local) return -ENOMEM;
local->p_dev = link;
link->priv = local;
local->p_dev = link;
link->priv = local;
local->cardnr = -1;
local->cardnr = -1;
return elsa_cs_config(link);
return elsa_cs_config(link);
} /* elsa_cs_attach */
static void __devexit elsa_cs_detach(struct pcmcia_device *link)
@@ -129,64 +129,64 @@ static int elsa_cs_configcheck(struct pcmcia_device *p_dev, void *priv_data)
static int __devinit elsa_cs_config(struct pcmcia_device *link)
{
int i;
IsdnCard_t icard;
int i;
IsdnCard_t icard;
dev_dbg(&link->dev, "elsa_config(0x%p)\n", link);
dev_dbg(&link->dev, "elsa_config(0x%p)\n", link);
link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
i = pcmcia_loop_config(link, elsa_cs_configcheck, NULL);
if (i != 0)
goto failed;
i = pcmcia_loop_config(link, elsa_cs_configcheck, NULL);
if (i != 0)
goto failed;
if (!link->irq)
goto failed;
if (!link->irq)
goto failed;
i = pcmcia_enable_device(link);
if (i != 0)
goto failed;
i = pcmcia_enable_device(link);
if (i != 0)
goto failed;
icard.para[0] = link->irq;
icard.para[1] = link->resource[0]->start;
icard.protocol = protocol;
icard.typ = ISDN_CTYPE_ELSA_PCMCIA;
i = hisax_init_pcmcia(link, &(((local_info_t*)link->priv)->busy), &icard);
if (i < 0) {
printk(KERN_ERR "elsa_cs: failed to initialize Elsa "
"PCMCIA %d with %pR\n", i, link->resource[0]);
elsa_cs_release(link);
} else
((local_info_t*)link->priv)->cardnr = i;
icard.para[0] = link->irq;
icard.para[1] = link->resource[0]->start;
icard.protocol = protocol;
icard.typ = ISDN_CTYPE_ELSA_PCMCIA;
return 0;
i = hisax_init_pcmcia(link, &(((local_info_t *)link->priv)->busy), &icard);
if (i < 0) {
printk(KERN_ERR "elsa_cs: failed to initialize Elsa "
"PCMCIA %d with %pR\n", i, link->resource[0]);
elsa_cs_release(link);
} else
((local_info_t *)link->priv)->cardnr = i;
return 0;
failed:
elsa_cs_release(link);
return -ENODEV;
elsa_cs_release(link);
return -ENODEV;
} /* elsa_cs_config */
static void elsa_cs_release(struct pcmcia_device *link)
{
local_info_t *local = link->priv;
local_info_t *local = link->priv;
dev_dbg(&link->dev, "elsa_cs_release(0x%p)\n", link);
dev_dbg(&link->dev, "elsa_cs_release(0x%p)\n", link);
if (local) {
if (local->cardnr >= 0) {
/* no unregister function with hisax */
HiSax_closecard(local->cardnr);
if (local) {
if (local->cardnr >= 0) {
/* no unregister function with hisax */
HiSax_closecard(local->cardnr);
}
}
}
pcmcia_disable_device(link);
pcmcia_disable_device(link);
} /* elsa_cs_release */
static int elsa_suspend(struct pcmcia_device *link)
{
local_info_t *dev = link->priv;
dev->busy = 1;
dev->busy = 1;
return 0;
}
@@ -195,7 +195,7 @@ static int elsa_resume(struct pcmcia_device *link)
{
local_info_t *dev = link->priv;
dev->busy = 0;
dev->busy = 0;
return 0;
}

Visa fil

@@ -12,9 +12,9 @@
#include <linux/slab.h>
#define MAX_MODEM_BUF 256
#define WAKEUP_CHARS (MAX_MODEM_BUF/2)
#define WAKEUP_CHARS (MAX_MODEM_BUF / 2)
#define RS_ISR_PASS_LIMIT 256
#define BASE_BAUD ( 1843200 / 16 )
#define BASE_BAUD (1843200 / 16)
//#define SERIAL_DEBUG_OPEN 1
//#define SERIAL_DEBUG_INTR 1
@@ -27,8 +27,8 @@
#ifdef SERIAL_DEBUG_REG
static u_char deb[32];
const char *ModemIn[] = {"RBR","IER","IIR","LCR","MCR","LSR","MSR","SCR"};
const char *ModemOut[] = {"THR","IER","FCR","LCR","MCR","LSR","MSR","SCR"};
const char *ModemIn[] = {"RBR", "IER", "IIR", "LCR", "MCR", "LSR", "MSR", "SCR"};
const char *ModemOut[] = {"THR", "IER", "FCR", "LCR", "MCR", "LSR", "MSR", "SCR"};
#endif
static char *MInit_1 = "AT&F&C1E0&D2\r\0";
@@ -49,8 +49,8 @@ static inline unsigned int serial_in(struct IsdnCardState *cs, int offset)
{
#ifdef SERIAL_DEBUG_REG
u_int val = inb(cs->hw.elsa.base + 8 + offset);
debugl1(cs,"in %s %02x",ModemIn[offset], val);
return(val);
debugl1(cs, "in %s %02x", ModemIn[offset], val);
return (val);
#else
return inb(cs->hw.elsa.base + 8 + offset);
#endif
@@ -61,12 +61,12 @@ static inline unsigned int serial_inp(struct IsdnCardState *cs, int offset)
#ifdef SERIAL_DEBUG_REG
#ifdef ELSA_SERIAL_NOPAUSE_IO
u_int val = inb(cs->hw.elsa.base + 8 + offset);
debugl1(cs,"inp %s %02x",ModemIn[offset], val);
debugl1(cs, "inp %s %02x", ModemIn[offset], val);
#else
u_int val = inb_p(cs->hw.elsa.base + 8 + offset);
debugl1(cs,"inP %s %02x",ModemIn[offset], val);
debugl1(cs, "inP %s %02x", ModemIn[offset], val);
#endif
return(val);
return (val);
#else
#ifdef ELSA_SERIAL_NOPAUSE_IO
return inb(cs->hw.elsa.base + 8 + offset);
@@ -79,7 +79,7 @@ static inline unsigned int serial_inp(struct IsdnCardState *cs, int offset)
static inline void serial_out(struct IsdnCardState *cs, int offset, int value)
{
#ifdef SERIAL_DEBUG_REG
debugl1(cs,"out %s %02x",ModemOut[offset], value);
debugl1(cs, "out %s %02x", ModemOut[offset], value);
#endif
outb(value, cs->hw.elsa.base + 8 + offset);
}
@@ -89,15 +89,15 @@ static inline void serial_outp(struct IsdnCardState *cs, int offset,
{
#ifdef SERIAL_DEBUG_REG
#ifdef ELSA_SERIAL_NOPAUSE_IO
debugl1(cs,"outp %s %02x",ModemOut[offset], value);
debugl1(cs, "outp %s %02x", ModemOut[offset], value);
#else
debugl1(cs,"outP %s %02x",ModemOut[offset], value);
debugl1(cs, "outP %s %02x", ModemOut[offset], value);
#endif
#endif
#ifdef ELSA_SERIAL_NOPAUSE_IO
outb(value, cs->hw.elsa.base + 8 + offset);
#else
outb_p(value, cs->hw.elsa.base + 8 + offset);
outb_p(value, cs->hw.elsa.base + 8 + offset);
#endif
}
@@ -131,7 +131,7 @@ static void change_speed(struct IsdnCardState *cs, int baud)
cs->hw.elsa.IER |= UART_IER_MSI;
serial_outp(cs, UART_IER, cs->hw.elsa.IER);
debugl1(cs,"modem quot=0x%x", quot);
debugl1(cs, "modem quot=0x%x", quot);
serial_outp(cs, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
serial_outp(cs, UART_DLL, quot & 0xff); /* LS of divisor */
serial_outp(cs, UART_DLM, quot >> 8); /* MS of divisor */
@@ -141,7 +141,7 @@ static void change_speed(struct IsdnCardState *cs, int baud)
static int mstartup(struct IsdnCardState *cs)
{
int retval=0;
int retval = 0;
/*
* Clear the FIFO buffers and disable them
@@ -158,7 +158,7 @@ static int mstartup(struct IsdnCardState *cs)
retval = -ENODEV;
goto errout;
}
/*
* Clear the interrupt registers.
*/
@@ -167,20 +167,20 @@ static int mstartup(struct IsdnCardState *cs)
(void) serial_inp(cs, UART_MSR);
/*
* Now, initialize the UART
* Now, initialize the UART
*/
serial_outp(cs, UART_LCR, UART_LCR_WLEN8); /* reset DLAB */
cs->hw.elsa.MCR = 0;
cs->hw.elsa.MCR = UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2;
serial_outp(cs, UART_MCR, cs->hw.elsa.MCR);
/*
* Finally, enable interrupts
*/
cs->hw.elsa.IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
serial_outp(cs, UART_IER, cs->hw.elsa.IER); /* enable interrupts */
/*
* And clear the interrupt registers again for luck.
*/
@@ -190,7 +190,7 @@ static int mstartup(struct IsdnCardState *cs)
(void)serial_inp(cs, UART_MSR);
cs->hw.elsa.transcnt = cs->hw.elsa.transp = 0;
cs->hw.elsa.rcvcnt = cs->hw.elsa.rcvp =0;
cs->hw.elsa.rcvcnt = cs->hw.elsa.rcvp = 0;
/*
* and set the speed of the serial port
@@ -211,7 +211,7 @@ static void mshutdown(struct IsdnCardState *cs)
#ifdef SERIAL_DEBUG_OPEN
printk(KERN_DEBUG"Shutting down serial ....");
#endif
/*
* clear delta_msr_wait queue to avoid mem leaks: we may free the irq
* here so the queue might never be waken up
@@ -220,17 +220,17 @@ static void mshutdown(struct IsdnCardState *cs)
cs->hw.elsa.IER = 0;
serial_outp(cs, UART_IER, 0x00); /* disable all intrs */
cs->hw.elsa.MCR &= ~UART_MCR_OUT2;
/* disable break condition */
serial_outp(cs, UART_LCR, serial_inp(cs, UART_LCR) & ~UART_LCR_SBC);
cs->hw.elsa.MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
cs->hw.elsa.MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
serial_outp(cs, UART_MCR, cs->hw.elsa.MCR);
/* disable FIFO's */
/* disable FIFO's */
serial_outp(cs, UART_FCR, (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT));
serial_inp(cs, UART_RX); /* read data port to reset things */
#ifdef SERIAL_DEBUG_OPEN
printk(" done\n");
#endif
@@ -238,10 +238,10 @@ static void mshutdown(struct IsdnCardState *cs)
static inline int
write_modem(struct BCState *bcs) {
int ret=0;
int ret = 0;
struct IsdnCardState *cs = bcs->cs;
int count, len, fp;
if (!bcs->tx_skb)
return 0;
if (bcs->tx_skb->len <= 0)
@@ -250,7 +250,7 @@ write_modem(struct BCState *bcs) {
if (len > MAX_MODEM_BUF - cs->hw.elsa.transcnt)
len = MAX_MODEM_BUF - cs->hw.elsa.transcnt;
fp = cs->hw.elsa.transcnt + cs->hw.elsa.transp;
fp &= (MAX_MODEM_BUF -1);
fp &= (MAX_MODEM_BUF - 1);
count = len;
if (count > MAX_MODEM_BUF - fp) {
count = MAX_MODEM_BUF - fp;
@@ -267,25 +267,25 @@ write_modem(struct BCState *bcs) {
skb_pull(bcs->tx_skb, count);
cs->hw.elsa.transcnt += count;
ret += count;
if (cs->hw.elsa.transcnt &&
if (cs->hw.elsa.transcnt &&
!(cs->hw.elsa.IER & UART_IER_THRI)) {
cs->hw.elsa.IER |= UART_IER_THRI;
cs->hw.elsa.IER |= UART_IER_THRI;
serial_outp(cs, UART_IER, cs->hw.elsa.IER);
}
return(ret);
return (ret);
}
static inline void
modem_fill(struct BCState *bcs) {
if (bcs->tx_skb) {
if (bcs->tx_skb->len) {
write_modem(bcs);
return;
} else {
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
u_long flags;
spin_lock_irqsave(&bcs->aclock, flags);
bcs->ackcnt += bcs->hw.hscx.count;
@@ -322,7 +322,7 @@ static inline void receive_chars(struct IsdnCardState *cs,
#endif
if (*status & (UART_LSR_BI | UART_LSR_PE |
UART_LSR_FE | UART_LSR_OE)) {
#ifdef SERIAL_DEBUG_INTR
printk("handling exept....");
#endif
@@ -333,9 +333,9 @@ static inline void receive_chars(struct IsdnCardState *cs,
if (!(skb = dev_alloc_skb(cs->hw.elsa.rcvcnt)))
printk(KERN_WARNING "ElsaSER: receive out of memory\n");
else {
memcpy(skb_put(skb, cs->hw.elsa.rcvcnt), cs->hw.elsa.rcvbuf,
cs->hw.elsa.rcvcnt);
skb_queue_tail(& cs->hw.elsa.bcs->rqueue, skb);
memcpy(skb_put(skb, cs->hw.elsa.rcvcnt), cs->hw.elsa.rcvbuf,
cs->hw.elsa.rcvcnt);
skb_queue_tail(&cs->hw.elsa.bcs->rqueue, skb);
}
schedule_event(cs->hw.elsa.bcs, B_RCVBUFREADY);
} else {
@@ -352,10 +352,10 @@ static inline void receive_chars(struct IsdnCardState *cs,
static inline void transmit_chars(struct IsdnCardState *cs, int *intr_done)
{
int count;
debugl1(cs, "transmit_chars: p(%x) cnt(%x)", cs->hw.elsa.transp,
debugl1(cs, "transmit_chars: p(%x) cnt(%x)", cs->hw.elsa.transp,
cs->hw.elsa.transcnt);
if (cs->hw.elsa.transcnt <= 0) {
cs->hw.elsa.IER &= ~UART_IER_THRI;
serial_out(cs, UART_IER, cs->hw.elsa.IER);
@@ -365,11 +365,11 @@ static inline void transmit_chars(struct IsdnCardState *cs, int *intr_done)
do {
serial_outp(cs, UART_TX, cs->hw.elsa.transbuf[cs->hw.elsa.transp++]);
if (cs->hw.elsa.transp >= MAX_MODEM_BUF)
cs->hw.elsa.transp=0;
cs->hw.elsa.transp = 0;
if (--cs->hw.elsa.transcnt <= 0)
break;
} while (--count > 0);
if ((cs->hw.elsa.transcnt < WAKEUP_CHARS) && (cs->hw.elsa.MFlag==2))
if ((cs->hw.elsa.transcnt < WAKEUP_CHARS) && (cs->hw.elsa.MFlag == 2))
modem_fill(cs->hw.elsa.bcs);
#ifdef SERIAL_DEBUG_INTR
@@ -388,14 +388,14 @@ static void rs_interrupt_elsa(struct IsdnCardState *cs)
{
int status, iir, msr;
int pass_counter = 0;
#ifdef SERIAL_DEBUG_INTR
printk(KERN_DEBUG "rs_interrupt_single(%d)...", cs->irq);
#endif
do {
status = serial_inp(cs, UART_LSR);
debugl1(cs,"rs LSR %02x", status);
debugl1(cs, "rs LSR %02x", status);
#ifdef SERIAL_DEBUG_INTR
printk("status = %x...", status);
#endif
@@ -408,10 +408,10 @@ static void rs_interrupt_elsa(struct IsdnCardState *cs)
break;
}
iir = serial_inp(cs, UART_IIR);
debugl1(cs,"rs IIR %02x", iir);
debugl1(cs, "rs IIR %02x", iir);
if ((iir & 0xf) == 0) {
msr = serial_inp(cs, UART_MSR);
debugl1(cs,"rs MSR %02x", msr);
debugl1(cs, "rs MSR %02x", msr);
}
} while (!(iir & UART_IIR_NO_INT));
#ifdef SERIAL_DEBUG_INTR
@@ -447,14 +447,14 @@ static void
modem_write_cmd(struct IsdnCardState *cs, u_char *buf, int len) {
int count, fp;
u_char *msg = buf;
if (!len)
return;
if (len > (MAX_MODEM_BUF - cs->hw.elsa.transcnt)) {
return;
}
fp = cs->hw.elsa.transcnt + cs->hw.elsa.transp;
fp &= (MAX_MODEM_BUF -1);
fp &= (MAX_MODEM_BUF - 1);
count = len;
if (count > MAX_MODEM_BUF - fp) {
count = MAX_MODEM_BUF - fp;
@@ -466,7 +466,7 @@ modem_write_cmd(struct IsdnCardState *cs, u_char *buf, int len) {
}
memcpy(cs->hw.elsa.transbuf + fp, msg, count);
cs->hw.elsa.transcnt += count;
if (cs->hw.elsa.transcnt &&
if (cs->hw.elsa.transcnt &&
!(cs->hw.elsa.IER & UART_IER_THRI)) {
cs->hw.elsa.IER |= UART_IER_THRI;
serial_outp(cs, UART_IER, cs->hw.elsa.IER);
@@ -480,43 +480,43 @@ modem_set_init(struct IsdnCardState *cs) {
#define RCV_DELAY 20
modem_write_cmd(cs, MInit_1, strlen(MInit_1));
timeout = 1000;
while(timeout-- && cs->hw.elsa.transcnt)
while (timeout-- && cs->hw.elsa.transcnt)
udelay(1000);
debugl1(cs, "msi tout=%d", timeout);
mdelay(RCV_DELAY);
modem_write_cmd(cs, MInit_2, strlen(MInit_2));
timeout = 1000;
while(timeout-- && cs->hw.elsa.transcnt)
while (timeout-- && cs->hw.elsa.transcnt)
udelay(1000);
debugl1(cs, "msi tout=%d", timeout);
mdelay(RCV_DELAY);
modem_write_cmd(cs, MInit_3, strlen(MInit_3));
timeout = 1000;
while(timeout-- && cs->hw.elsa.transcnt)
while (timeout-- && cs->hw.elsa.transcnt)
udelay(1000);
debugl1(cs, "msi tout=%d", timeout);
mdelay(RCV_DELAY);
modem_write_cmd(cs, MInit_4, strlen(MInit_4));
timeout = 1000;
while(timeout-- && cs->hw.elsa.transcnt)
while (timeout-- && cs->hw.elsa.transcnt)
udelay(1000);
debugl1(cs, "msi tout=%d", timeout);
mdelay(RCV_DELAY);
modem_write_cmd(cs, MInit_5, strlen(MInit_5));
timeout = 1000;
while(timeout-- && cs->hw.elsa.transcnt)
while (timeout-- && cs->hw.elsa.transcnt)
udelay(1000);
debugl1(cs, "msi tout=%d", timeout);
mdelay(RCV_DELAY);
modem_write_cmd(cs, MInit_6, strlen(MInit_6));
timeout = 1000;
while(timeout-- && cs->hw.elsa.transcnt)
while (timeout-- && cs->hw.elsa.transcnt)
udelay(1000);
debugl1(cs, "msi tout=%d", timeout);
mdelay(RCV_DELAY);
modem_write_cmd(cs, MInit_7, strlen(MInit_7));
timeout = 1000;
while(timeout-- && cs->hw.elsa.transcnt)
while (timeout-- && cs->hw.elsa.transcnt)
udelay(1000);
debugl1(cs, "msi tout=%d", timeout);
mdelay(RCV_DELAY);
@@ -529,7 +529,7 @@ modem_set_dial(struct IsdnCardState *cs, int outgoing) {
modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800));
timeout = 1000;
while(timeout-- && cs->hw.elsa.transcnt)
while (timeout-- && cs->hw.elsa.transcnt)
udelay(1000);
debugl1(cs, "msi tout=%d", timeout);
mdelay(RCV_DELAY);
@@ -538,7 +538,7 @@ modem_set_dial(struct IsdnCardState *cs, int outgoing) {
else
modem_write_cmd(cs, MInit_dialin, strlen(MInit_dialin));
timeout = 1000;
while(timeout-- && cs->hw.elsa.transcnt)
while (timeout-- && cs->hw.elsa.transcnt)
udelay(1000);
debugl1(cs, "msi tout=%d", timeout);
mdelay(RCV_DELAY);
@@ -568,15 +568,15 @@ modem_l2l1(struct PStack *st, int pr, void *arg)
set_arcofi(bcs->cs, st->l1.bc);
mstartup(bcs->cs);
modem_set_dial(bcs->cs, test_bit(FLG_ORIG, &st->l2.flag));
bcs->cs->hw.elsa.MFlag=2;
bcs->cs->hw.elsa.MFlag = 2;
} else if (pr == (PH_DEACTIVATE | REQUEST)) {
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
bcs->cs->dc.isac.arcofi_bc = st->l1.bc;
arcofi_fsm(bcs->cs, ARCOFI_START, &ARCOFI_XOP_0);
interruptible_sleep_on(&bcs->cs->dc.isac.arcofi_wait);
bcs->cs->hw.elsa.MFlag=1;
bcs->cs->hw.elsa.MFlag = 1;
} else {
printk(KERN_WARNING"ElsaSer: unknown pr %x\n", pr);
printk(KERN_WARNING "ElsaSer: unknown pr %x\n", pr);
}
}
@@ -586,27 +586,27 @@ setstack_elsa(struct PStack *st, struct BCState *bcs)
bcs->channel = st->l1.bc;
switch (st->l1.mode) {
case L1_MODE_HDLC:
case L1_MODE_TRANS:
if (open_hscxstate(st->l1.hardware, bcs))
return (-1);
st->l2.l2l1 = hscx_l2l1;
break;
case L1_MODE_MODEM:
bcs->mode = L1_MODE_MODEM;
if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
bcs->hw.hscx.rcvbuf = bcs->cs->hw.elsa.rcvbuf;
skb_queue_head_init(&bcs->rqueue);
skb_queue_head_init(&bcs->squeue);
}
bcs->tx_skb = NULL;
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->event = 0;
bcs->hw.hscx.rcvidx = 0;
bcs->tx_cnt = 0;
bcs->cs->hw.elsa.bcs = bcs;
st->l2.l2l1 = modem_l2l1;
break;
case L1_MODE_HDLC:
case L1_MODE_TRANS:
if (open_hscxstate(st->l1.hardware, bcs))
return (-1);
st->l2.l2l1 = hscx_l2l1;
break;
case L1_MODE_MODEM:
bcs->mode = L1_MODE_MODEM;
if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
bcs->hw.hscx.rcvbuf = bcs->cs->hw.elsa.rcvbuf;
skb_queue_head_init(&bcs->rqueue);
skb_queue_head_init(&bcs->squeue);
}
bcs->tx_skb = NULL;
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->event = 0;
bcs->hw.hscx.rcvidx = 0;
bcs->tx_cnt = 0;
bcs->cs->hw.elsa.bcs = bcs;
st->l2.l2l1 = modem_l2l1;
break;
}
st->l1.bcs = bcs;
setstack_manager(st);
@@ -623,15 +623,15 @@ init_modem(struct IsdnCardState *cs) {
cs->bcs[0].BC_Close = close_elsastate;
cs->bcs[1].BC_Close = close_elsastate;
if (!(cs->hw.elsa.rcvbuf = kmalloc(MAX_MODEM_BUF,
GFP_ATOMIC))) {
GFP_ATOMIC))) {
printk(KERN_WARNING
"Elsa: No modem mem hw.elsa.rcvbuf\n");
"Elsa: No modem mem hw.elsa.rcvbuf\n");
return;
}
if (!(cs->hw.elsa.transbuf = kmalloc(MAX_MODEM_BUF,
GFP_ATOMIC))) {
GFP_ATOMIC))) {
printk(KERN_WARNING
"Elsa: No modem mem hw.elsa.transbuf\n");
"Elsa: No modem mem hw.elsa.transbuf\n");
kfree(cs->hw.elsa.rcvbuf);
cs->hw.elsa.rcvbuf = NULL;
return;

Visa fil

@@ -97,13 +97,13 @@ static unsigned char
ReadByteAmd7930(struct IsdnCardState *cs, unsigned char offset)
{
/* direct register */
if(offset < 8)
return (inb(cs->hw.njet.isac + 4*offset));
if (offset < 8)
return (inb(cs->hw.njet.isac + 4 * offset));
/* indirect register */
else {
outb(offset, cs->hw.njet.isac + 4*AMD_CR);
return(inb(cs->hw.njet.isac + 4*AMD_DR));
outb(offset, cs->hw.njet.isac + 4 * AMD_CR);
return (inb(cs->hw.njet.isac + 4 * AMD_DR));
}
}
@@ -112,29 +112,29 @@ static void
WriteByteAmd7930(struct IsdnCardState *cs, unsigned char offset, unsigned char value)
{
/* direct register */
if(offset < 8)
outb(value, cs->hw.njet.isac + 4*offset);
if (offset < 8)
outb(value, cs->hw.njet.isac + 4 * offset);
/* indirect register */
else {
outb(offset, cs->hw.njet.isac + 4*AMD_CR);
outb(value, cs->hw.njet.isac + 4*AMD_DR);
outb(offset, cs->hw.njet.isac + 4 * AMD_CR);
outb(value, cs->hw.njet.isac + 4 * AMD_DR);
}
}
static void
enpci_setIrqMask(struct IsdnCardState *cs, unsigned char val) {
if (!val)
outb(0x00, cs->hw.njet.base+NETJET_IRQMASK1);
else
outb(TJ_AMD_IRQ, cs->hw.njet.base+NETJET_IRQMASK1);
if (!val)
outb(0x00, cs->hw.njet.base + NETJET_IRQMASK1);
else
outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
}
static unsigned char dummyrr(struct IsdnCardState *cs, int chan, unsigned char off)
{
return(5);
return (5);
}
static void dummywr(struct IsdnCardState *cs, int chan, unsigned char off, unsigned char value)
@@ -173,70 +173,70 @@ static int
enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
{
u_long flags;
unsigned char *chan;
unsigned char *chan;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "enter:now PCI: card_msg: 0x%04X", mt);
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_enpci(cs);
Amd7930_init(cs);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case CARD_RELEASE:
release_io_netjet(cs);
break;
case CARD_INIT:
reset_enpci(cs);
inittiger(cs);
/* irq must be on here */
Amd7930_init(cs);
break;
case CARD_TEST:
break;
case MDL_ASSIGN:
/* TEI assigned, LED1 on */
cs->hw.njet.auxd = TJ_AMD_IRQ << 1;
outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
break;
case MDL_REMOVE:
/* TEI removed, LEDs off */
cs->hw.njet.auxd = 0;
outb(0x00, cs->hw.njet.base + NETJET_AUXDATA);
break;
case MDL_BC_ASSIGN:
/* activate B-channel */
chan = (unsigned char *)arg;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_enpci(cs);
Amd7930_init(cs);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case CARD_RELEASE:
release_io_netjet(cs);
break;
case CARD_INIT:
reset_enpci(cs);
inittiger(cs);
/* irq must be on here */
Amd7930_init(cs);
break;
case CARD_TEST:
break;
case MDL_ASSIGN:
/* TEI assigned, LED1 on */
cs->hw.njet.auxd = TJ_AMD_IRQ << 1;
outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
break;
case MDL_REMOVE:
/* TEI removed, LEDs off */
cs->hw.njet.auxd = 0;
outb(0x00, cs->hw.njet.base + NETJET_AUXDATA);
break;
case MDL_BC_ASSIGN:
/* activate B-channel */
chan = (unsigned char *)arg;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan);
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan);
cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)), "MDL_BC_ASSIGN");
/* at least one b-channel in use, LED 2 on */
cs->hw.njet.auxd |= TJ_AMD_IRQ << 2;
outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
break;
case MDL_BC_RELEASE:
/* deactivate B-channel */
chan = (unsigned char *)arg;
cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)), "MDL_BC_ASSIGN");
/* at least one b-channel in use, LED 2 on */
cs->hw.njet.auxd |= TJ_AMD_IRQ << 2;
outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
break;
case MDL_BC_RELEASE:
/* deactivate B-channel */
chan = (unsigned char *)arg;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan);
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan);
cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 & ~(*chan + 1)), "MDL_BC_RELEASE");
/* no b-channel active -> LED2 off */
if (!(cs->dc.amd7930.lmr1 & 3)) {
cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2);
outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
}
break;
default:
break;
cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 & ~(*chan + 1)), "MDL_BC_RELEASE");
/* no b-channel active -> LED2 off */
if (!(cs->dc.amd7930.lmr1 & 3)) {
cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2);
outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
}
break;
default:
break;
}
return(0);
return (0);
}
static irqreturn_t
@@ -249,32 +249,32 @@ enpci_interrupt(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
s1val = inb(cs->hw.njet.base + NETJET_IRQSTAT1);
/* AMD threw an interrupt */
/* AMD threw an interrupt */
if (!(s1val & TJ_AMD_IRQ)) {
/* read and clear interrupt-register */
/* read and clear interrupt-register */
ir = ReadByteAmd7930(cs, 0x00);
Amd7930_interrupt(cs, ir);
s1val = 1;
} else
s1val = 0;
s0val = inb(cs->hw.njet.base + NETJET_IRQSTAT0);
if ((s0val | s1val)==0) { // shared IRQ
if ((s0val | s1val) == 0) { // shared IRQ
spin_unlock_irqrestore(&cs->lock, flags);
return IRQ_NONE;
}
}
if (s0val)
outb(s0val, cs->hw.njet.base + NETJET_IRQSTAT0);
/* DMA-Interrupt: B-channel-stuff */
/* set bits in sval to indicate which page is free */
if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
/* the 2nd write page is free */
s0val = 0x08;
else /* the 1st write page is free */
s0val = 0x04;
if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
/* the 2nd read page is free */
s0val = s0val | 0x02;
else /* the 1st read page is free */
@@ -287,11 +287,11 @@ enpci_interrupt(int intno, void *dev_id)
}
cs->hw.njet.irqstat0 = s0val;
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
/* we have a read dma int */
read_tiger(cs);
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
(cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
(cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
/* we have a write dma int */
write_tiger(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
@@ -304,26 +304,26 @@ static int __devinit en_pci_probe(struct pci_dev *dev_netjet,
struct IsdnCardState *cs)
{
if (pci_enable_device(dev_netjet))
return(0);
return (0);
cs->irq = dev_netjet->irq;
if (!cs->irq) {
printk(KERN_WARNING "enter:now PCI: No IRQ for PCI card found\n");
return(0);
return (0);
}
cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
if (!cs->hw.njet.base) {
printk(KERN_WARNING "enter:now PCI: No IO-Adr for PCI card found\n");
return(0);
return (0);
}
/* checks Sub-Vendor ID because system crashes with Traverse-Card */
if ((dev_netjet->subsystem_vendor != 0x55) ||
(dev_netjet->subsystem_device != 0x02)) {
printk(KERN_WARNING "enter:now: You tried to load this driver with an incompatible TigerJet-card\n");
printk(KERN_WARNING "Use type=20 for Traverse NetJet PCI Card.\n");
return(0);
return (0);
}
return(1);
return (1);
}
static void __devinit en_cs_init(struct IsdnCard *card,
@@ -356,8 +356,8 @@ static int __devinit en_cs_init_rest(struct IsdnCard *card,
const int bytecnt = 256;
printk(KERN_INFO
"enter:now PCI: PCI card configured at 0x%lx IRQ %d\n",
cs->hw.njet.base, cs->irq);
"enter:now PCI: PCI card configured at 0x%lx IRQ %d\n",
cs->hw.njet.base, cs->irq);
if (!request_region(cs->hw.njet.base, bytecnt, "Fn_ISDN")) {
printk(KERN_WARNING
"HiSax: enter:now config port %lx-%lx already in use\n",
@@ -368,13 +368,13 @@ static int __devinit en_cs_init_rest(struct IsdnCard *card,
setup_Amd7930(cs);
cs->hw.njet.last_is0 = 0;
/* macro rByteAMD */
cs->readisac = &ReadByteAmd7930;
/* macro wByteAMD */
cs->writeisac = &WriteByteAmd7930;
cs->dc.amd7930.setIrqMask = &enpci_setIrqMask;
/* macro rByteAMD */
cs->readisac = &ReadByteAmd7930;
/* macro wByteAMD */
cs->writeisac = &WriteByteAmd7930;
cs->dc.amd7930.setIrqMask = &enpci_setIrqMask;
cs->BC_Read_Reg = &dummyrr;
cs->BC_Read_Reg = &dummyrr;
cs->BC_Write_Reg = &dummywr;
cs->BC_Send_Data = &netjet_fill_dma;
cs->cardmsg = &enpci_card_msg;
@@ -398,27 +398,27 @@ setup_enternow_pci(struct IsdnCard *card)
#error "not running on big endian machines now"
#endif
strcpy(tmp, enternow_pci_rev);
strcpy(tmp, enternow_pci_rev);
printk(KERN_INFO "HiSax: Formula-n Europe AG enter:now ISDN PCI driver Rev. %s\n", HiSax_getrev(tmp));
if (cs->typ != ISDN_CTYPE_ENTERNOW)
return(0);
return (0);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
for ( ;; )
for (;;)
{
if ((dev_netjet = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET,
PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
ret = en_pci_probe(dev_netjet, cs);
if (!ret)
return(0);
return (0);
} else {
printk(KERN_WARNING "enter:now PCI: No PCI card found\n");
return(0);
printk(KERN_WARNING "enter:now PCI: No PCI card found\n");
return (0);
}
en_cs_init(card, cs);
break;
}
return en_cs_init_rest(card, cs);
return en_cs_init_rest(card, cs);
}

Visa fil

@@ -5,7 +5,7 @@
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
* by Kai Germaschewski <kai.germaschewski@gmx.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -27,18 +27,18 @@ FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount)
int i;
fsm->jumpmatrix = (FSMFNPTR *)
kzalloc(sizeof (FSMFNPTR) * fsm->state_count * fsm->event_count, GFP_KERNEL);
kzalloc(sizeof(FSMFNPTR) * fsm->state_count * fsm->event_count, GFP_KERNEL);
if (!fsm->jumpmatrix)
return -ENOMEM;
for (i = 0; i < fncount; i++)
if ((fnlist[i].state>=fsm->state_count) || (fnlist[i].event>=fsm->event_count)) {
for (i = 0; i < fncount; i++)
if ((fnlist[i].state >= fsm->state_count) || (fnlist[i].event >= fsm->event_count)) {
printk(KERN_ERR "FsmNew Error line %d st(%ld/%ld) ev(%ld/%ld)\n",
i,(long)fnlist[i].state,(long)fsm->state_count,
(long)fnlist[i].event,(long)fsm->event_count);
} else
i, (long)fnlist[i].state, (long)fsm->state_count,
(long)fnlist[i].event, (long)fsm->event_count);
} else
fsm->jumpmatrix[fsm->state_count * fnlist[i].event +
fnlist[i].state] = (FSMFNPTR) fnlist[i].routine;
fnlist[i].state] = (FSMFNPTR)fnlist[i].routine;
return 0;
}
@@ -53,24 +53,24 @@ FsmEvent(struct FsmInst *fi, int event, void *arg)
{
FSMFNPTR r;
if ((fi->state>=fi->fsm->state_count) || (event >= fi->fsm->event_count)) {
if ((fi->state >= fi->fsm->state_count) || (event >= fi->fsm->event_count)) {
printk(KERN_ERR "FsmEvent Error st(%ld/%ld) ev(%d/%ld)\n",
(long)fi->state,(long)fi->fsm->state_count,event,(long)fi->fsm->event_count);
return(1);
(long)fi->state, (long)fi->fsm->state_count, event, (long)fi->fsm->event_count);
return (1);
}
r = fi->fsm->jumpmatrix[fi->fsm->state_count * event + fi->state];
if (r) {
if (fi->debug)
fi->printdebug(fi, "State %s Event %s",
fi->fsm->strState[fi->state],
fi->fsm->strEvent[event]);
fi->fsm->strState[fi->state],
fi->fsm->strEvent[event]);
r(fi, event, arg);
return (0);
} else {
if (fi->debug)
fi->printdebug(fi, "State %s Event %s no routine",
fi->fsm->strState[fi->state],
fi->fsm->strEvent[event]);
fi->fsm->strState[fi->state],
fi->fsm->strEvent[event]);
return (!0);
}
}
@@ -81,7 +81,7 @@ FsmChangeState(struct FsmInst *fi, int newstate)
fi->state = newstate;
if (fi->debug)
fi->printdebug(fi, "ChangeState %s",
fi->fsm->strState[newstate]);
fi->fsm->strState[newstate]);
}
static void
@@ -125,7 +125,7 @@ FsmAddTimer(struct FsmTimer *ft,
#if FSM_TIMER_DEBUG
if (ft->fi->debug)
ft->fi->printdebug(ft->fi, "FsmAddTimer %lx %d %d",
(long) ft, millisec, where);
(long) ft, millisec, where);
#endif
if (timer_pending(&ft->tl)) {
@@ -143,13 +143,13 @@ FsmAddTimer(struct FsmTimer *ft,
void
FsmRestartTimer(struct FsmTimer *ft,
int millisec, int event, void *arg, int where)
int millisec, int event, void *arg, int where)
{
#if FSM_TIMER_DEBUG
if (ft->fi->debug)
ft->fi->printdebug(ft->fi, "FsmRestartTimer %lx %d %d",
(long) ft, millisec, where);
(long) ft, millisec, where);
#endif
if (timer_pending(&ft->tl))

Visa fil

@@ -5,7 +5,7 @@
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
* by Kai Germaschewski <kai.germaschewski@gmx.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -18,7 +18,7 @@
struct FsmInst;
typedef void (* FSMFNPTR)(struct FsmInst *, int, void *);
typedef void (*FSMFNPTR)(struct FsmInst *, int, void *);
struct Fsm {
FSMFNPTR *jumpmatrix;

Visa fil

@@ -5,7 +5,7 @@
* Author BeWan Systems
* based on source code from Karsten Keil
* Copyright by BeWan Systems
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -38,7 +38,7 @@ static const char *gazel_revision = "$Revision: 2.19.2.4 $";
#define INT_IPAC_EN 0x3 /* enable IT ipac */
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
static inline u_char
@@ -55,13 +55,13 @@ writereg(unsigned int adr, u_short off, u_char data)
static inline void
read_fifo(unsigned int adr, u_char * data, int size)
read_fifo(unsigned int adr, u_char *data, int size)
{
insb(adr, data, size);
}
static void
write_fifo(unsigned int adr, u_char * data, int size)
write_fifo(unsigned int adr, u_char *data, int size)
{
outsb(adr, data, size);
}
@@ -85,14 +85,14 @@ writereg_ipac(unsigned int adr, u_short off, u_char data)
static inline void
read_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size)
read_fifo_ipac(unsigned int adr, u_short off, u_char *data, int size)
{
byteout(adr, off);
insb(adr + 4, data, size);
}
static void
write_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size)
write_fifo_ipac(unsigned int adr, u_short off, u_char *data, int size)
{
byteout(adr, off);
outsb(adr + 4, data, size);
@@ -106,13 +106,13 @@ ReadISAC(struct IsdnCardState *cs, u_char offset)
u_short off2 = offset;
switch (cs->subtyp) {
case R647:
off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
case R685:
return (readreg(cs->hw.gazel.isac, off2));
case R753:
case R742:
return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2));
case R647:
off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
case R685:
return (readreg(cs->hw.gazel.isac, off2));
case R753:
case R742:
return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2));
}
return 0;
}
@@ -123,75 +123,75 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
u_short off2 = offset;
switch (cs->subtyp) {
case R647:
off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
case R685:
writereg(cs->hw.gazel.isac, off2, value);
break;
case R753:
case R742:
writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value);
break;
case R647:
off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
case R685:
writereg(cs->hw.gazel.isac, off2, value);
break;
case R753:
case R742:
writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value);
break;
}
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
switch (cs->subtyp) {
case R647:
case R685:
read_fifo(cs->hw.gazel.isacfifo, data, size);
break;
case R753:
case R742:
read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
break;
case R647:
case R685:
read_fifo(cs->hw.gazel.isacfifo, data, size);
break;
case R753:
case R742:
read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
break;
}
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
switch (cs->subtyp) {
case R647:
case R685:
write_fifo(cs->hw.gazel.isacfifo, data, size);
break;
case R753:
case R742:
write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
break;
case R647:
case R685:
write_fifo(cs->hw.gazel.isacfifo, data, size);
break;
case R753:
case R742:
write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
break;
}
}
static void
ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
{
switch (cs->subtyp) {
case R647:
case R685:
read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
break;
case R753:
case R742:
read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
break;
case R647:
case R685:
read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
break;
case R753:
case R742:
read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
break;
}
}
static void
WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
{
switch (cs->subtyp) {
case R647:
case R685:
write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
break;
case R753:
case R742:
write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
break;
case R647:
case R685:
write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
break;
case R753:
case R742:
write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
break;
}
}
@@ -201,13 +201,13 @@ ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
u_short off2 = offset;
switch (cs->subtyp) {
case R647:
off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
case R685:
return (readreg(cs->hw.gazel.hscx[hscx], off2));
case R753:
case R742:
return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2));
case R647:
off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
case R685:
return (readreg(cs->hw.gazel.hscx[hscx], off2));
case R753:
case R742:
return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2));
}
return 0;
}
@@ -218,15 +218,15 @@ WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
u_short off2 = offset;
switch (cs->subtyp) {
case R647:
off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
case R685:
writereg(cs->hw.gazel.hscx[hscx], off2, value);
break;
case R753:
case R742:
writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value);
break;
case R647:
off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
case R685:
writereg(cs->hw.gazel.hscx[hscx], off2, value);
break;
case R753:
case R742:
writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value);
break;
}
}
@@ -279,7 +279,7 @@ gazel_interrupt_ipac(int intno, void *dev_id)
u_char ista, val;
int count = 0;
u_long flags;
spin_lock_irqsave(&cs->lock, flags);
ista = ReadISAC(cs, IPAC_ISTA - 0x80);
do {
@@ -322,25 +322,25 @@ release_io_gazel(struct IsdnCardState *cs)
unsigned int i;
switch (cs->subtyp) {
case R647:
for (i = 0x0000; i < 0xC000; i += 0x1000)
release_region(i + cs->hw.gazel.hscx[0], 16);
release_region(0xC000 + cs->hw.gazel.hscx[0], 1);
break;
case R647:
for (i = 0x0000; i < 0xC000; i += 0x1000)
release_region(i + cs->hw.gazel.hscx[0], 16);
release_region(0xC000 + cs->hw.gazel.hscx[0], 1);
break;
case R685:
release_region(cs->hw.gazel.hscx[0], 0x100);
release_region(cs->hw.gazel.cfg_reg, 0x80);
break;
case R685:
release_region(cs->hw.gazel.hscx[0], 0x100);
release_region(cs->hw.gazel.cfg_reg, 0x80);
break;
case R753:
release_region(cs->hw.gazel.ipac, 0x8);
release_region(cs->hw.gazel.cfg_reg, 0x80);
break;
case R753:
release_region(cs->hw.gazel.ipac, 0x8);
release_region(cs->hw.gazel.cfg_reg, 0x80);
break;
case R742:
release_region(cs->hw.gazel.ipac, 8);
break;
case R742:
release_region(cs->hw.gazel.ipac, 8);
break;
}
}
@@ -350,49 +350,49 @@ reset_gazel(struct IsdnCardState *cs)
unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg;
switch (cs->subtyp) {
case R647:
writereg(addr, 0, 0);
HZDELAY(10);
writereg(addr, 0, 1);
HZDELAY(2);
break;
case R685:
plxcntrl = inl(addr + PLX_CNTRL);
plxcntrl |= (RESET_9050 + RESET_GAZEL);
outl(plxcntrl, addr + PLX_CNTRL);
plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
HZDELAY(4);
outl(plxcntrl, addr + PLX_CNTRL);
HZDELAY(10);
outb(INT_ISAC_EN + INT_HSCX_EN + INT_PCI_EN, addr + PLX_INCSR);
break;
case R753:
plxcntrl = inl(addr + PLX_CNTRL);
plxcntrl |= (RESET_9050 + RESET_GAZEL);
outl(plxcntrl, addr + PLX_CNTRL);
plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
HZDELAY(4);
outl(plxcntrl, addr + PLX_CNTRL);
HZDELAY(10);
WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR);
WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
break;
case R742:
WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
HZDELAY(4);
WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
break;
case R647:
writereg(addr, 0, 0);
HZDELAY(10);
writereg(addr, 0, 1);
HZDELAY(2);
break;
case R685:
plxcntrl = inl(addr + PLX_CNTRL);
plxcntrl |= (RESET_9050 + RESET_GAZEL);
outl(plxcntrl, addr + PLX_CNTRL);
plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
HZDELAY(4);
outl(plxcntrl, addr + PLX_CNTRL);
HZDELAY(10);
outb(INT_ISAC_EN + INT_HSCX_EN + INT_PCI_EN, addr + PLX_INCSR);
break;
case R753:
plxcntrl = inl(addr + PLX_CNTRL);
plxcntrl |= (RESET_9050 + RESET_GAZEL);
outl(plxcntrl, addr + PLX_CNTRL);
plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
HZDELAY(4);
outl(plxcntrl, addr + PLX_CNTRL);
HZDELAY(10);
WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR);
WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
break;
case R742:
WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
HZDELAY(4);
WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
break;
}
return (0);
}
@@ -403,28 +403,28 @@ Gazel_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_gazel(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_gazel(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 1);
if ((cs->subtyp==R647)||(cs->subtyp==R685)) {
int i;
for (i=0;i<(2+MAX_WAITING_CALLS);i++) {
cs->bcs[i].hw.hscx.tsaxr0 = 0x1f;
cs->bcs[i].hw.hscx.tsaxr1 = 0x23;
}
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_gazel(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_gazel(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 1);
if ((cs->subtyp == R647) || (cs->subtyp == R685)) {
int i;
for (i = 0; i < (2 + MAX_WAITING_CALLS); i++) {
cs->bcs[i].hw.hscx.tsaxr0 = 0x1f;
cs->bcs[i].hw.hscx.tsaxr1 = 0x23;
}
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return (0);
}
@@ -435,49 +435,49 @@ reserve_regions(struct IsdnCard *card, struct IsdnCardState *cs)
unsigned int i, j, base = 0, adr = 0, len = 0;
switch (cs->subtyp) {
case R647:
base = cs->hw.gazel.hscx[0];
if (!request_region(adr = (0xC000 + base), len = 1, "gazel"))
case R647:
base = cs->hw.gazel.hscx[0];
if (!request_region(adr = (0xC000 + base), len = 1, "gazel"))
goto error;
for (i = 0x0000; i < 0xC000; i += 0x1000) {
if (!request_region(adr = (i + base), len = 16, "gazel"))
goto error;
for (i = 0x0000; i < 0xC000; i += 0x1000) {
if (!request_region(adr = (i + base), len = 16, "gazel"))
goto error;
}
if (i != 0xC000) {
for (j = 0; j < i; j+= 0x1000)
release_region(j + base, 16);
release_region(0xC000 + base, 1);
goto error;
}
break;
}
if (i != 0xC000) {
for (j = 0; j < i; j += 0x1000)
release_region(j + base, 16);
release_region(0xC000 + base, 1);
goto error;
}
break;
case R685:
if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel"))
goto error;
if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
release_region(cs->hw.gazel.hscx[0],0x100);
goto error;
}
break;
case R685:
if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel"))
goto error;
if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
release_region(cs->hw.gazel.hscx[0], 0x100);
goto error;
}
break;
case R753:
if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
goto error;
if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
release_region(cs->hw.gazel.ipac, 8);
goto error;
}
break;
case R753:
if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
goto error;
if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
release_region(cs->hw.gazel.ipac, 8);
goto error;
}
break;
case R742:
if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
goto error;
break;
case R742:
if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
goto error;
break;
}
return 0;
error:
error:
printk(KERN_WARNING "Gazel: io ports 0x%x-0x%x already in use\n",
adr, adr + len);
return 1;
@@ -508,24 +508,24 @@ setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs)
cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
switch (cs->subtyp) {
case R647:
printk(KERN_INFO "Gazel: Card ISA R647/R648 found\n");
cs->dc.isac.adf2 = 0x87;
printk(KERN_INFO
"Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
printk(KERN_INFO
"Gazel: hscx A:0x%X hscx B:0x%X\n",
cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
case R647:
printk(KERN_INFO "Gazel: Card ISA R647/R648 found\n");
cs->dc.isac.adf2 = 0x87;
printk(KERN_INFO
"Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
printk(KERN_INFO
"Gazel: hscx A:0x%X hscx B:0x%X\n",
cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
break;
case R742:
printk(KERN_INFO "Gazel: Card ISA R742 found\n");
test_and_set_bit(HW_IPAC, &cs->HW_Flags);
printk(KERN_INFO
"Gazel: config irq:%d ipac:0x%X\n",
cs->irq, cs->hw.gazel.ipac);
break;
break;
case R742:
printk(KERN_INFO "Gazel: Card ISA R742 found\n");
test_and_set_bit(HW_IPAC, &cs->HW_Flags);
printk(KERN_INFO
"Gazel: config irq:%d ipac:0x%X\n",
cs->irq, cs->hw.gazel.ipac);
break;
}
return (0);
@@ -547,7 +547,7 @@ setup_gazelpci(struct IsdnCardState *cs)
seekcard = PCI_DEVICE_ID_PLX_R685;
for (nbseek = 0; nbseek < 4; nbseek++) {
if ((dev_tel = hisax_find_pci_device(PCI_VENDOR_ID_PLX,
seekcard, dev_tel))) {
seekcard, dev_tel))) {
if (pci_enable_device(dev_tel))
return 1;
pci_irq = dev_tel->irq;
@@ -559,15 +559,15 @@ setup_gazelpci(struct IsdnCardState *cs)
break;
else {
switch (seekcard) {
case PCI_DEVICE_ID_PLX_R685:
seekcard = PCI_DEVICE_ID_PLX_R753;
break;
case PCI_DEVICE_ID_PLX_R753:
seekcard = PCI_DEVICE_ID_PLX_DJINN_ITOO;
break;
case PCI_DEVICE_ID_PLX_DJINN_ITOO:
seekcard = PCI_DEVICE_ID_PLX_OLITEC;
break;
case PCI_DEVICE_ID_PLX_R685:
seekcard = PCI_DEVICE_ID_PLX_R753;
break;
case PCI_DEVICE_ID_PLX_R753:
seekcard = PCI_DEVICE_ID_PLX_DJINN_ITOO;
break;
case PCI_DEVICE_ID_PLX_DJINN_ITOO:
seekcard = PCI_DEVICE_ID_PLX_OLITEC;
break;
}
}
}
@@ -595,27 +595,27 @@ setup_gazelpci(struct IsdnCardState *cs)
cs->irq_flags |= IRQF_SHARED;
switch (seekcard) {
case PCI_DEVICE_ID_PLX_R685:
printk(KERN_INFO "Gazel: Card PCI R685 found\n");
cs->subtyp = R685;
cs->dc.isac.adf2 = 0x87;
printk(KERN_INFO
"Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
printk(KERN_INFO
"Gazel: hscx A:0x%X hscx B:0x%X\n",
cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
break;
case PCI_DEVICE_ID_PLX_R753:
case PCI_DEVICE_ID_PLX_DJINN_ITOO:
case PCI_DEVICE_ID_PLX_OLITEC:
printk(KERN_INFO "Gazel: Card PCI R753 found\n");
cs->subtyp = R753;
test_and_set_bit(HW_IPAC, &cs->HW_Flags);
printk(KERN_INFO
"Gazel: config irq:%d ipac:0x%X cfg:0x%X\n",
cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg);
break;
case PCI_DEVICE_ID_PLX_R685:
printk(KERN_INFO "Gazel: Card PCI R685 found\n");
cs->subtyp = R685;
cs->dc.isac.adf2 = 0x87;
printk(KERN_INFO
"Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
printk(KERN_INFO
"Gazel: hscx A:0x%X hscx B:0x%X\n",
cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
break;
case PCI_DEVICE_ID_PLX_R753:
case PCI_DEVICE_ID_PLX_DJINN_ITOO:
case PCI_DEVICE_ID_PLX_OLITEC:
printk(KERN_INFO "Gazel: Card PCI R753 found\n");
cs->subtyp = R753;
test_and_set_bit(HW_IPAC, &cs->HW_Flags);
printk(KERN_INFO
"Gazel: config irq:%d ipac:0x%X cfg:0x%X\n",
cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg);
break;
}
return (0);
@@ -667,23 +667,23 @@ setup_gazel(struct IsdnCard *card)
cs->cardmsg = &Gazel_card_msg;
switch (cs->subtyp) {
case R647:
case R685:
cs->irq_func = &gazel_interrupt;
ISACVersion(cs, "Gazel:");
if (HscxVersion(cs, "Gazel:")) {
printk(KERN_WARNING
"Gazel: wrong HSCX versions check IO address\n");
release_io_gazel(cs);
return (0);
}
break;
case R742:
case R753:
cs->irq_func = &gazel_interrupt_ipac;
val = ReadISAC(cs, IPAC_ID - 0x80);
printk(KERN_INFO "Gazel: IPAC version %x\n", val);
break;
case R647:
case R685:
cs->irq_func = &gazel_interrupt;
ISACVersion(cs, "Gazel:");
if (HscxVersion(cs, "Gazel:")) {
printk(KERN_WARNING
"Gazel: wrong HSCX versions check IO address\n");
release_io_gazel(cs);
return (0);
}
break;
case R742:
case R753:
cs->irq_func = &gazel_interrupt_ipac;
val = ReadISAC(cs, IPAC_ID - 0x80);
printk(KERN_INFO "Gazel: IPAC version %x\n", val);
break;
}
return (1);

Visa fil

@@ -93,32 +93,32 @@ static struct pci_device_id hfc4s8s_ids[] = {
.subdevice = 0x08b4,
.driver_data =
(unsigned long) &((hfc4s8s_param) {CHIP_ID_4S, CLOCKMODE_0, 4,
"HFC-4S Evaluation Board"}),
},
"HFC-4S Evaluation Board"}),
},
{.vendor = PCI_VENDOR_ID_CCD,
.device = PCI_DEVICE_ID_8S,
.subvendor = 0x1397,
.subdevice = 0x16b8,
.driver_data =
(unsigned long) &((hfc4s8s_param) {CHIP_ID_8S, CLOCKMODE_0, 8,
"HFC-8S Evaluation Board"}),
},
"HFC-8S Evaluation Board"}),
},
{.vendor = PCI_VENDOR_ID_CCD,
.device = PCI_DEVICE_ID_4S,
.subvendor = 0x1397,
.subdevice = 0xb520,
.driver_data =
(unsigned long) &((hfc4s8s_param) {CHIP_ID_4S, CLOCKMODE_1, 4,
"IOB4ST"}),
},
"IOB4ST"}),
},
{.vendor = PCI_VENDOR_ID_CCD,
.device = PCI_DEVICE_ID_8S,
.subvendor = 0x1397,
.subdevice = 0xb522,
.driver_data =
(unsigned long) &((hfc4s8s_param) {CHIP_ID_8S, CLOCKMODE_1, 8,
"IOB8ST"}),
},
"IOB8ST"}),
},
{}
};
@@ -203,14 +203,14 @@ typedef struct _hfc4s8s_hw {
#ifdef HISAX_HFC4S8S_PCIMEM /* inline functions memory mapped */
/* memory write and dummy IO read to avoid PCI byte merge problems */
#define Write_hfc8(a,b,c) {(*((volatile u_char *)(a->membase+b)) = c); inb(a->iobase+4);}
#define Write_hfc8(a, b, c) {(*((volatile u_char *)(a->membase + b)) = c); inb(a->iobase + 4);}
/* memory write without dummy IO access for fifo data access */
#define fWrite_hfc8(a,b,c) (*((volatile u_char *)(a->membase+b)) = c)
#define Read_hfc8(a,b) (*((volatile u_char *)(a->membase+b)))
#define Write_hfc16(a,b,c) (*((volatile unsigned short *)(a->membase+b)) = c)
#define Read_hfc16(a,b) (*((volatile unsigned short *)(a->membase+b)))
#define Write_hfc32(a,b,c) (*((volatile unsigned long *)(a->membase+b)) = c)
#define Read_hfc32(a,b) (*((volatile unsigned long *)(a->membase+b)))
#define fWrite_hfc8(a, b, c) (*((volatile u_char *)(a->membase + b)) = c)
#define Read_hfc8(a, b) (*((volatile u_char *)(a->membase + b)))
#define Write_hfc16(a, b, c) (*((volatile unsigned short *)(a->membase + b)) = c)
#define Read_hfc16(a, b) (*((volatile unsigned short *)(a->membase + b)))
#define Write_hfc32(a, b, c) (*((volatile unsigned long *)(a->membase + b)) = c)
#define Read_hfc32(a, b) (*((volatile unsigned long *)(a->membase + b)))
#define wait_busy(a) {while ((Read_hfc8(a, R_STATUS) & M_BUSY));}
#define PCI_ENA_MEMIO 0x03
@@ -218,87 +218,87 @@ typedef struct _hfc4s8s_hw {
/* inline functions io mapped */
static inline void
SetRegAddr(hfc4s8s_hw * a, u_char b)
SetRegAddr(hfc4s8s_hw *a, u_char b)
{
outb(b, (a->iobase) + 4);
}
static inline u_char
GetRegAddr(hfc4s8s_hw * a)
GetRegAddr(hfc4s8s_hw *a)
{
return (inb((volatile u_int) (a->iobase + 4)));
}
static inline void
Write_hfc8(hfc4s8s_hw * a, u_char b, u_char c)
Write_hfc8(hfc4s8s_hw *a, u_char b, u_char c)
{
SetRegAddr(a, b);
outb(c, a->iobase);
}
static inline void
fWrite_hfc8(hfc4s8s_hw * a, u_char c)
fWrite_hfc8(hfc4s8s_hw *a, u_char c)
{
outb(c, a->iobase);
}
static inline void
Write_hfc16(hfc4s8s_hw * a, u_char b, u_short c)
Write_hfc16(hfc4s8s_hw *a, u_char b, u_short c)
{
SetRegAddr(a, b);
outw(c, a->iobase);
}
static inline void
Write_hfc32(hfc4s8s_hw * a, u_char b, u_long c)
Write_hfc32(hfc4s8s_hw *a, u_char b, u_long c)
{
SetRegAddr(a, b);
outl(c, a->iobase);
}
static inline void
fWrite_hfc32(hfc4s8s_hw * a, u_long c)
fWrite_hfc32(hfc4s8s_hw *a, u_long c)
{
outl(c, a->iobase);
}
static inline u_char
Read_hfc8(hfc4s8s_hw * a, u_char b)
Read_hfc8(hfc4s8s_hw *a, u_char b)
{
SetRegAddr(a, b);
return (inb((volatile u_int) a->iobase));
}
static inline u_char
fRead_hfc8(hfc4s8s_hw * a)
fRead_hfc8(hfc4s8s_hw *a)
{
return (inb((volatile u_int) a->iobase));
}
static inline u_short
Read_hfc16(hfc4s8s_hw * a, u_char b)
Read_hfc16(hfc4s8s_hw *a, u_char b)
{
SetRegAddr(a, b);
return (inw((volatile u_int) a->iobase));
}
static inline u_long
Read_hfc32(hfc4s8s_hw * a, u_char b)
Read_hfc32(hfc4s8s_hw *a, u_char b)
{
SetRegAddr(a, b);
return (inl((volatile u_int) a->iobase));
}
static inline u_long
fRead_hfc32(hfc4s8s_hw * a)
fRead_hfc32(hfc4s8s_hw *a)
{
return (inl((volatile u_int) a->iobase));
}
static inline void
wait_busy(hfc4s8s_hw * a)
wait_busy(hfc4s8s_hw *a)
{
SetRegAddr(a, R_STATUS);
while (inb((volatile u_int) a->iobase) & M_BUSY);
@@ -313,7 +313,7 @@ wait_busy(hfc4s8s_hw * a)
/* may be updated by the chip during read */
/******************************************************/
static u_char
Read_hfc8_stable(hfc4s8s_hw * hw, int reg)
Read_hfc8_stable(hfc4s8s_hw *hw, int reg)
{
u_char ref8;
u_char in8;
@@ -325,7 +325,7 @@ Read_hfc8_stable(hfc4s8s_hw * hw, int reg)
}
static int
Read_hfc16_stable(hfc4s8s_hw * hw, int reg)
Read_hfc16_stable(hfc4s8s_hw *hw, int reg)
{
int ref16;
int in16;
@@ -349,67 +349,67 @@ dch_l2l1(struct hisax_d_if *iface, int pr, void *arg)
switch (pr) {
case (PH_DATA | REQUEST):
if (!l1->enabled) {
dev_kfree_skb(skb);
break;
}
spin_lock_irqsave(&l1->lock, flags);
skb_queue_tail(&l1->d_tx_queue, skb);
if ((skb_queue_len(&l1->d_tx_queue) == 1) &&
(l1->tx_cnt <= 0)) {
l1->hw->mr.r_irq_fifo_blx[l1->st_num] |=
0x10;
spin_unlock_irqrestore(&l1->lock, flags);
schedule_work(&l1->hw->tqueue);
} else
spin_unlock_irqrestore(&l1->lock, flags);
case (PH_DATA | REQUEST):
if (!l1->enabled) {
dev_kfree_skb(skb);
break;
}
spin_lock_irqsave(&l1->lock, flags);
skb_queue_tail(&l1->d_tx_queue, skb);
if ((skb_queue_len(&l1->d_tx_queue) == 1) &&
(l1->tx_cnt <= 0)) {
l1->hw->mr.r_irq_fifo_blx[l1->st_num] |=
0x10;
spin_unlock_irqrestore(&l1->lock, flags);
schedule_work(&l1->hw->tqueue);
} else
spin_unlock_irqrestore(&l1->lock, flags);
break;
case (PH_ACTIVATE | REQUEST):
if (!l1->enabled)
break;
if (!l1->nt_mode) {
if (l1->l1_state < 6) {
spin_lock_irqsave(&l1->lock,
flags);
Write_hfc8(l1->hw, R_ST_SEL,
l1->st_num);
Write_hfc8(l1->hw, A_ST_WR_STA,
0x60);
mod_timer(&l1->l1_timer,
jiffies + L1_TIMER_T3);
spin_unlock_irqrestore(&l1->lock,
flags);
} else if (l1->l1_state == 7)
l1->d_if.ifc.l1l2(&l1->d_if.ifc,
PH_ACTIVATE |
INDICATION,
NULL);
} else {
if (l1->l1_state != 3) {
spin_lock_irqsave(&l1->lock,
flags);
Write_hfc8(l1->hw, R_ST_SEL,
l1->st_num);
Write_hfc8(l1->hw, A_ST_WR_STA,
0x60);
spin_unlock_irqrestore(&l1->lock,
flags);
} else if (l1->l1_state == 3)
l1->d_if.ifc.l1l2(&l1->d_if.ifc,
PH_ACTIVATE |
INDICATION,
NULL);
}
case (PH_ACTIVATE | REQUEST):
if (!l1->enabled)
break;
if (!l1->nt_mode) {
if (l1->l1_state < 6) {
spin_lock_irqsave(&l1->lock,
flags);
default:
printk(KERN_INFO
"HFC-4S/8S: Unknown D-chan cmd 0x%x received, ignored\n",
pr);
break;
Write_hfc8(l1->hw, R_ST_SEL,
l1->st_num);
Write_hfc8(l1->hw, A_ST_WR_STA,
0x60);
mod_timer(&l1->l1_timer,
jiffies + L1_TIMER_T3);
spin_unlock_irqrestore(&l1->lock,
flags);
} else if (l1->l1_state == 7)
l1->d_if.ifc.l1l2(&l1->d_if.ifc,
PH_ACTIVATE |
INDICATION,
NULL);
} else {
if (l1->l1_state != 3) {
spin_lock_irqsave(&l1->lock,
flags);
Write_hfc8(l1->hw, R_ST_SEL,
l1->st_num);
Write_hfc8(l1->hw, A_ST_WR_STA,
0x60);
spin_unlock_irqrestore(&l1->lock,
flags);
} else if (l1->l1_state == 3)
l1->d_if.ifc.l1l2(&l1->d_if.ifc,
PH_ACTIVATE |
INDICATION,
NULL);
}
break;
default:
printk(KERN_INFO
"HFC-4S/8S: Unknown D-chan cmd 0x%x received, ignored\n",
pr);
break;
}
if (!l1->enabled)
l1->d_if.ifc.l1l2(&l1->d_if.ifc,
@@ -430,199 +430,199 @@ bch_l2l1(struct hisax_if *ifc, int pr, void *arg)
switch (pr) {
case (PH_DATA | REQUEST):
if (!l1->enabled || (bch->mode == L1_MODE_NULL)) {
dev_kfree_skb(skb);
break;
}
spin_lock_irqsave(&l1->lock, flags);
skb_queue_tail(&bch->tx_queue, skb);
if (!bch->tx_skb && (bch->tx_cnt <= 0)) {
l1->hw->mr.r_irq_fifo_blx[l1->st_num] |=
((bch->bchan == 1) ? 1 : 4);
spin_unlock_irqrestore(&l1->lock, flags);
schedule_work(&l1->hw->tqueue);
} else
spin_unlock_irqrestore(&l1->lock, flags);
case (PH_DATA | REQUEST):
if (!l1->enabled || (bch->mode == L1_MODE_NULL)) {
dev_kfree_skb(skb);
break;
}
spin_lock_irqsave(&l1->lock, flags);
skb_queue_tail(&bch->tx_queue, skb);
if (!bch->tx_skb && (bch->tx_cnt <= 0)) {
l1->hw->mr.r_irq_fifo_blx[l1->st_num] |=
((bch->bchan == 1) ? 1 : 4);
spin_unlock_irqrestore(&l1->lock, flags);
schedule_work(&l1->hw->tqueue);
} else
spin_unlock_irqrestore(&l1->lock, flags);
break;
case (PH_ACTIVATE | REQUEST):
case (PH_DEACTIVATE | REQUEST):
if (!l1->enabled)
break;
if (pr == (PH_DEACTIVATE | REQUEST))
mode = L1_MODE_NULL;
switch (mode) {
case L1_MODE_HDLC:
spin_lock_irqsave(&l1->lock,
flags);
l1->hw->mr.timer_usg_cnt++;
l1->hw->mr.
fifo_slow_timer_service[l1->
st_num]
|=
((bch->bchan ==
1) ? 0x2 : 0x8);
Write_hfc8(l1->hw, R_FIFO,
(l1->st_num * 8 +
((bch->bchan ==
1) ? 0 : 2)));
wait_busy(l1->hw);
Write_hfc8(l1->hw, A_CON_HDLC, 0xc); /* HDLC mode, flag fill, connect ST */
Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
Write_hfc8(l1->hw, A_IRQ_MSK, 1); /* enable TX interrupts for hdlc */
Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
wait_busy(l1->hw);
Write_hfc8(l1->hw, R_FIFO,
(l1->st_num * 8 +
((bch->bchan ==
1) ? 1 : 3)));
wait_busy(l1->hw);
Write_hfc8(l1->hw, A_CON_HDLC, 0xc); /* HDLC mode, flag fill, connect ST */
Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
Write_hfc8(l1->hw, A_IRQ_MSK, 1); /* enable RX interrupts for hdlc */
Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
Write_hfc8(l1->hw, R_ST_SEL,
l1->st_num);
l1->hw->mr.r_ctrl0 |=
(bch->bchan & 3);
Write_hfc8(l1->hw, A_ST_CTRL0,
l1->hw->mr.r_ctrl0);
bch->mode = L1_MODE_HDLC;
spin_unlock_irqrestore(&l1->lock,
flags);
bch->b_if.ifc.l1l2(&bch->b_if.ifc,
PH_ACTIVATE |
INDICATION,
NULL);
break;
case (PH_ACTIVATE | REQUEST):
case (PH_DEACTIVATE | REQUEST):
if (!l1->enabled)
break;
if (pr == (PH_DEACTIVATE | REQUEST))
mode = L1_MODE_NULL;
case L1_MODE_TRANS:
spin_lock_irqsave(&l1->lock,
flags);
l1->hw->mr.
fifo_rx_trans_enables[l1->
st_num]
|=
((bch->bchan ==
1) ? 0x2 : 0x8);
l1->hw->mr.timer_usg_cnt++;
Write_hfc8(l1->hw, R_FIFO,
(l1->st_num * 8 +
((bch->bchan ==
1) ? 0 : 2)));
wait_busy(l1->hw);
Write_hfc8(l1->hw, A_CON_HDLC, 0xf); /* Transparent mode, 1 fill, connect ST */
Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable TX interrupts */
Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
wait_busy(l1->hw);
switch (mode) {
case L1_MODE_HDLC:
spin_lock_irqsave(&l1->lock,
flags);
l1->hw->mr.timer_usg_cnt++;
l1->hw->mr.
fifo_slow_timer_service[l1->
st_num]
|=
((bch->bchan ==
1) ? 0x2 : 0x8);
Write_hfc8(l1->hw, R_FIFO,
(l1->st_num * 8 +
((bch->bchan ==
1) ? 0 : 2)));
wait_busy(l1->hw);
Write_hfc8(l1->hw, A_CON_HDLC, 0xc); /* HDLC mode, flag fill, connect ST */
Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
Write_hfc8(l1->hw, A_IRQ_MSK, 1); /* enable TX interrupts for hdlc */
Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
wait_busy(l1->hw);
Write_hfc8(l1->hw, R_FIFO,
(l1->st_num * 8 +
((bch->bchan ==
1) ? 1 : 3)));
wait_busy(l1->hw);
Write_hfc8(l1->hw, A_CON_HDLC, 0xf); /* Transparent mode, 1 fill, connect ST */
Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable RX interrupts */
Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
Write_hfc8(l1->hw, R_FIFO,
(l1->st_num * 8 +
((bch->bchan ==
1) ? 1 : 3)));
wait_busy(l1->hw);
Write_hfc8(l1->hw, A_CON_HDLC, 0xc); /* HDLC mode, flag fill, connect ST */
Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
Write_hfc8(l1->hw, A_IRQ_MSK, 1); /* enable RX interrupts for hdlc */
Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
Write_hfc8(l1->hw, R_ST_SEL,
l1->st_num);
l1->hw->mr.r_ctrl0 |=
(bch->bchan & 3);
Write_hfc8(l1->hw, A_ST_CTRL0,
l1->hw->mr.r_ctrl0);
bch->mode = L1_MODE_HDLC;
spin_unlock_irqrestore(&l1->lock,
flags);
bch->b_if.ifc.l1l2(&bch->b_if.ifc,
PH_ACTIVATE |
INDICATION,
NULL);
break;
case L1_MODE_TRANS:
spin_lock_irqsave(&l1->lock,
flags);
l1->hw->mr.
fifo_rx_trans_enables[l1->
st_num]
|=
((bch->bchan ==
1) ? 0x2 : 0x8);
l1->hw->mr.timer_usg_cnt++;
Write_hfc8(l1->hw, R_FIFO,
(l1->st_num * 8 +
((bch->bchan ==
1) ? 0 : 2)));
wait_busy(l1->hw);
Write_hfc8(l1->hw, A_CON_HDLC, 0xf); /* Transparent mode, 1 fill, connect ST */
Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable TX interrupts */
Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
wait_busy(l1->hw);
Write_hfc8(l1->hw, R_FIFO,
(l1->st_num * 8 +
((bch->bchan ==
1) ? 1 : 3)));
wait_busy(l1->hw);
Write_hfc8(l1->hw, A_CON_HDLC, 0xf); /* Transparent mode, 1 fill, connect ST */
Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable RX interrupts */
Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
Write_hfc8(l1->hw, R_ST_SEL,
l1->st_num);
l1->hw->mr.r_ctrl0 |=
(bch->bchan & 3);
Write_hfc8(l1->hw, A_ST_CTRL0,
l1->hw->mr.r_ctrl0);
bch->mode = L1_MODE_TRANS;
spin_unlock_irqrestore(&l1->lock,
flags);
bch->b_if.ifc.l1l2(&bch->b_if.ifc,
PH_ACTIVATE |
INDICATION,
NULL);
break;
default:
if (bch->mode == L1_MODE_NULL)
break;
spin_lock_irqsave(&l1->lock,
flags);
l1->hw->mr.
fifo_slow_timer_service[l1->
st_num]
&=
~((bch->bchan ==
1) ? 0x3 : 0xc);
l1->hw->mr.
fifo_rx_trans_enables[l1->
st_num]
&=
~((bch->bchan ==
1) ? 0x3 : 0xc);
l1->hw->mr.timer_usg_cnt--;
Write_hfc8(l1->hw, R_FIFO,
(l1->st_num * 8 +
((bch->bchan ==
1) ? 0 : 2)));
wait_busy(l1->hw);
Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable TX interrupts */
wait_busy(l1->hw);
Write_hfc8(l1->hw, R_FIFO,
(l1->st_num * 8 +
((bch->bchan ==
1) ? 1 : 3)));
wait_busy(l1->hw);
Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable RX interrupts */
Write_hfc8(l1->hw, R_ST_SEL,
l1->st_num);
l1->hw->mr.r_ctrl0 &=
~(bch->bchan & 3);
Write_hfc8(l1->hw, A_ST_CTRL0,
l1->hw->mr.r_ctrl0);
spin_unlock_irqrestore(&l1->lock,
flags);
bch->mode = L1_MODE_NULL;
bch->b_if.ifc.l1l2(&bch->b_if.ifc,
PH_DEACTIVATE |
INDICATION,
NULL);
if (bch->tx_skb) {
dev_kfree_skb(bch->tx_skb);
bch->tx_skb = NULL;
}
if (bch->rx_skb) {
dev_kfree_skb(bch->rx_skb);
bch->rx_skb = NULL;
}
skb_queue_purge(&bch->tx_queue);
bch->tx_cnt = 0;
bch->rx_ptr = NULL;
break;
}
/* timer is only used when at least one b channel */
/* is set up to transparent mode */
if (l1->hw->mr.timer_usg_cnt) {
Write_hfc8(l1->hw, R_IRQMSK_MISC,
M_TI_IRQMSK);
} else {
Write_hfc8(l1->hw, R_IRQMSK_MISC, 0);
}
Write_hfc8(l1->hw, R_ST_SEL,
l1->st_num);
l1->hw->mr.r_ctrl0 |=
(bch->bchan & 3);
Write_hfc8(l1->hw, A_ST_CTRL0,
l1->hw->mr.r_ctrl0);
bch->mode = L1_MODE_TRANS;
spin_unlock_irqrestore(&l1->lock,
flags);
bch->b_if.ifc.l1l2(&bch->b_if.ifc,
PH_ACTIVATE |
INDICATION,
NULL);
break;
default:
printk(KERN_INFO
"HFC-4S/8S: Unknown B-chan cmd 0x%x received, ignored\n",
pr);
if (bch->mode == L1_MODE_NULL)
break;
spin_lock_irqsave(&l1->lock,
flags);
l1->hw->mr.
fifo_slow_timer_service[l1->
st_num]
&=
~((bch->bchan ==
1) ? 0x3 : 0xc);
l1->hw->mr.
fifo_rx_trans_enables[l1->
st_num]
&=
~((bch->bchan ==
1) ? 0x3 : 0xc);
l1->hw->mr.timer_usg_cnt--;
Write_hfc8(l1->hw, R_FIFO,
(l1->st_num * 8 +
((bch->bchan ==
1) ? 0 : 2)));
wait_busy(l1->hw);
Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable TX interrupts */
wait_busy(l1->hw);
Write_hfc8(l1->hw, R_FIFO,
(l1->st_num * 8 +
((bch->bchan ==
1) ? 1 : 3)));
wait_busy(l1->hw);
Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable RX interrupts */
Write_hfc8(l1->hw, R_ST_SEL,
l1->st_num);
l1->hw->mr.r_ctrl0 &=
~(bch->bchan & 3);
Write_hfc8(l1->hw, A_ST_CTRL0,
l1->hw->mr.r_ctrl0);
spin_unlock_irqrestore(&l1->lock,
flags);
bch->mode = L1_MODE_NULL;
bch->b_if.ifc.l1l2(&bch->b_if.ifc,
PH_DEACTIVATE |
INDICATION,
NULL);
if (bch->tx_skb) {
dev_kfree_skb(bch->tx_skb);
bch->tx_skb = NULL;
}
if (bch->rx_skb) {
dev_kfree_skb(bch->rx_skb);
bch->rx_skb = NULL;
}
skb_queue_purge(&bch->tx_queue);
bch->tx_cnt = 0;
bch->rx_ptr = NULL;
break;
}
/* timer is only used when at least one b channel */
/* is set up to transparent mode */
if (l1->hw->mr.timer_usg_cnt) {
Write_hfc8(l1->hw, R_IRQMSK_MISC,
M_TI_IRQMSK);
} else {
Write_hfc8(l1->hw, R_IRQMSK_MISC, 0);
}
break;
default:
printk(KERN_INFO
"HFC-4S/8S: Unknown B-chan cmd 0x%x received, ignored\n",
pr);
break;
}
if (!l1->enabled)
bch->b_if.ifc.l1l2(&bch->b_if.ifc,
@@ -742,7 +742,7 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech)
#ifdef HISAX_HFC4S8S_PCIMEM
Read_hfc8(l1p->hw, A_FIFO_DATA0);
#else
fRead_hfc8(l1p->hw);
fRead_hfc8(l1p->hw);
#endif
Write_hfc8(l1p->hw, A_INC_RES_FIFO, 1);
@@ -760,7 +760,7 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech)
while (z1 >= 4) {
#ifdef HISAX_HFC4S8S_PCIMEM
*((unsigned long *) cp) =
Read_hfc32(l1p->hw, A_FIFO_DATA0);
Read_hfc32(l1p->hw, A_FIFO_DATA0);
#else
*((unsigned long *) cp) = fRead_hfc32(l1p->hw);
#endif
@@ -772,7 +772,7 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech)
#ifdef HISAX_HFC4S8S_PCIMEM
*cp++ = Read_hfc8(l1p->hw, A_FIFO_DATA0);
#else
*cp++ = fRead_hfc8(l1p->hw);
*cp++ = fRead_hfc8(l1p->hw);
#endif
Write_hfc8(l1p->hw, A_INC_RES_FIFO, 1); /* increment f counter */
@@ -866,10 +866,10 @@ rx_b_frame(struct hfc4s8s_btype *bch)
while (z1 >= 4) {
#ifdef HISAX_HFC4S8S_PCIMEM
*((unsigned long *) bch->rx_ptr) =
Read_hfc32(l1->hw, A_FIFO_DATA0);
Read_hfc32(l1->hw, A_FIFO_DATA0);
#else
*((unsigned long *) bch->rx_ptr) =
fRead_hfc32(l1->hw);
fRead_hfc32(l1->hw);
#endif
bch->rx_ptr += 4;
z1 -= 4;
@@ -879,7 +879,7 @@ rx_b_frame(struct hfc4s8s_btype *bch)
#ifdef HISAX_HFC4S8S_PCIMEM
*(bch->rx_ptr++) = Read_hfc8(l1->hw, A_FIFO_DATA0);
#else
*(bch->rx_ptr++) = fRead_hfc8(l1->hw);
*(bch->rx_ptr++) = fRead_hfc8(l1->hw);
#endif
if (hdlc_complete) {
@@ -996,7 +996,7 @@ tx_b_frame(struct hfc4s8s_btype *bch)
if (bch->mode == L1_MODE_HDLC) {
hdlc_num = Read_hfc8(l1->hw, A_F1) & MAX_F_CNT;
hdlc_num -=
(Read_hfc8_stable(l1->hw, A_F2) & MAX_F_CNT);
(Read_hfc8_stable(l1->hw, A_F2) & MAX_F_CNT);
if (hdlc_num < 0)
hdlc_num += 16;
if (hdlc_num >= 15)
@@ -1008,7 +1008,7 @@ tx_b_frame(struct hfc4s8s_btype *bch)
if (!(skb = skb_dequeue(&bch->tx_queue))) {
l1->hw->mr.fifo_slow_timer_service[l1->
st_num]
&= ~((bch->bchan == 1) ? 1 : 4);
&= ~((bch->bchan == 1) ? 1 : 4);
break; /* list empty */
}
bch->tx_skb = skb;
@@ -1017,10 +1017,10 @@ tx_b_frame(struct hfc4s8s_btype *bch)
if (!hdlc_num)
l1->hw->mr.fifo_slow_timer_service[l1->st_num] |=
((bch->bchan == 1) ? 1 : 4);
((bch->bchan == 1) ? 1 : 4);
else
l1->hw->mr.fifo_slow_timer_service[l1->st_num] &=
~((bch->bchan == 1) ? 1 : 4);
~((bch->bchan == 1) ? 1 : 4);
max = Read_hfc16_stable(l1->hw, A_Z2);
max -= Read_hfc16(l1->hw, A_Z1);
@@ -1055,7 +1055,7 @@ tx_b_frame(struct hfc4s8s_btype *bch)
#ifdef HISAX_HFC4S8S_PCIMEM
fWrite_hfc8(l1->hw, A_FIFO_DATA0, *cp++);
#else
fWrite_hfc8(l1->hw, *cp++);
fWrite_hfc8(l1->hw, *cp++);
#endif
if (bch->tx_cnt >= skb->len) {
@@ -1106,8 +1106,8 @@ hfc4s8s_bh(struct work_struct *work)
Write_hfc8(l1p->hw, R_ST_SEL,
l1p->st_num);
l1p->l1_state =
Read_hfc8(l1p->hw,
A_ST_RD_STA) & 0xf;
Read_hfc8(l1p->hw,
A_ST_RD_STA) & 0xf;
if ((oldstate == 3)
&& (l1p->l1_state != 3))
@@ -1123,12 +1123,12 @@ hfc4s8s_bh(struct work_struct *work)
del_timer(&l1p->l1_timer);
if (l1p->l1_state == 3) {
l1p->d_if.ifc.
l1l2(&l1p->
d_if.ifc,
PH_ACTIVATE
|
INDICATION,
NULL);
l1l2(&l1p->
d_if.ifc,
PH_ACTIVATE
|
INDICATION,
NULL);
}
} else {
/* allow transition */
@@ -1148,8 +1148,8 @@ hfc4s8s_bh(struct work_struct *work)
Write_hfc8(l1p->hw, R_ST_SEL,
l1p->st_num);
l1p->l1_state =
Read_hfc8(l1p->hw,
A_ST_RD_STA) & 0xf;
Read_hfc8(l1p->hw,
A_ST_RD_STA) & 0xf;
if (((l1p->l1_state == 3) &&
((oldstate == 7) ||
@@ -1165,26 +1165,26 @@ hfc4s8s_bh(struct work_struct *work)
del_timer(&l1p->
l1_timer);
l1p->d_if.ifc.
l1l2(&l1p->
d_if.ifc,
PH_ACTIVATE
|
INDICATION,
NULL);
l1l2(&l1p->
d_if.ifc,
PH_ACTIVATE
|
INDICATION,
NULL);
tx_d_frame(l1p);
}
if (l1p->l1_state == 3) {
if (oldstate != 3)
l1p->d_if.
ifc.
l1l2
(&l1p->
d_if.
ifc,
PH_DEACTIVATE
|
INDICATION,
NULL);
ifc.
l1l2
(&l1p->
d_if.
ifc,
PH_DEACTIVATE
|
INDICATION,
NULL);
}
}
printk(KERN_INFO
@@ -1209,8 +1209,8 @@ hfc4s8s_bh(struct work_struct *work)
*fifo_stat |= hw->mr.fifo_rx_trans_enables[idx];
if (hw->fifo_sched_cnt <= 0) {
*fifo_stat |=
hw->mr.fifo_slow_timer_service[l1p->
st_num];
hw->mr.fifo_slow_timer_service[l1p->
st_num];
}
}
/* ignore fifo 6 (TX E fifo) */
@@ -1288,10 +1288,10 @@ hfc4s8s_interrupt(int intno, void *dev_id)
/* Layer 1 State change */
hw->mr.r_irq_statech |=
(Read_hfc8(hw, R_SCI) & hw->mr.r_irqmsk_statchg);
(Read_hfc8(hw, R_SCI) & hw->mr.r_irqmsk_statchg);
if (!
(b = (Read_hfc8(hw, R_STATUS) & (M_MISC_IRQSTA | M_FR_IRQSTA)))
&& !hw->mr.r_irq_statech) {
&& !hw->mr.r_irq_statech) {
#ifndef HISAX_HFC4S8S_PCIMEM
SetRegAddr(hw, old_ioreg);
#endif
@@ -1332,7 +1332,7 @@ hfc4s8s_interrupt(int intno, void *dev_id)
/* reset the complete chip, don't release the chips irq but disable it */
/***********************************************************************/
static void
chipreset(hfc4s8s_hw * hw)
chipreset(hfc4s8s_hw *hw)
{
u_long flags;
@@ -1361,7 +1361,7 @@ chipreset(hfc4s8s_hw * hw)
/* disable/enable hardware in nt or te mode */
/********************************************/
static void
hfc_hardware_enable(hfc4s8s_hw * hw, int enable, int nt_mode)
hfc_hardware_enable(hfc4s8s_hw *hw, int enable, int nt_mode)
{
u_long flags;
char if_name[40];
@@ -1468,7 +1468,7 @@ hfc_hardware_enable(hfc4s8s_hw * hw, int enable, int nt_mode)
/* disable memory mapped ports / io ports */
/******************************************/
static void
release_pci_ports(hfc4s8s_hw * hw)
release_pci_ports(hfc4s8s_hw *hw)
{
pci_write_config_word(hw->pdev, PCI_COMMAND, 0);
#ifdef HISAX_HFC4S8S_PCIMEM
@@ -1484,7 +1484,7 @@ release_pci_ports(hfc4s8s_hw * hw)
/* enable memory mapped ports / io ports */
/*****************************************/
static void
enable_pci_ports(hfc4s8s_hw * hw)
enable_pci_ports(hfc4s8s_hw *hw)
{
#ifdef HISAX_HFC4S8S_PCIMEM
pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_MEMIO);
@@ -1498,7 +1498,7 @@ enable_pci_ports(hfc4s8s_hw * hw)
/* return 0 on success. */
/*************************************/
static int __devinit
setup_instance(hfc4s8s_hw * hw)
setup_instance(hfc4s8s_hw *hw)
{
int err = -EIO;
int i;
@@ -1575,7 +1575,7 @@ setup_instance(hfc4s8s_hw * hw)
return (0);
out:
out:
hw->irq = 0;
release_pci_ports(hw);
kfree(hw);
@@ -1632,7 +1632,7 @@ hfc4s8s_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
card_cnt++;
return (err);
out:
out:
kfree(hw);
return (err);
}
@@ -1660,10 +1660,10 @@ hfc4s8s_remove(struct pci_dev *pdev)
}
static struct pci_driver hfc4s8s_driver = {
.name = "hfc4s8s_l1",
.probe = hfc4s8s_probe,
.remove = __devexit_p(hfc4s8s_remove),
.id_table = hfc4s8s_ids,
.name = "hfc4s8s_l1",
.probe = hfc4s8s_probe,
.remove = __devexit_p(hfc4s8s_remove),
.id_table = hfc4s8s_ids,
};
/**********************/
@@ -1697,7 +1697,7 @@ hfc4s8s_module_init(void)
#endif
return 0;
out:
out:
return (err);
} /* hfc4s8s_init_hw */

Visa fil

@@ -15,10 +15,10 @@
/*
* include Genero generated HFC-4S/8S header file hfc48scu.h
* for complete register description. This will define _HFC48SCU_H_
* to prevent redefinitions
*/
* include Genero generated HFC-4S/8S header file hfc48scu.h
* for complete register description. This will define _HFC48SCU_H_
* to prevent redefinitions
*/
// #include "hfc48scu.h"

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -18,15 +18,15 @@
#include "isdnl1.h"
#include <linux/interrupt.h>
/*
#define KDEBUG_DEF
#include "kdebug.h"
#define KDEBUG_DEF
#include "kdebug.h"
*/
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
static void
dummyf(struct IsdnCardState *cs, u_char * data, int size)
dummyf(struct IsdnCardState *cs, u_char *data, int size)
{
printk(KERN_WARNING "HiSax: hfcd dummy fifo called\n");
}
@@ -37,7 +37,7 @@ ReadReg(struct IsdnCardState *cs, int data, u_char reg)
register u_char ret;
if (data) {
if (cs->hw.hfcD.cip != reg) {
if (cs->hw.hfcD.cip != reg) {
cs->hw.hfcD.cip = reg;
byteout(cs->hw.hfcD.addr | 1, reg);
}
@@ -54,7 +54,7 @@ ReadReg(struct IsdnCardState *cs, int data, u_char reg)
static inline void
WriteReg(struct IsdnCardState *cs, int data, u_char reg, u_char value)
{
if (cs->hw.hfcD.cip != reg) {
if (cs->hw.hfcD.cip != reg) {
cs->hw.hfcD.cip = reg;
byteout(cs->hw.hfcD.addr | 1, reg);
}
@@ -71,7 +71,7 @@ WriteReg(struct IsdnCardState *cs, int data, u_char reg, u_char value)
static u_char
readreghfcd(struct IsdnCardState *cs, u_char offset)
{
return(ReadReg(cs, HFCD_DATA, offset));
return (ReadReg(cs, HFCD_DATA, offset));
}
static void
@@ -103,7 +103,7 @@ WaitNoBusy(struct IsdnCardState *cs)
udelay(1);
to--;
}
if (!to)
if (!to)
printk(KERN_WARNING "HiSax: WaitNoBusy timeout\n");
return (to);
}
@@ -114,29 +114,29 @@ SelFiFo(struct IsdnCardState *cs, u_char FiFo)
u_char cip;
if (cs->hw.hfcD.fifo == FiFo)
return(1);
switch(FiFo) {
case 0: cip = HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_B1;
break;
case 1: cip = HFCB_FIFO | HFCB_Z1 | HFCB_REC | HFCB_B1;
break;
case 2: cip = HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_B2;
break;
case 3: cip = HFCB_FIFO | HFCB_Z1 | HFCB_REC | HFCB_B2;
break;
case 4: cip = HFCD_FIFO | HFCD_Z1 | HFCD_SEND;
break;
case 5: cip = HFCD_FIFO | HFCD_Z1 | HFCD_REC;
break;
default:
debugl1(cs, "SelFiFo Error");
return(0);
return (1);
switch (FiFo) {
case 0: cip = HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_B1;
break;
case 1: cip = HFCB_FIFO | HFCB_Z1 | HFCB_REC | HFCB_B1;
break;
case 2: cip = HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_B2;
break;
case 3: cip = HFCB_FIFO | HFCB_Z1 | HFCB_REC | HFCB_B2;
break;
case 4: cip = HFCD_FIFO | HFCD_Z1 | HFCD_SEND;
break;
case 5: cip = HFCD_FIFO | HFCD_Z1 | HFCD_REC;
break;
default:
debugl1(cs, "SelFiFo Error");
return (0);
}
cs->hw.hfcD.fifo = FiFo;
WaitNoBusy(cs);
cs->BC_Write_Reg(cs, HFCD_DATA, cip, 0);
WaitForBusy(cs);
return(2);
return (2);
}
static int
@@ -188,7 +188,7 @@ static struct sk_buff
int idx;
int chksum;
u_char stat, cip;
if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
debugl1(cs, "hfc_empty_fifo");
idx = 0;
@@ -252,7 +252,7 @@ static struct sk_buff
WaitForBusy(cs);
WaitNoBusy(cs);
stat = ReadReg(cs, HFCD_DATA, HFCB_FIFO | HFCB_F2_INC |
HFCB_REC | HFCB_CHANNEL(bcs->channel));
HFCB_REC | HFCB_CHANNEL(bcs->channel));
WaitForBusy(cs);
return (skb);
}
@@ -269,7 +269,7 @@ hfc_fill_fifo(struct BCState *bcs)
return;
if (bcs->tx_skb->len <= 0)
return;
SelFiFo(cs, HFCB_SEND | HFCB_CHANNEL(bcs->channel));
SelFiFo(cs, HFCB_SEND | HFCB_CHANNEL(bcs->channel));
cip = HFCB_FIFO | HFCB_F1 | HFCB_SEND | HFCB_CHANNEL(bcs->channel);
WaitNoBusy(cs);
bcs->hw.hfc.f1 = ReadReg(cs, HFCD_DATA, cip);
@@ -278,7 +278,7 @@ hfc_fill_fifo(struct BCState *bcs)
WaitNoBusy(cs);
bcs->hw.hfc.f2 = ReadReg(cs, HFCD_DATA, cip);
bcs->hw.hfc.send[bcs->hw.hfc.f1] = ReadZReg(cs, HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_CHANNEL(bcs->channel));
if (cs->debug & L1_DEB_HSCX)
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_fill_fifo %d f1(%d) f2(%d) z1(%x)",
bcs->channel, bcs->hw.hfc.f1, bcs->hw.hfc.f2,
bcs->hw.hfc.send[bcs->hw.hfc.f1]);
@@ -316,8 +316,8 @@ hfc_fill_fifo(struct BCState *bcs)
printk(KERN_WARNING "HFC S FIFO channel %d BUSY Error\n", bcs->channel);
} else {
bcs->tx_cnt -= bcs->tx_skb->len;
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
u_long flags;
spin_lock_irqsave(&bcs->aclock, flags);
bcs->ackcnt += bcs->tx_skb->len;
@@ -339,12 +339,12 @@ static void
hfc_send_data(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfc_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs,"send_data %d blocked", bcs->channel);
debugl1(cs, "send_data %d blocked", bcs->channel);
}
static void
@@ -356,10 +356,10 @@ main_rec_2bds0(struct BCState *bcs)
int receive, count = 5;
struct sk_buff *skb;
Begin:
Begin:
count--;
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
debugl1(cs,"rec_data %d blocked", bcs->channel);
debugl1(cs, "rec_data %d blocked", bcs->channel);
return;
}
SelFiFo(cs, HFCB_REC | HFCB_CHANNEL(bcs->channel));
@@ -386,10 +386,10 @@ main_rec_2bds0(struct BCState *bcs)
skb_queue_tail(&bcs->rqueue, skb);
schedule_event(bcs, B_RCVBUFREADY);
}
rcnt = f1 -f2;
if (rcnt<0)
rcnt = f1 - f2;
if (rcnt < 0)
rcnt += 32;
if (rcnt>1)
if (rcnt > 1)
receive = 1;
else
receive = 0;
@@ -397,7 +397,7 @@ main_rec_2bds0(struct BCState *bcs)
receive = 0;
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
if (count && receive)
goto Begin;
goto Begin;
return;
}
@@ -412,37 +412,37 @@ mode_2bs0(struct BCState *bcs, int mode, int bc)
bcs->mode = mode;
bcs->channel = bc;
switch (mode) {
case (L1_MODE_NULL):
if (bc) {
cs->hw.hfcD.conn |= 0x18;
cs->hw.hfcD.sctrl &= ~SCTRL_B2_ENA;
} else {
cs->hw.hfcD.conn |= 0x3;
cs->hw.hfcD.sctrl &= ~SCTRL_B1_ENA;
}
break;
case (L1_MODE_TRANS):
if (bc) {
cs->hw.hfcD.ctmt |= 2;
cs->hw.hfcD.conn &= ~0x18;
cs->hw.hfcD.sctrl |= SCTRL_B2_ENA;
} else {
cs->hw.hfcD.ctmt |= 1;
cs->hw.hfcD.conn &= ~0x3;
cs->hw.hfcD.sctrl |= SCTRL_B1_ENA;
}
break;
case (L1_MODE_HDLC):
if (bc) {
cs->hw.hfcD.ctmt &= ~2;
cs->hw.hfcD.conn &= ~0x18;
cs->hw.hfcD.sctrl |= SCTRL_B2_ENA;
} else {
cs->hw.hfcD.ctmt &= ~1;
cs->hw.hfcD.conn &= ~0x3;
cs->hw.hfcD.sctrl |= SCTRL_B1_ENA;
}
break;
case (L1_MODE_NULL):
if (bc) {
cs->hw.hfcD.conn |= 0x18;
cs->hw.hfcD.sctrl &= ~SCTRL_B2_ENA;
} else {
cs->hw.hfcD.conn |= 0x3;
cs->hw.hfcD.sctrl &= ~SCTRL_B1_ENA;
}
break;
case (L1_MODE_TRANS):
if (bc) {
cs->hw.hfcD.ctmt |= 2;
cs->hw.hfcD.conn &= ~0x18;
cs->hw.hfcD.sctrl |= SCTRL_B2_ENA;
} else {
cs->hw.hfcD.ctmt |= 1;
cs->hw.hfcD.conn &= ~0x3;
cs->hw.hfcD.sctrl |= SCTRL_B1_ENA;
}
break;
case (L1_MODE_HDLC):
if (bc) {
cs->hw.hfcD.ctmt &= ~2;
cs->hw.hfcD.conn &= ~0x18;
cs->hw.hfcD.sctrl |= SCTRL_B2_ENA;
} else {
cs->hw.hfcD.ctmt &= ~1;
cs->hw.hfcD.conn &= ~0x3;
cs->hw.hfcD.sctrl |= SCTRL_B1_ENA;
}
break;
}
WriteReg(cs, HFCD_DATA, HFCD_SCTRL, cs->hw.hfcD.sctrl);
WriteReg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcD.ctmt);
@@ -457,53 +457,53 @@ hfc_l2l1(struct PStack *st, int pr, void *arg)
u_long flags;
switch (pr) {
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
} else {
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
} else {
// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
mode_2bs0(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
mode_2bs0(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
bcs->tx_skb = skb;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
mode_2bs0(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
mode_2bs0(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
}
}
@@ -558,23 +558,23 @@ hfcd_bh(struct work_struct *work)
if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) {
switch (cs->dc.hfcd.ph_state) {
case (0):
l1_msg(cs, HW_RESET | INDICATION, NULL);
break;
case (3):
l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
break;
case (8):
l1_msg(cs, HW_RSYNC | INDICATION, NULL);
break;
case (6):
l1_msg(cs, HW_INFO2 | INDICATION, NULL);
break;
case (7):
l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
break;
default:
break;
case (0):
l1_msg(cs, HW_RESET | INDICATION, NULL);
break;
case (3):
l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
break;
case (8):
l1_msg(cs, HW_RSYNC | INDICATION, NULL);
break;
case (6):
l1_msg(cs, HW_INFO2 | INDICATION, NULL);
break;
case (7):
l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
break;
default:
break;
}
}
if (test_and_clear_bit(D_RCVBUFREADY, &cs->event))
@@ -591,12 +591,12 @@ int receive_dmsg(struct IsdnCardState *cs)
int rcnt, z1, z2;
u_char stat, cip, f1, f2;
int chksum;
int count=5;
int count = 5;
u_char *ptr;
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
debugl1(cs, "rec_dmsg blocked");
return(1);
return (1);
}
SelFiFo(cs, 4 | HFCD_REC);
cip = HFCD_FIFO | HFCD_F1 | HFCD_REC;
@@ -682,8 +682,8 @@ int receive_dmsg(struct IsdnCardState *cs)
f2 = cs->readisac(cs, cip) & 0xf;
}
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
return(1);
}
return (1);
}
static void
hfc_fill_dfifo(struct IsdnCardState *cs)
@@ -750,23 +750,23 @@ hfc_fill_dfifo(struct IsdnCardState *cs)
return;
}
static
static
struct BCState *Sel_BCS(struct IsdnCardState *cs, int channel)
{
if (cs->bcs[0].mode && (cs->bcs[0].channel == channel))
return(&cs->bcs[0]);
return (&cs->bcs[0]);
else if (cs->bcs[1].mode && (cs->bcs[1].channel == channel))
return(&cs->bcs[1]);
return (&cs->bcs[1]);
else
return(NULL);
return (NULL);
}
void
hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
{
u_char exval;
struct BCState *bcs;
int count=15;
u_char exval;
struct BCState *bcs;
int count = 15;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "HFCD irq %x %s", val,
@@ -789,25 +789,25 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
}
if (cs->hw.hfcD.int_s1 & 0x18) {
exval = val;
val = cs->hw.hfcD.int_s1;
val = cs->hw.hfcD.int_s1;
cs->hw.hfcD.int_s1 = exval;
}
}
if (val & 0x08) {
if (!(bcs=Sel_BCS(cs, 0))) {
if (!(bcs = Sel_BCS(cs, 0))) {
if (cs->debug)
debugl1(cs, "hfcd spurious 0x08 IRQ");
} else
} else
main_rec_2bds0(bcs);
}
if (val & 0x10) {
if (!(bcs=Sel_BCS(cs, 1))) {
if (!(bcs = Sel_BCS(cs, 1))) {
if (cs->debug)
debugl1(cs, "hfcd spurious 0x10 IRQ");
} else
} else
main_rec_2bds0(bcs);
}
if (val & 0x01) {
if (!(bcs=Sel_BCS(cs, 0))) {
if (!(bcs = Sel_BCS(cs, 0))) {
if (cs->debug)
debugl1(cs, "hfcd spurious 0x01 IRQ");
} else {
@@ -816,14 +816,14 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
hfc_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs,"fill_data %d blocked", bcs->channel);
debugl1(cs, "fill_data %d blocked", bcs->channel);
} else {
if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfc_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs,"fill_data %d blocked", bcs->channel);
debugl1(cs, "fill_data %d blocked", bcs->channel);
} else {
schedule_event(bcs, B_XMTBUFREADY);
}
@@ -831,7 +831,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
}
}
if (val & 0x02) {
if (!(bcs=Sel_BCS(cs, 1))) {
if (!(bcs = Sel_BCS(cs, 1))) {
if (cs->debug)
debugl1(cs, "hfcd spurious 0x02 IRQ");
} else {
@@ -840,14 +840,14 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
hfc_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs,"fill_data %d blocked", bcs->channel);
debugl1(cs, "fill_data %d blocked", bcs->channel);
} else {
if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfc_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs,"fill_data %d blocked", bcs->channel);
debugl1(cs, "fill_data %d blocked", bcs->channel);
} else {
schedule_event(bcs, B_XMTBUFREADY);
}
@@ -888,7 +888,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
} else
schedule_event(cs, D_XMTBUFREADY);
}
afterXPR:
afterXPR:
if (cs->hw.hfcD.int_s1 && count--) {
val = cs->hw.hfcD.int_s1;
cs->hw.hfcD.int_s1 = 0;
@@ -905,105 +905,105 @@ HFCD_l1hw(struct PStack *st, int pr, void *arg)
struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
struct sk_buff *skb = arg;
u_long flags;
switch (pr) {
case (PH_DATA | REQUEST):
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
skb_queue_tail(&cs->sq, skb);
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA Queued", 0);
#endif
} else {
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA", 0);
#endif
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfc_fill_dfifo(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "hfc_fill_dfifo blocked");
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
spin_unlock_irqrestore(&cs->lock, flags);
break;
}
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
switch (pr) {
case (PH_DATA | REQUEST):
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
skb_queue_tail(&cs->sq, skb);
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA Queued", 0);
#endif
} else {
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
Logl2Frame(cs, skb, "PH_DATA", 0);
#endif
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfc_fill_dfifo(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "hfc_fill_dfifo blocked");
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | REQUEST):
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
debugl1(cs, "-> PH_REQUEST_PULL");
#endif
if (!cs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (HW_RESET | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
cs->writeisac(cs, HFCD_STATES, HFCD_LOAD_STATE | 3); /* HFC ST 3 */
udelay(6);
cs->writeisac(cs, HFCD_STATES, 3); /* HFC ST 2 */
cs->hw.hfcD.mst_m |= HFCD_MASTER;
cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
spin_unlock_irqrestore(&cs->lock, flags);
l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
break;
case (HW_ENABLE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_DEACTIVATE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
cs->hw.hfcD.mst_m &= ~HFCD_MASTER;
cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_INFO3 | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
cs->hw.hfcD.mst_m |= HFCD_MASTER;
cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
spin_unlock_irqrestore(&cs->lock, flags);
break;
default:
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "hfcd_l1hw unknown pr %4x", pr);
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
spin_unlock_irqrestore(&cs->lock, flags);
break;
}
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
#endif
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfc_fill_dfifo(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "hfc_fill_dfifo blocked");
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | REQUEST):
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
debugl1(cs, "-> PH_REQUEST_PULL");
#endif
if (!cs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (HW_RESET | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
cs->writeisac(cs, HFCD_STATES, HFCD_LOAD_STATE | 3); /* HFC ST 3 */
udelay(6);
cs->writeisac(cs, HFCD_STATES, 3); /* HFC ST 2 */
cs->hw.hfcD.mst_m |= HFCD_MASTER;
cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
spin_unlock_irqrestore(&cs->lock, flags);
l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
break;
case (HW_ENABLE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_DEACTIVATE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
cs->hw.hfcD.mst_m &= ~HFCD_MASTER;
cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_INFO3 | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
cs->hw.hfcD.mst_m |= HFCD_MASTER;
cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
spin_unlock_irqrestore(&cs->lock, flags);
break;
default:
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "hfcd_l1hw unknown pr %4x", pr);
break;
}
}
@@ -1027,11 +1027,11 @@ static unsigned int
if (!(send = kmalloc(cnt * sizeof(unsigned int), GFP_ATOMIC))) {
printk(KERN_WARNING
"HiSax: No memory for hfcd.send\n");
return(NULL);
return (NULL);
}
for (i = 0; i < cnt; i++)
send[i] = 0x1fff;
return(send);
return (send);
}
void

Visa fil

@@ -4,26 +4,26 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
*/
#define HFCD_CIRM 0x18
#define HFCD_CIRM 0x18
#define HFCD_CTMT 0x19
#define HFCD_INT_M1 0x1A
#define HFCD_INT_M2 0x1B
#define HFCD_INT_S1 0x1E
#define HFCD_STAT 0x1C
#define HFCD_STAT_DISB 0x1D
#define HFCD_STATES 0x30
#define HFCD_SCTRL 0x31
#define HFCD_TEST 0x32
#define HFCD_SQ 0x34
#define HFCD_CLKDEL 0x37
#define HFCD_INT_M1 0x1A
#define HFCD_INT_M2 0x1B
#define HFCD_INT_S1 0x1E
#define HFCD_STAT 0x1C
#define HFCD_STAT_DISB 0x1D
#define HFCD_STATES 0x30
#define HFCD_SCTRL 0x31
#define HFCD_TEST 0x32
#define HFCD_SQ 0x34
#define HFCD_CLKDEL 0x37
#define HFCD_MST_MODE 0x2E
#define HFCD_CONN 0x2F
#define HFCD_CONN 0x2F
#define HFCD_FIFO 0x80
#define HFCD_Z1 0x10
@@ -79,7 +79,7 @@
#define HFCD_TRANSB1 0x01
/* CIRM (Write) */
#define HFCD_RESET 0x08
#define HFCD_RESET 0x08
#define HFCD_MEM8K 0x10
#define HFCD_INTA 0x01
#define HFCD_INTB 0x02

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -181,9 +181,9 @@ hfc_empty_fifo(struct BCState *bcs, int count)
return (NULL);
}
if (bcs->mode == L1_MODE_TRANS)
count -= 1;
count -= 1;
else
count -= 3;
count -= 3;
if (!(skb = dev_alloc_skb(count)))
printk(KERN_WARNING "HFC: receive out of memory\n");
else {
@@ -199,35 +199,35 @@ hfc_empty_fifo(struct BCState *bcs, int count)
printk(KERN_WARNING "HFC FIFO channel %d BUSY Error\n", bcs->channel);
dev_kfree_skb_any(skb);
if (bcs->mode != L1_MODE_TRANS) {
WaitNoBusy(cs);
stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
HFC_CHANNEL(bcs->channel));
WaitForBusy(cs);
WaitNoBusy(cs);
stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
HFC_CHANNEL(bcs->channel));
WaitForBusy(cs);
}
return (NULL);
}
if (bcs->mode != L1_MODE_TRANS) {
WaitNoBusy(cs);
chksum = (cs->BC_Read_Reg(cs, HFC_DATA, cip) << 8);
WaitNoBusy(cs);
chksum += cs->BC_Read_Reg(cs, HFC_DATA, cip);
WaitNoBusy(cs);
stat = cs->BC_Read_Reg(cs, HFC_DATA, cip);
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_empty_fifo %d chksum %x stat %x",
bcs->channel, chksum, stat);
if (stat) {
debugl1(cs, "FIFO CRC error");
dev_kfree_skb_any(skb);
skb = NULL;
WaitNoBusy(cs);
chksum = (cs->BC_Read_Reg(cs, HFC_DATA, cip) << 8);
WaitNoBusy(cs);
chksum += cs->BC_Read_Reg(cs, HFC_DATA, cip);
WaitNoBusy(cs);
stat = cs->BC_Read_Reg(cs, HFC_DATA, cip);
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_empty_fifo %d chksum %x stat %x",
bcs->channel, chksum, stat);
if (stat) {
debugl1(cs, "FIFO CRC error");
dev_kfree_skb_any(skb);
skb = NULL;
#ifdef ERROR_STATISTIC
bcs->err_crc++;
bcs->err_crc++;
#endif
}
WaitNoBusy(cs);
stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
HFC_CHANNEL(bcs->channel));
WaitForBusy(cs);
}
WaitNoBusy(cs);
stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
HFC_CHANNEL(bcs->channel));
WaitForBusy(cs);
}
}
return (skb);
@@ -249,37 +249,37 @@ hfc_fill_fifo(struct BCState *bcs)
cip = HFC_CIP | HFC_F1 | HFC_SEND | HFC_CHANNEL(bcs->channel);
if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
WaitForBusy(cs);
cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
WaitForBusy(cs);
}
WaitNoBusy(cs);
if (bcs->mode != L1_MODE_TRANS) {
bcs->hw.hfc.f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
cip = HFC_CIP | HFC_F2 | HFC_SEND | HFC_CHANNEL(bcs->channel);
WaitNoBusy(cs);
bcs->hw.hfc.f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
bcs->hw.hfc.send[bcs->hw.hfc.f1] = ReadZReg(bcs, HFC_Z1 | HFC_SEND | HFC_CHANNEL(bcs->channel));
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_fill_fifo %d f1(%d) f2(%d) z1(%x)",
bcs->channel, bcs->hw.hfc.f1, bcs->hw.hfc.f2,
bcs->hw.hfc.send[bcs->hw.hfc.f1]);
fcnt = bcs->hw.hfc.f1 - bcs->hw.hfc.f2;
if (fcnt < 0)
fcnt += 32;
if (fcnt > 30) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_fill_fifo more as 30 frames");
return;
}
count = GetFreeFifoBytes(bcs);
}
bcs->hw.hfc.f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
cip = HFC_CIP | HFC_F2 | HFC_SEND | HFC_CHANNEL(bcs->channel);
WaitNoBusy(cs);
bcs->hw.hfc.f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
bcs->hw.hfc.send[bcs->hw.hfc.f1] = ReadZReg(bcs, HFC_Z1 | HFC_SEND | HFC_CHANNEL(bcs->channel));
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_fill_fifo %d f1(%d) f2(%d) z1(%x)",
bcs->channel, bcs->hw.hfc.f1, bcs->hw.hfc.f2,
bcs->hw.hfc.send[bcs->hw.hfc.f1]);
fcnt = bcs->hw.hfc.f1 - bcs->hw.hfc.f2;
if (fcnt < 0)
fcnt += 32;
if (fcnt > 30) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_fill_fifo more as 30 frames");
return;
}
count = GetFreeFifoBytes(bcs);
}
else {
WaitForBusy(cs);
z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
count = z1 - z2;
if (count < 0)
count += cs->hw.hfc.fifosize;
WaitForBusy(cs);
z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
count = z1 - z2;
if (count < 0)
count += cs->hw.hfc.fifosize;
} /* L1_MODE_TRANS */
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_fill_fifo %d count(%u/%d)",
@@ -305,12 +305,12 @@ hfc_fill_fifo(struct BCState *bcs)
dev_kfree_skb_any(bcs->tx_skb);
bcs->tx_skb = NULL;
if (bcs->mode != L1_MODE_TRANS) {
WaitForBusy(cs);
WaitNoBusy(cs);
cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F1_INC | HFC_SEND | HFC_CHANNEL(bcs->channel));
WaitForBusy(cs);
WaitNoBusy(cs);
cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F1_INC | HFC_SEND | HFC_CHANNEL(bcs->channel));
}
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
(count >= 0)) {
if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
(count >= 0)) {
u_long flags;
spin_lock_irqsave(&bcs->aclock, flags);
bcs->ackcnt += count;
@@ -331,7 +331,7 @@ main_irq_hfc(struct BCState *bcs)
int receive, transmit, count = 5;
struct sk_buff *skb;
Begin:
Begin:
count--;
cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
@@ -349,7 +349,7 @@ main_irq_hfc(struct BCState *bcs)
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc rec %d f1(%d) f2(%d)",
bcs->channel, f1, f2);
receive = 1;
receive = 1;
}
}
if (receive || (bcs->mode == L1_MODE_TRANS)) {
@@ -407,41 +407,41 @@ mode_hfc(struct BCState *bcs, int mode, int bc)
bcs->channel = bc;
switch (mode) {
case (L1_MODE_NULL):
if (bc) {
cs->hw.hfc.ctmt &= ~1;
cs->hw.hfc.isac_spcr &= ~0x03;
}
else {
cs->hw.hfc.ctmt &= ~2;
cs->hw.hfc.isac_spcr &= ~0x0c;
}
break;
case (L1_MODE_TRANS):
cs->hw.hfc.ctmt &= ~(1 << bc); /* set HDLC mode */
cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt);
hfc_clear_fifo(bcs); /* complete fifo clear */
if (bc) {
cs->hw.hfc.ctmt |= 1;
cs->hw.hfc.isac_spcr &= ~0x03;
cs->hw.hfc.isac_spcr |= 0x02;
} else {
cs->hw.hfc.ctmt |= 2;
cs->hw.hfc.isac_spcr &= ~0x0c;
cs->hw.hfc.isac_spcr |= 0x08;
}
break;
case (L1_MODE_HDLC):
if (bc) {
cs->hw.hfc.ctmt &= ~1;
cs->hw.hfc.isac_spcr &= ~0x03;
cs->hw.hfc.isac_spcr |= 0x02;
} else {
cs->hw.hfc.ctmt &= ~2;
cs->hw.hfc.isac_spcr &= ~0x0c;
cs->hw.hfc.isac_spcr |= 0x08;
}
break;
case (L1_MODE_NULL):
if (bc) {
cs->hw.hfc.ctmt &= ~1;
cs->hw.hfc.isac_spcr &= ~0x03;
}
else {
cs->hw.hfc.ctmt &= ~2;
cs->hw.hfc.isac_spcr &= ~0x0c;
}
break;
case (L1_MODE_TRANS):
cs->hw.hfc.ctmt &= ~(1 << bc); /* set HDLC mode */
cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt);
hfc_clear_fifo(bcs); /* complete fifo clear */
if (bc) {
cs->hw.hfc.ctmt |= 1;
cs->hw.hfc.isac_spcr &= ~0x03;
cs->hw.hfc.isac_spcr |= 0x02;
} else {
cs->hw.hfc.ctmt |= 2;
cs->hw.hfc.isac_spcr &= ~0x0c;
cs->hw.hfc.isac_spcr |= 0x08;
}
break;
case (L1_MODE_HDLC):
if (bc) {
cs->hw.hfc.ctmt &= ~1;
cs->hw.hfc.isac_spcr &= ~0x03;
cs->hw.hfc.isac_spcr |= 0x02;
} else {
cs->hw.hfc.ctmt &= ~2;
cs->hw.hfc.isac_spcr &= ~0x0c;
cs->hw.hfc.isac_spcr |= 0x08;
}
break;
}
cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt);
cs->writeisac(cs, ISAC_SPCR, cs->hw.hfc.isac_spcr);
@@ -457,53 +457,53 @@ hfc_l2l1(struct PStack *st, int pr, void *arg)
u_long flags;
switch (pr) {
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
} else {
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
mode_hfc(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
mode_hfc(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
} else {
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
mode_hfc(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
mode_hfc(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
}
}

Visa fil

@@ -4,14 +4,14 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
*/
#define HFC_CTMT 0xe0
#define HFC_CIRM 0xc0
#define HFC_CIRM 0xc0
#define HFC_CIP 0x80
#define HFC_Z1 0x00
#define HFC_Z2 0x08
@@ -46,7 +46,7 @@
#define HFC_TRANSB1 0x01
/* CIRM (Write) */
#define HFC_RESET 0x08
#define HFC_RESET 0x08
#define HFC_MEM8K 0x10
#define HFC_INTA 0x01
#define HFC_INTB 0x02

Visa fil

@@ -57,10 +57,10 @@ static const PCI_ENTRY id_list[] =
{PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_A1T, "German telekom", "A1T"},
{PCI_VENDOR_ID_ANIGMA, PCI_DEVICE_ID_ANIGMA_MC145575, "Motorola MC145575", "MC145575"},
{PCI_VENDOR_ID_ZOLTRIX, PCI_DEVICE_ID_ZOLTRIX_2BD0, "Zoltrix", "2BD0"},
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_E,"Digi International", "Digi DataFire Micro V IOM2 (Europe)"},
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_E,"Digi International", "Digi DataFire Micro V (Europe)"},
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_A,"Digi International", "Digi DataFire Micro V IOM2 (North America)"},
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_A,"Digi International", "Digi DataFire Micro V (North America)"},
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_E, "Digi International", "Digi DataFire Micro V IOM2 (Europe)"},
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_E, "Digi International", "Digi DataFire Micro V (Europe)"},
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_A, "Digi International", "Digi DataFire Micro V IOM2 (North America)"},
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_A, "Digi International", "Digi DataFire Micro V (North America)"},
{PCI_VENDOR_ID_SITECOM, PCI_DEVICE_ID_SITECOM_DC105V2, "Sitecom Europe", "DC-105 ISDN PCI"},
{0, 0, NULL, NULL},
};
@@ -73,7 +73,7 @@ static void
release_io_hfcpci(struct IsdnCardState *cs)
{
printk(KERN_INFO "HiSax: release hfcpci at %p\n",
cs->hw.hfcpci.pci_io);
cs->hw.hfcpci.pci_io);
cs->hw.hfcpci.int_m2 = 0; /* interrupt output off ! */
Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2);
Write_hfc(cs, HFCPCI_CIRM, HFCPCI_RESET); /* Reset On */
@@ -84,7 +84,7 @@ release_io_hfcpci(struct IsdnCardState *cs)
pci_write_config_word(cs->hw.hfcpci.dev, PCI_COMMAND, 0); /* disable memory mapped ports + busmaster */
del_timer(&cs->hw.hfcpci.timer);
pci_free_consistent(cs->hw.hfcpci.dev, 0x8000,
cs->hw.hfcpci.fifos, cs->hw.hfcpci.dma);
cs->hw.hfcpci.fifos, cs->hw.hfcpci.dma);
cs->hw.hfcpci.fifos = NULL;
iounmap((void *)cs->hw.hfcpci.pci_io);
}
@@ -124,7 +124,7 @@ reset_hfcpci(struct IsdnCardState *cs)
Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt);
cs->hw.hfcpci.int_m1 = HFCPCI_INTS_DTRANS | HFCPCI_INTS_DREC |
HFCPCI_INTS_L1STATE | HFCPCI_INTS_TIMER;
HFCPCI_INTS_L1STATE | HFCPCI_INTS_TIMER;
Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
/* Clear already pending ints */
@@ -170,8 +170,8 @@ hfcpci_Timer(struct IsdnCardState *cs)
cs->hw.hfcpci.timer.expires = jiffies + 75;
/* WD RESET */
/* WriteReg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcpci.ctmt | 0x80);
add_timer(&cs->hw.hfcpci.timer);
*/
add_timer(&cs->hw.hfcpci.timer);
*/
}
@@ -215,17 +215,17 @@ Sel_BCS(struct IsdnCardState *cs, int channel)
/***************************************/
static void hfcpci_clear_fifo_rx(struct IsdnCardState *cs, int fifo)
{ u_char fifo_state;
bzfifo_type *bzr;
bzfifo_type *bzr;
if (fifo) {
bzr = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2;
bzr = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2;
fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B2RX;
} else {
bzr = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b1;
bzr = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b1;
fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B1RX;
}
if (fifo_state)
cs->hw.hfcpci.fifo_en ^= fifo_state;
cs->hw.hfcpci.fifo_en ^= fifo_state;
Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en);
cs->hw.hfcpci.last_bfifo_cnt[fifo] = 0;
bzr->za[MAX_B_FRAMES].z1 = B_FIFO_SIZE + B_SUB_VAL - 1;
@@ -233,7 +233,7 @@ static void hfcpci_clear_fifo_rx(struct IsdnCardState *cs, int fifo)
bzr->f1 = MAX_B_FRAMES;
bzr->f2 = bzr->f1; /* init F pointers to remain constant */
if (fifo_state)
cs->hw.hfcpci.fifo_en |= fifo_state;
cs->hw.hfcpci.fifo_en |= fifo_state;
Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en);
}
@@ -242,24 +242,24 @@ static void hfcpci_clear_fifo_rx(struct IsdnCardState *cs, int fifo)
/***************************************/
static void hfcpci_clear_fifo_tx(struct IsdnCardState *cs, int fifo)
{ u_char fifo_state;
bzfifo_type *bzt;
bzfifo_type *bzt;
if (fifo) {
bzt = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b2;
bzt = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b2;
fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B2TX;
} else {
bzt = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b1;
bzt = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b1;
fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B1TX;
}
if (fifo_state)
cs->hw.hfcpci.fifo_en ^= fifo_state;
cs->hw.hfcpci.fifo_en ^= fifo_state;
Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en);
bzt->za[MAX_B_FRAMES].z1 = B_FIFO_SIZE + B_SUB_VAL - 1;
bzt->za[MAX_B_FRAMES].z2 = bzt->za[MAX_B_FRAMES].z1;
bzt->f1 = MAX_B_FRAMES;
bzt->f2 = bzt->f1; /* init F pointers to remain constant */
if (fifo_state)
cs->hw.hfcpci.fifo_en |= fifo_state;
cs->hw.hfcpci.fifo_en |= fifo_state;
Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en);
}
@@ -268,7 +268,7 @@ static void hfcpci_clear_fifo_tx(struct IsdnCardState *cs, int fifo)
/*********************************************/
static struct sk_buff
*
hfcpci_empty_fifo(struct BCState *bcs, bzfifo_type * bz, u_char * bdata, int count)
hfcpci_empty_fifo(struct BCState *bcs, bzfifo_type *bz, u_char *bdata, int count)
{
u_char *ptr, *ptr1, new_f2;
struct sk_buff *skb;
@@ -395,7 +395,7 @@ receive_dmsg(struct IsdnCardState *cs)
/* check for transparent receive data and read max one threshold size if avail */
/*******************************************************************************/
static int
hfcpci_empty_fifo_trans(struct BCState *bcs, bzfifo_type * bz, u_char * bdata)
hfcpci_empty_fifo_trans(struct BCState *bcs, bzfifo_type *bz, u_char *bdata)
{
unsigned short *z1r, *z2r;
int new_z2, fcnt, maxlen;
@@ -467,7 +467,7 @@ main_rec_hfcpci(struct BCState *bcs)
bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b1;
real_fifo = 0;
}
Begin:
Begin:
count--;
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
debugl1(cs, "rec_data %d blocked", bcs->channel);
@@ -494,7 +494,7 @@ main_rec_hfcpci(struct BCState *bcs)
if (rcnt < 0)
rcnt += MAX_B_FRAMES + 1;
if (cs->hw.hfcpci.last_bfifo_cnt[real_fifo] > rcnt + 1) {
rcnt = 0;
rcnt = 0;
hfcpci_clear_fifo_rx(cs, real_fifo);
}
cs->hw.hfcpci.last_bfifo_cnt[real_fifo] = rcnt;
@@ -647,8 +647,8 @@ hfcpci_fill_fifo(struct BCState *bcs)
debugl1(cs, "hfcpci_fill_fifo_trans %d frame length %d discarded",
bcs->channel, bcs->tx_skb->len);
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
u_long flags;
spin_lock_irqsave(&bcs->aclock, flags);
bcs->ackcnt += bcs->tx_skb->len;
@@ -710,8 +710,8 @@ hfcpci_fill_fifo(struct BCState *bcs)
memcpy(dst, src, count);
}
bcs->tx_cnt -= bcs->tx_skb->len;
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
u_long flags;
spin_lock_irqsave(&bcs->aclock, flags);
bcs->ackcnt += bcs->tx_skb->len;
@@ -736,27 +736,27 @@ dch_nt_l2l1(struct PStack *st, int pr, void *arg)
struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
switch (pr) {
case (PH_DATA | REQUEST):
case (PH_PULL | REQUEST):
case (PH_PULL | INDICATION):
st->l1.l1hw(st, pr, arg);
break;
case (PH_ACTIVATE | REQUEST):
st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL);
break;
case (PH_TESTLOOP | REQUEST):
if (1 & (long) arg)
debugl1(cs, "PH_TEST_LOOP B1");
if (2 & (long) arg)
debugl1(cs, "PH_TEST_LOOP B2");
if (!(3 & (long) arg))
debugl1(cs, "PH_TEST_LOOP DISABLED");
st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg);
break;
default:
if (cs->debug)
debugl1(cs, "dch_nt_l2l1 msg %04X unhandled", pr);
break;
case (PH_DATA | REQUEST):
case (PH_PULL | REQUEST):
case (PH_PULL | INDICATION):
st->l1.l1hw(st, pr, arg);
break;
case (PH_ACTIVATE | REQUEST):
st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL);
break;
case (PH_TESTLOOP | REQUEST):
if (1 & (long) arg)
debugl1(cs, "PH_TEST_LOOP B1");
if (2 & (long) arg)
debugl1(cs, "PH_TEST_LOOP B2");
if (!(3 & (long) arg))
debugl1(cs, "PH_TEST_LOOP DISABLED");
st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg);
break;
default:
if (cs->debug)
debugl1(cs, "dch_nt_l2l1 msg %04X unhandled", pr);
break;
}
}
@@ -766,14 +766,14 @@ dch_nt_l2l1(struct PStack *st, int pr, void *arg)
/* set/reset echo mode */
/***********************/
static int
hfcpci_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic)
hfcpci_auxcmd(struct IsdnCardState *cs, isdn_ctrl *ic)
{
u_long flags;
int i = *(unsigned int *) ic->parm.num;
if ((ic->arg == 98) &&
(!(cs->hw.hfcpci.int_m1 & (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC + HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC)))) {
spin_lock_irqsave(&cs->lock, flags);
spin_lock_irqsave(&cs->lock, flags);
Write_hfc(cs, HFCPCI_CLKDEL, CLKDEL_NT); /* ST-Bit delay for NT-Mode */
Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 0); /* HFC ST G0 */
udelay(10);
@@ -839,7 +839,7 @@ receive_emsg(struct IsdnCardState *cs)
bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2;
bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b2;
Begin:
Begin:
count--;
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
debugl1(cs, "echo_rec_data blocked");
@@ -1078,7 +1078,7 @@ hfcpci_interrupt(int intno, void *dev_id)
} else
sched_event_D_pci(cs, D_XMTBUFREADY);
}
afterXPR:
afterXPR:
if (cs->hw.hfcpci.int_s1 && count--) {
val = cs->hw.hfcpci.int_s1;
cs->hw.hfcpci.int_s1 = 0;
@@ -1110,130 +1110,130 @@ HFCPCI_l1hw(struct PStack *st, int pr, void *arg)
struct sk_buff *skb = arg;
switch (pr) {
case (PH_DATA | REQUEST):
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
skb_queue_tail(&cs->sq, skb);
case (PH_DATA | REQUEST):
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
skb_queue_tail(&cs->sq, skb);
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA Queued", 0);
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA Queued", 0);
#endif
} else {
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA", 0);
#endif
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfcpci_fill_dfifo(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "hfcpci_fill_dfifo blocked");
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
spin_unlock_irqrestore(&cs->lock, flags);
break;
}
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
} else {
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
Logl2Frame(cs, skb, "PH_DATA", 0);
#endif
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfcpci_fill_dfifo(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "hfcpci_fill_dfifo blocked");
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | REQUEST):
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
debugl1(cs, "-> PH_REQUEST_PULL");
#endif
if (!cs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (HW_RESET | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 3); /* HFC ST 3 */
udelay(6);
Write_hfc(cs, HFCPCI_STATES, 3); /* HFC ST 2 */
cs->hw.hfcpci.mst_m |= HFCPCI_MASTER;
Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
Write_hfc(cs, HFCPCI_STATES, HFCPCI_ACTIVATE | HFCPCI_DO_ACTION);
spin_unlock_irqrestore(&cs->lock, flags);
l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
break;
case (HW_ENABLE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
Write_hfc(cs, HFCPCI_STATES, HFCPCI_DO_ACTION);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_DEACTIVATE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
cs->hw.hfcpci.mst_m &= ~HFCPCI_MASTER;
Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_INFO3 | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
cs->hw.hfcpci.mst_m |= HFCPCI_MASTER;
Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_TESTLOOP | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
switch ((long) arg) {
case (1):
Write_hfc(cs, HFCPCI_B1_SSL, 0x80); /* tx slot */
Write_hfc(cs, HFCPCI_B1_RSL, 0x80); /* rx slot */
cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~7) | 1;
Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn);
break;
case (2):
Write_hfc(cs, HFCPCI_B2_SSL, 0x81); /* tx slot */
Write_hfc(cs, HFCPCI_B2_RSL, 0x81); /* rx slot */
cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~0x38) | 0x08;
Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn);
break;
default:
spin_unlock_irqrestore(&cs->lock, flags);
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "hfcpci_l1hw loop invalid %4lx", (long) arg);
return;
}
cs->hw.hfcpci.trm |= 0x80; /* enable IOM-loop */
Write_hfc(cs, HFCPCI_TRM, cs->hw.hfcpci.trm);
spin_unlock_irqrestore(&cs->lock, flags);
break;
default:
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "hfcpci_l1hw unknown pr %4x", pr);
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
spin_unlock_irqrestore(&cs->lock, flags);
break;
}
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
#endif
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfcpci_fill_dfifo(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "hfcpci_fill_dfifo blocked");
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | REQUEST):
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
debugl1(cs, "-> PH_REQUEST_PULL");
#endif
if (!cs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (HW_RESET | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 3); /* HFC ST 3 */
udelay(6);
Write_hfc(cs, HFCPCI_STATES, 3); /* HFC ST 2 */
cs->hw.hfcpci.mst_m |= HFCPCI_MASTER;
Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
Write_hfc(cs, HFCPCI_STATES, HFCPCI_ACTIVATE | HFCPCI_DO_ACTION);
spin_unlock_irqrestore(&cs->lock, flags);
l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
break;
case (HW_ENABLE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
Write_hfc(cs, HFCPCI_STATES, HFCPCI_DO_ACTION);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_DEACTIVATE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
cs->hw.hfcpci.mst_m &= ~HFCPCI_MASTER;
Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_INFO3 | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
cs->hw.hfcpci.mst_m |= HFCPCI_MASTER;
Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_TESTLOOP | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
switch ((long) arg) {
case (1):
Write_hfc(cs, HFCPCI_B1_SSL, 0x80); /* tx slot */
Write_hfc(cs, HFCPCI_B1_RSL, 0x80); /* rx slot */
cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~7) | 1;
Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn);
break;
case (2):
Write_hfc(cs, HFCPCI_B2_SSL, 0x81); /* tx slot */
Write_hfc(cs, HFCPCI_B2_RSL, 0x81); /* rx slot */
cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~0x38) | 0x08;
Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn);
break;
default:
spin_unlock_irqrestore(&cs->lock, flags);
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "hfcpci_l1hw loop invalid %4lx", (long) arg);
return;
}
cs->hw.hfcpci.trm |= 0x80; /* enable IOM-loop */
Write_hfc(cs, HFCPCI_TRM, cs->hw.hfcpci.trm);
spin_unlock_irqrestore(&cs->lock, flags);
break;
default:
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "hfcpci_l1hw unknown pr %4x", pr);
break;
}
}
@@ -1295,83 +1295,83 @@ mode_hfcpci(struct BCState *bcs, int mode, int bc)
}
}
switch (mode) {
case (L1_MODE_NULL):
if (bc) {
cs->hw.hfcpci.sctrl &= ~SCTRL_B2_ENA;
cs->hw.hfcpci.sctrl_r &= ~SCTRL_B2_ENA;
} else {
cs->hw.hfcpci.sctrl &= ~SCTRL_B1_ENA;
cs->hw.hfcpci.sctrl_r &= ~SCTRL_B1_ENA;
}
if (fifo2) {
cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2;
cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC);
} else {
cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B1;
cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC);
}
break;
case (L1_MODE_TRANS):
hfcpci_clear_fifo_rx(cs, fifo2);
hfcpci_clear_fifo_tx(cs, fifo2);
if (bc) {
cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA;
cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA;
} else {
cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA;
cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA;
}
if (fifo2) {
cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2;
cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC);
cs->hw.hfcpci.ctmt |= 2;
cs->hw.hfcpci.conn &= ~0x18;
} else {
cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B1;
cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC);
cs->hw.hfcpci.ctmt |= 1;
cs->hw.hfcpci.conn &= ~0x03;
}
break;
case (L1_MODE_HDLC):
hfcpci_clear_fifo_rx(cs, fifo2);
hfcpci_clear_fifo_tx(cs, fifo2);
if (bc) {
cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA;
cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA;
} else {
cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA;
cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA;
}
if (fifo2) {
cs->hw.hfcpci.last_bfifo_cnt[1] = 0;
cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2;
cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC);
cs->hw.hfcpci.ctmt &= ~2;
cs->hw.hfcpci.conn &= ~0x18;
} else {
cs->hw.hfcpci.last_bfifo_cnt[0] = 0;
cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B1;
cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC);
cs->hw.hfcpci.ctmt &= ~1;
cs->hw.hfcpci.conn &= ~0x03;
}
break;
case (L1_MODE_EXTRN):
if (bc) {
cs->hw.hfcpci.conn |= 0x10;
cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA;
cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA;
cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2;
cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC);
} else {
cs->hw.hfcpci.conn |= 0x02;
cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA;
cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA;
cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B1;
cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC);
}
break;
case (L1_MODE_NULL):
if (bc) {
cs->hw.hfcpci.sctrl &= ~SCTRL_B2_ENA;
cs->hw.hfcpci.sctrl_r &= ~SCTRL_B2_ENA;
} else {
cs->hw.hfcpci.sctrl &= ~SCTRL_B1_ENA;
cs->hw.hfcpci.sctrl_r &= ~SCTRL_B1_ENA;
}
if (fifo2) {
cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2;
cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC);
} else {
cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B1;
cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC);
}
break;
case (L1_MODE_TRANS):
hfcpci_clear_fifo_rx(cs, fifo2);
hfcpci_clear_fifo_tx(cs, fifo2);
if (bc) {
cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA;
cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA;
} else {
cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA;
cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA;
}
if (fifo2) {
cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2;
cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC);
cs->hw.hfcpci.ctmt |= 2;
cs->hw.hfcpci.conn &= ~0x18;
} else {
cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B1;
cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC);
cs->hw.hfcpci.ctmt |= 1;
cs->hw.hfcpci.conn &= ~0x03;
}
break;
case (L1_MODE_HDLC):
hfcpci_clear_fifo_rx(cs, fifo2);
hfcpci_clear_fifo_tx(cs, fifo2);
if (bc) {
cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA;
cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA;
} else {
cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA;
cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA;
}
if (fifo2) {
cs->hw.hfcpci.last_bfifo_cnt[1] = 0;
cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2;
cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC);
cs->hw.hfcpci.ctmt &= ~2;
cs->hw.hfcpci.conn &= ~0x18;
} else {
cs->hw.hfcpci.last_bfifo_cnt[0] = 0;
cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B1;
cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC);
cs->hw.hfcpci.ctmt &= ~1;
cs->hw.hfcpci.conn &= ~0x03;
}
break;
case (L1_MODE_EXTRN):
if (bc) {
cs->hw.hfcpci.conn |= 0x10;
cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA;
cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA;
cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2;
cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC);
} else {
cs->hw.hfcpci.conn |= 0x02;
cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA;
cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA;
cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B1;
cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC);
}
break;
}
Write_hfc(cs, HFCPCI_SCTRL_E, cs->hw.hfcpci.sctrl_e);
Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
@@ -1393,54 +1393,54 @@ hfcpci_l2l1(struct PStack *st, int pr, void *arg)
struct sk_buff *skb = arg;
switch (pr) {
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
spin_unlock_irqrestore(&bcs->cs->lock, flags);
printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
break;
}
// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
spin_unlock_irqrestore(&bcs->cs->lock, flags);
printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
mode_hfcpci(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
mode_hfcpci(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
}
// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->cs->BC_Send_Data(bcs);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
mode_hfcpci(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
mode_hfcpci(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
}
}
@@ -1510,57 +1510,57 @@ hfcpci_bh(struct work_struct *work)
if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) {
if (!cs->hw.hfcpci.nt_mode)
switch (cs->dc.hfcpci.ph_state) {
case (0):
l1_msg(cs, HW_RESET | INDICATION, NULL);
break;
case (3):
l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
break;
case (8):
l1_msg(cs, HW_RSYNC | INDICATION, NULL);
break;
case (6):
l1_msg(cs, HW_INFO2 | INDICATION, NULL);
break;
case (7):
l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
break;
default:
break;
} else {
case (0):
l1_msg(cs, HW_RESET | INDICATION, NULL);
break;
case (3):
l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
break;
case (8):
l1_msg(cs, HW_RSYNC | INDICATION, NULL);
break;
case (6):
l1_msg(cs, HW_INFO2 | INDICATION, NULL);
break;
case (7):
l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
break;
default:
break;
} else {
spin_lock_irqsave(&cs->lock, flags);
switch (cs->dc.hfcpci.ph_state) {
case (2):
if (cs->hw.hfcpci.nt_timer < 0) {
cs->hw.hfcpci.nt_timer = 0;
cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER;
Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
/* Clear already pending ints */
if (Read_hfc(cs, HFCPCI_INT_S1));
Write_hfc(cs, HFCPCI_STATES, 4 | HFCPCI_LOAD_STATE);
udelay(10);
Write_hfc(cs, HFCPCI_STATES, 4);
cs->dc.hfcpci.ph_state = 4;
} else {
cs->hw.hfcpci.int_m1 |= HFCPCI_INTS_TIMER;
Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
cs->hw.hfcpci.ctmt &= ~HFCPCI_AUTO_TIMER;
cs->hw.hfcpci.ctmt |= HFCPCI_TIM3_125;
Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER);
Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER);
cs->hw.hfcpci.nt_timer = NT_T1_COUNT;
Write_hfc(cs, HFCPCI_STATES, 2 | HFCPCI_NT_G2_G3); /* allow G2 -> G3 transition */
}
break;
case (1):
case (3):
case (4):
case (2):
if (cs->hw.hfcpci.nt_timer < 0) {
cs->hw.hfcpci.nt_timer = 0;
cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER;
Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
break;
default:
break;
/* Clear already pending ints */
if (Read_hfc(cs, HFCPCI_INT_S1));
Write_hfc(cs, HFCPCI_STATES, 4 | HFCPCI_LOAD_STATE);
udelay(10);
Write_hfc(cs, HFCPCI_STATES, 4);
cs->dc.hfcpci.ph_state = 4;
} else {
cs->hw.hfcpci.int_m1 |= HFCPCI_INTS_TIMER;
Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
cs->hw.hfcpci.ctmt &= ~HFCPCI_AUTO_TIMER;
cs->hw.hfcpci.ctmt |= HFCPCI_TIM3_125;
Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER);
Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER);
cs->hw.hfcpci.nt_timer = NT_T1_COUNT;
Write_hfc(cs, HFCPCI_STATES, 2 | HFCPCI_NT_G2_G3); /* allow G2 -> G3 transition */
}
break;
case (1):
case (3):
case (4):
cs->hw.hfcpci.nt_timer = 0;
cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER;
Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
break;
default:
break;
}
spin_unlock_irqrestore(&cs->lock, flags);
}
@@ -1602,30 +1602,30 @@ hfcpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "HFCPCI: card_msg %x", mt);
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_hfcpci(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_hfcpci(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithfcpci(cs);
reset_hfcpci(cs);
spin_unlock_irqrestore(&cs->lock, flags);
msleep(80); /* Timeout 80ms */
/* now switch timer interrupt off */
spin_lock_irqsave(&cs->lock, flags);
cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER;
Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
/* reinit mode reg */
Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_hfcpci(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_hfcpci(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithfcpci(cs);
reset_hfcpci(cs);
spin_unlock_irqrestore(&cs->lock, flags);
msleep(80); /* Timeout 80ms */
/* now switch timer interrupt off */
spin_lock_irqsave(&cs->lock, flags);
cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER;
Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
/* reinit mode reg */
Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return (0);
}
@@ -1654,13 +1654,13 @@ setup_hfcpci(struct IsdnCard *card)
cs->dc.hfcpci.ph_state = 0;
cs->hw.hfcpci.fifo = 255;
if (cs->typ != ISDN_CTYPE_HFC_PCI)
return(0);
return (0);
i = 0;
while (id_list[i].vendor_id) {
tmp_hfcpci = hisax_find_pci_device(id_list[i].vendor_id,
id_list[i].device_id,
dev_hfcpci);
id_list[i].device_id,
dev_hfcpci);
i++;
if (tmp_hfcpci) {
dma_addr_t dma_mask = DMA_BIT_MASK(32) & ~0x7fffUL;
@@ -1668,16 +1668,16 @@ setup_hfcpci(struct IsdnCard *card)
continue;
if (pci_set_dma_mask(tmp_hfcpci, dma_mask)) {
printk(KERN_WARNING
"HiSax hfc_pci: No suitable DMA available.\n");
"HiSax hfc_pci: No suitable DMA available.\n");
continue;
}
if (pci_set_consistent_dma_mask(tmp_hfcpci, dma_mask)) {
printk(KERN_WARNING
"HiSax hfc_pci: No suitable consistent DMA available.\n");
"HiSax hfc_pci: No suitable consistent DMA available.\n");
continue;
}
pci_set_master(tmp_hfcpci);
if ((card->para[0]) && (card->para[0] != (tmp_hfcpci->resource[ 0].start & PCI_BASE_ADDRESS_IO_MASK)))
if ((card->para[0]) && (card->para[0] != (tmp_hfcpci->resource[0].start & PCI_BASE_ADDRESS_IO_MASK)))
continue;
else
break;
@@ -1707,17 +1707,17 @@ setup_hfcpci(struct IsdnCard *card)
/* Allocate memory for FIFOS */
cs->hw.hfcpci.fifos = pci_alloc_consistent(cs->hw.hfcpci.dev,
0x8000, &cs->hw.hfcpci.dma);
0x8000, &cs->hw.hfcpci.dma);
if (!cs->hw.hfcpci.fifos) {
printk(KERN_WARNING "HFC-PCI: Error allocating FIFO memory!\n");
return 0;
}
if (cs->hw.hfcpci.dma & 0x7fff) {
printk(KERN_WARNING
"HFC-PCI: Error DMA memory not on 32K boundary (%lx)\n",
(u_long)cs->hw.hfcpci.dma);
"HFC-PCI: Error DMA memory not on 32K boundary (%lx)\n",
(u_long)cs->hw.hfcpci.dma);
pci_free_consistent(cs->hw.hfcpci.dev, 0x8000,
cs->hw.hfcpci.fifos, cs->hw.hfcpci.dma);
cs->hw.hfcpci.fifos, cs->hw.hfcpci.dma);
return 0;
}
pci_write_config_dword(cs->hw.hfcpci.dev, 0x80, (u32)cs->hw.hfcpci.dma);

Visa fil

@@ -4,7 +4,7 @@
*
* Author Werner Cornelius
* Copyright by Werner Cornelius <werner@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -55,7 +55,7 @@
#define HFCPCI_MST_EMOD 0xB4
#define HFCPCI_MST_MODE 0xB8
#define HFCPCI_CONNECT 0xBC
#define HFCPCI_CONNECT 0xBC
/* Interrupt and status registers */
@@ -64,22 +64,22 @@
#define HFCPCI_TRM 0x48
#define HFCPCI_B_MODE 0x4C
#define HFCPCI_CHIP_ID 0x58
#define HFCPCI_CIRM 0x60
#define HFCPCI_CIRM 0x60
#define HFCPCI_CTMT 0x64
#define HFCPCI_INT_M1 0x68
#define HFCPCI_INT_M2 0x6C
#define HFCPCI_INT_S1 0x78
#define HFCPCI_INT_S2 0x7C
#define HFCPCI_STATUS 0x70
#define HFCPCI_INT_M1 0x68
#define HFCPCI_INT_M2 0x6C
#define HFCPCI_INT_S1 0x78
#define HFCPCI_INT_S2 0x7C
#define HFCPCI_STATUS 0x70
/* S/T section registers */
#define HFCPCI_STATES 0xC0
#define HFCPCI_SCTRL 0xC4
#define HFCPCI_STATES 0xC0
#define HFCPCI_SCTRL 0xC4
#define HFCPCI_SCTRL_E 0xC8
#define HFCPCI_SCTRL_R 0xCC
#define HFCPCI_SQ 0xD0
#define HFCPCI_CLKDEL 0xDC
#define HFCPCI_SQ 0xD0
#define HFCPCI_CLKDEL 0xDC
#define HFCPCI_B1_REC 0xF0
#define HFCPCI_B1_SEND 0xF0
#define HFCPCI_B2_REC 0xF4
@@ -91,7 +91,7 @@
/* bits in status register (READ) */
#define HFCPCI_PCI_PROC 0x02
#define HFCPCI_NBUSY 0x04
#define HFCPCI_NBUSY 0x04
#define HFCPCI_TIMER_ELAP 0x10
#define HFCPCI_STATINT 0x20
#define HFCPCI_FRAMEINT 0x40
@@ -110,7 +110,7 @@
/* bits in CIRM (Write) */
#define HFCPCI_AUX_MSK 0x07
#define HFCPCI_RESET 0x08
#define HFCPCI_RESET 0x08
#define HFCPCI_B1_REV 0x40
#define HFCPCI_B2_REV 0x80
@@ -183,53 +183,53 @@
#define D_FREG_MASK 0xF
typedef struct {
unsigned short z1; /* Z1 pointer 16 Bit */
unsigned short z2; /* Z2 pointer 16 Bit */
} z_type;
unsigned short z1; /* Z1 pointer 16 Bit */
unsigned short z2; /* Z2 pointer 16 Bit */
} z_type;
typedef struct {
u_char data[D_FIFO_SIZE]; /* FIFO data space */
u_char fill1[0x20A0-D_FIFO_SIZE]; /* reserved, do not use */
u_char f1,f2; /* f pointers */
u_char fill2[0x20C0-0x20A2]; /* reserved, do not use */
z_type za[MAX_D_FRAMES+1]; /* mask index with D_FREG_MASK for access */
u_char fill3[0x4000-0x2100]; /* align 16K */
} dfifo_type;
u_char data[D_FIFO_SIZE]; /* FIFO data space */
u_char fill1[0x20A0 - D_FIFO_SIZE]; /* reserved, do not use */
u_char f1, f2; /* f pointers */
u_char fill2[0x20C0 - 0x20A2]; /* reserved, do not use */
z_type za[MAX_D_FRAMES + 1]; /* mask index with D_FREG_MASK for access */
u_char fill3[0x4000 - 0x2100]; /* align 16K */
} dfifo_type;
typedef struct {
z_type za[MAX_B_FRAMES+1]; /* only range 0x0..0x1F allowed */
u_char f1,f2; /* f pointers */
u_char fill[0x2100-0x2082]; /* alignment */
} bzfifo_type;
z_type za[MAX_B_FRAMES + 1]; /* only range 0x0..0x1F allowed */
u_char f1, f2; /* f pointers */
u_char fill[0x2100 - 0x2082]; /* alignment */
} bzfifo_type;
typedef union {
struct {
dfifo_type d_tx; /* D-send channel */
dfifo_type d_rx; /* D-receive channel */
} d_chan;
struct {
u_char fill1[0x200];
u_char txdat_b1[B_FIFO_SIZE];
bzfifo_type txbz_b1;
struct {
dfifo_type d_tx; /* D-send channel */
dfifo_type d_rx; /* D-receive channel */
} d_chan;
struct {
u_char fill1[0x200];
u_char txdat_b1[B_FIFO_SIZE];
bzfifo_type txbz_b1;
bzfifo_type txbz_b2;
u_char txdat_b2[B_FIFO_SIZE];
bzfifo_type txbz_b2;
u_char txdat_b2[B_FIFO_SIZE];
u_char fill2[D_FIFO_SIZE];
u_char fill2[D_FIFO_SIZE];
u_char rxdat_b1[B_FIFO_SIZE];
bzfifo_type rxbz_b1;
u_char rxdat_b1[B_FIFO_SIZE];
bzfifo_type rxbz_b1;
bzfifo_type rxbz_b2;
u_char rxdat_b2[B_FIFO_SIZE];
} b_chans;
u_char fill[32768];
} fifo_area;
bzfifo_type rxbz_b2;
u_char rxdat_b2[B_FIFO_SIZE];
} b_chans;
u_char fill[32768];
} fifo_area;
#define Write_hfc(a,b,c) (*(((u_char *)a->hw.hfcpci.pci_io)+b) = c)
#define Read_hfc(a,b) (*(((u_char *)a->hw.hfcpci.pci_io)+b))
#define Write_hfc(a, b, c) (*(((u_char *)a->hw.hfcpci.pci_io) + b) = c)
#define Read_hfc(a, b) (*(((u_char *)a->hw.hfcpci.pci_io) + b))
extern void main_irq_hcpci(struct BCState *bcs);
extern void releasehfcpci(struct IsdnCardState *cs);

Filskillnaden har hållits tillbaka eftersom den är för stor Load Diff

Visa fil

@@ -5,7 +5,7 @@
* Author Werner Cornelius
* based on existing driver for CCD HFC PCI cards
* Copyright by Werner Cornelius <werner@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -48,7 +48,7 @@
#define HFCSX_MST_EMOD 0x2D
#define HFCSX_MST_MODE 0x2E
#define HFCSX_CONNECT 0x2F
#define HFCSX_CONNECT 0x2F
/* Interrupt and status registers */
@@ -56,22 +56,22 @@
#define HFCSX_TRM 0x12
#define HFCSX_B_MODE 0x13
#define HFCSX_CHIP_ID 0x16
#define HFCSX_CIRM 0x18
#define HFCSX_CIRM 0x18
#define HFCSX_CTMT 0x19
#define HFCSX_INT_M1 0x1A
#define HFCSX_INT_M2 0x1B
#define HFCSX_INT_S1 0x1E
#define HFCSX_INT_S2 0x1F
#define HFCSX_STATUS 0x1C
#define HFCSX_INT_M1 0x1A
#define HFCSX_INT_M2 0x1B
#define HFCSX_INT_S1 0x1E
#define HFCSX_INT_S2 0x1F
#define HFCSX_STATUS 0x1C
/* S/T section registers */
#define HFCSX_STATES 0x30
#define HFCSX_SCTRL 0x31
#define HFCSX_STATES 0x30
#define HFCSX_SCTRL 0x31
#define HFCSX_SCTRL_E 0x32
#define HFCSX_SCTRL_R 0x33
#define HFCSX_SQ 0x34
#define HFCSX_CLKDEL 0x37
#define HFCSX_SQ 0x34
#define HFCSX_CLKDEL 0x37
#define HFCSX_B1_REC 0x3C
#define HFCSX_B1_SEND 0x3C
#define HFCSX_B2_REC 0x3D
@@ -97,7 +97,7 @@
/* bits in status register (READ) */
#define HFCSX_SX_PROC 0x02
#define HFCSX_NBUSY 0x04
#define HFCSX_NBUSY 0x04
#define HFCSX_TIMER_ELAP 0x10
#define HFCSX_STATINT 0x20
#define HFCSX_FRAMEINT 0x40
@@ -117,7 +117,7 @@
/* bits in CIRM (Write) */
#define HFCSX_IRQ_SELMSK 0x07
#define HFCSX_IRQ_SELDIS 0x00
#define HFCSX_RESET 0x08
#define HFCSX_RESET 0x08
#define HFCSX_FIFO_RESET 0x80
@@ -189,7 +189,7 @@
/* structure holding additional dynamic data -> send marker */
/************************************************************/
struct hfcsx_extra {
unsigned short marker[2*(MAX_B_FRAMES+1) + (MAX_D_FRAMES+1)];
unsigned short marker[2 * (MAX_B_FRAMES + 1) + (MAX_D_FRAMES + 1)];
};
extern void main_irq_hfcsx(struct BCState *bcs);

Visa fil

@@ -27,7 +27,7 @@
*
* See Version Histroy at the bottom of this file
*
*/
*/
#include <linux/types.h>
#include <linux/stddef.h>
@@ -45,11 +45,11 @@
#include "hfc_usb.h"
static const char *hfcusb_revision =
"$Revision: 2.3.2.24 $ $Date: 2007/10/14 08:40:29 $ ";
"$Revision: 2.3.2.24 $ $Date: 2007/10/14 08:40:29 $ ";
/* Hisax debug support
* debug flags defined in hfc_usb.h as HFCUSB_DBG_[*]
*/
* debug flags defined in hfc_usb.h as HFCUSB_DBG_[*]
*/
#define __debug_variable hfc_debug
#include "hisax_debug.h"
static u_int debug;
@@ -67,70 +67,70 @@ typedef struct {
/* VID/PID device list */
static struct usb_device_id hfcusb_idtab[] = {
{
USB_DEVICE(0x0959, 0x2bd0),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_OFF, {4, 0, 2, 1},
"ISDN USB TA (Cologne Chip HFC-S USB based)"}),
USB_DEVICE(0x0959, 0x2bd0),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_OFF, {4, 0, 2, 1},
"ISDN USB TA (Cologne Chip HFC-S USB based)"}),
},
{
USB_DEVICE(0x0675, 0x1688),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {1, 2, 0, 0},
"DrayTek miniVigor 128 USB ISDN TA"}),
USB_DEVICE(0x0675, 0x1688),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {1, 2, 0, 0},
"DrayTek miniVigor 128 USB ISDN TA"}),
},
{
USB_DEVICE(0x07b0, 0x0007),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {0x80, -64, -32, -16},
"Billion tiny USB ISDN TA 128"}),
USB_DEVICE(0x07b0, 0x0007),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {0x80, -64, -32, -16},
"Billion tiny USB ISDN TA 128"}),
},
{
USB_DEVICE(0x0742, 0x2008),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {4, 0, 2, 1},
"Stollmann USB TA"}),
USB_DEVICE(0x0742, 0x2008),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {4, 0, 2, 1},
"Stollmann USB TA"}),
},
{
USB_DEVICE(0x0742, 0x2009),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {4, 0, 2, 1},
"Aceex USB ISDN TA"}),
USB_DEVICE(0x0742, 0x2009),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {4, 0, 2, 1},
"Aceex USB ISDN TA"}),
},
{
USB_DEVICE(0x0742, 0x200A),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {4, 0, 2, 1},
"OEM USB ISDN TA"}),
USB_DEVICE(0x0742, 0x200A),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {4, 0, 2, 1},
"OEM USB ISDN TA"}),
},
{
USB_DEVICE(0x08e3, 0x0301),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {2, 0, 1, 4},
"Olitec USB RNIS"}),
USB_DEVICE(0x08e3, 0x0301),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {2, 0, 1, 4},
"Olitec USB RNIS"}),
},
{
USB_DEVICE(0x07fa, 0x0846),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {0x80, -64, -32, -16},
"Bewan Modem RNIS USB"}),
USB_DEVICE(0x07fa, 0x0846),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {0x80, -64, -32, -16},
"Bewan Modem RNIS USB"}),
},
{
USB_DEVICE(0x07fa, 0x0847),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {0x80, -64, -32, -16},
"Djinn Numeris USB"}),
USB_DEVICE(0x07fa, 0x0847),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {0x80, -64, -32, -16},
"Djinn Numeris USB"}),
},
{
USB_DEVICE(0x07b0, 0x0006),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {0x80, -64, -32, -16},
"Twister ISDN TA"}),
USB_DEVICE(0x07b0, 0x0006),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {0x80, -64, -32, -16},
"Twister ISDN TA"}),
},
{
USB_DEVICE(0x071d, 0x1005),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {0x02, 0, 0x01, 0x04},
"Eicon DIVA USB 4.0"}),
USB_DEVICE(0x071d, 0x1005),
.driver_info = (unsigned long) &((hfcsusb_vdata)
{LED_SCHEME1, {0x02, 0, 0x01, 0x04},
"Eicon DIVA USB 4.0"}),
},
{ }
};
@@ -177,7 +177,7 @@ typedef struct hfcusb_data {
int alt_used; /* used alternate config */
int ctrl_paksize; /* control pipe packet size */
int ctrl_in_pipe, /* handles for control pipe */
ctrl_out_pipe;
ctrl_out_pipe;
int cfg_used; /* configuration index used */
int vend_idx; /* vendor found */
int b_mode[2]; /* B-channel mode */
@@ -206,7 +206,7 @@ typedef struct hfcusb_data {
} hfcusb_data;
static void collect_rx_frame(usb_fifo * fifo, __u8 * data, int len,
static void collect_rx_frame(usb_fifo *fifo, __u8 *data, int len,
int finish);
static inline const char *
@@ -220,24 +220,24 @@ symbolic(struct hfcusb_symbolic_list list[], const int num)
}
static void
ctrl_start_transfer(hfcusb_data * hfc)
ctrl_start_transfer(hfcusb_data *hfc)
{
if (hfc->ctrl_cnt) {
hfc->ctrl_urb->pipe = hfc->ctrl_out_pipe;
hfc->ctrl_urb->setup_packet = (u_char *) & hfc->ctrl_write;
hfc->ctrl_urb->setup_packet = (u_char *)&hfc->ctrl_write;
hfc->ctrl_urb->transfer_buffer = NULL;
hfc->ctrl_urb->transfer_buffer_length = 0;
hfc->ctrl_write.wIndex =
cpu_to_le16(hfc->ctrl_buff[hfc->ctrl_out_idx].hfc_reg);
cpu_to_le16(hfc->ctrl_buff[hfc->ctrl_out_idx].hfc_reg);
hfc->ctrl_write.wValue =
cpu_to_le16(hfc->ctrl_buff[hfc->ctrl_out_idx].reg_val);
cpu_to_le16(hfc->ctrl_buff[hfc->ctrl_out_idx].reg_val);
usb_submit_urb(hfc->ctrl_urb, GFP_ATOMIC); /* start transfer */
}
} /* ctrl_start_transfer */
static int
queue_control_request(hfcusb_data * hfc, __u8 reg, __u8 val, int action)
queue_control_request(hfcusb_data *hfc, __u8 reg, __u8 val, int action)
{
ctrl_buft *buf;
@@ -271,7 +271,7 @@ ctrl_complete(struct urb *urb)
/* write led data to auxport & invert if necessary */
static void
write_led(hfcusb_data * hfc, __u8 led_state)
write_led(hfcusb_data *hfc, __u8 led_state)
{
if (led_state != hfc->old_led_state) {
hfc->old_led_state = led_state;
@@ -280,7 +280,7 @@ write_led(hfcusb_data * hfc, __u8 led_state)
}
static void
set_led_bit(hfcusb_data * hfc, signed short led_bits, int on)
set_led_bit(hfcusb_data *hfc, signed short led_bits, int on)
{
if (on) {
if (led_bits < 0)
@@ -297,53 +297,53 @@ set_led_bit(hfcusb_data * hfc, signed short led_bits, int on)
/* handle LED requests */
static void
handle_led(hfcusb_data * hfc, int event)
handle_led(hfcusb_data *hfc, int event)
{
hfcsusb_vdata *driver_info =
(hfcsusb_vdata *) hfcusb_idtab[hfc->vend_idx].driver_info;
(hfcsusb_vdata *) hfcusb_idtab[hfc->vend_idx].driver_info;
/* if no scheme -> no LED action */
if (driver_info->led_scheme == LED_OFF)
return;
switch (event) {
case LED_POWER_ON:
set_led_bit(hfc, driver_info->led_bits[0], 1);
set_led_bit(hfc, driver_info->led_bits[1], 0);
set_led_bit(hfc, driver_info->led_bits[2], 0);
set_led_bit(hfc, driver_info->led_bits[3], 0);
break;
case LED_POWER_OFF:
set_led_bit(hfc, driver_info->led_bits[0], 0);
set_led_bit(hfc, driver_info->led_bits[1], 0);
set_led_bit(hfc, driver_info->led_bits[2], 0);
set_led_bit(hfc, driver_info->led_bits[3], 0);
break;
case LED_S0_ON:
set_led_bit(hfc, driver_info->led_bits[1], 1);
break;
case LED_S0_OFF:
set_led_bit(hfc, driver_info->led_bits[1], 0);
break;
case LED_B1_ON:
set_led_bit(hfc, driver_info->led_bits[2], 1);
break;
case LED_B1_OFF:
set_led_bit(hfc, driver_info->led_bits[2], 0);
break;
case LED_B2_ON:
set_led_bit(hfc, driver_info->led_bits[3], 1);
break;
case LED_B2_OFF:
set_led_bit(hfc, driver_info->led_bits[3], 0);
break;
case LED_POWER_ON:
set_led_bit(hfc, driver_info->led_bits[0], 1);
set_led_bit(hfc, driver_info->led_bits[1], 0);
set_led_bit(hfc, driver_info->led_bits[2], 0);
set_led_bit(hfc, driver_info->led_bits[3], 0);
break;
case LED_POWER_OFF:
set_led_bit(hfc, driver_info->led_bits[0], 0);
set_led_bit(hfc, driver_info->led_bits[1], 0);
set_led_bit(hfc, driver_info->led_bits[2], 0);
set_led_bit(hfc, driver_info->led_bits[3], 0);
break;
case LED_S0_ON:
set_led_bit(hfc, driver_info->led_bits[1], 1);
break;
case LED_S0_OFF:
set_led_bit(hfc, driver_info->led_bits[1], 0);
break;
case LED_B1_ON:
set_led_bit(hfc, driver_info->led_bits[2], 1);
break;
case LED_B1_OFF:
set_led_bit(hfc, driver_info->led_bits[2], 0);
break;
case LED_B2_ON:
set_led_bit(hfc, driver_info->led_bits[3], 1);
break;
case LED_B2_OFF:
set_led_bit(hfc, driver_info->led_bits[3], 0);
break;
}
write_led(hfc, hfc->led_state);
}
/* ISDN l1 timer T3 expires */
static void
l1_timer_expire_t3(hfcusb_data * hfc)
l1_timer_expire_t3(hfcusb_data *hfc)
{
hfc->d_if.ifc.l1l2(&hfc->d_if.ifc, PH_DEACTIVATE | INDICATION,
NULL);
@@ -360,7 +360,7 @@ l1_timer_expire_t3(hfcusb_data * hfc)
/* ISDN l1 timer T4 expires */
static void
l1_timer_expire_t4(hfcusb_data * hfc)
l1_timer_expire_t4(hfcusb_data *hfc)
{
hfc->d_if.ifc.l1l2(&hfc->d_if.ifc, PH_DEACTIVATE | INDICATION,
NULL);
@@ -374,7 +374,7 @@ l1_timer_expire_t4(hfcusb_data * hfc)
/* S0 state changed */
static void
s0_state_handler(hfcusb_data * hfc, __u8 state)
s0_state_handler(hfcusb_data *hfc, __u8 state)
{
__u8 old_state;
@@ -402,12 +402,12 @@ s0_state_handler(hfcusb_data * hfc, __u8 state)
DBG(HFCUSB_DBG_STATES, "HFC-S USB: PH_ACTIVATE | INDICATION sent");
hfc->l1_activated = 1;
handle_led(hfc, LED_S0_ON);
} else if (state <= 3 /* && activated */ ) {
} else if (state <= 3 /* && activated */) {
if (old_state == 7 || old_state == 8) {
DBG(HFCUSB_DBG_STATES, "HFC-S USB: T4 activated");
if (!timer_pending(&hfc->t4_timer)) {
hfc->t4_timer.expires =
jiffies + (HFC_TIMER_T4 * HZ) / 1000;
jiffies + (HFC_TIMER_T4 * HZ) / 1000;
add_timer(&hfc->t4_timer);
}
} else {
@@ -451,7 +451,7 @@ fill_isoc_urb(struct urb *urb, struct usb_device *dev, unsigned int pipe,
* gaps in the transfer chain
*/
static int
start_isoc_chain(usb_fifo * fifo, int num_packets_per_urb,
start_isoc_chain(usb_fifo *fifo, int num_packets_per_urb,
usb_complete_t complete, int packet_size)
{
int i, k, errcode;
@@ -463,7 +463,7 @@ start_isoc_chain(usb_fifo * fifo, int num_packets_per_urb,
for (i = 0; i < 2; i++) {
if (!(fifo->iso[i].purb)) {
fifo->iso[i].purb =
usb_alloc_urb(num_packets_per_urb, GFP_KERNEL);
usb_alloc_urb(num_packets_per_urb, GFP_KERNEL);
if (!(fifo->iso[i].purb)) {
printk(KERN_INFO
"alloc urb for fifo %i failed!!!",
@@ -487,11 +487,11 @@ start_isoc_chain(usb_fifo * fifo, int num_packets_per_urb,
/* defining packet delimeters in fifo->buffer */
for (k = 0; k < num_packets_per_urb; k++) {
fifo->iso[i].purb->
iso_frame_desc[k].offset =
k * packet_size;
iso_frame_desc[k].offset =
k * packet_size;
fifo->iso[i].purb->
iso_frame_desc[k].length =
packet_size;
iso_frame_desc[k].length =
packet_size;
}
} else {
printk(KERN_INFO
@@ -511,7 +511,7 @@ start_isoc_chain(usb_fifo * fifo, int num_packets_per_urb,
/* stops running iso chain and frees their pending urbs */
static void
stop_isoc_chain(usb_fifo * fifo)
stop_isoc_chain(usb_fifo *fifo)
{
int i;
@@ -534,8 +534,8 @@ stop_isoc_chain(usb_fifo * fifo)
/* defines how much ISO packets are handled in one URB */
static int iso_packets[8] =
{ ISOC_PACKETS_B, ISOC_PACKETS_B, ISOC_PACKETS_B, ISOC_PACKETS_B,
ISOC_PACKETS_D, ISOC_PACKETS_D, ISOC_PACKETS_D, ISOC_PACKETS_D
{ ISOC_PACKETS_B, ISOC_PACKETS_B, ISOC_PACKETS_B, ISOC_PACKETS_B,
ISOC_PACKETS_D, ISOC_PACKETS_D, ISOC_PACKETS_D, ISOC_PACKETS_D
};
static void
@@ -545,7 +545,7 @@ tx_iso_complete(struct urb *urb)
usb_fifo *fifo = context_iso_urb->owner_fifo;
hfcusb_data *hfc = fifo->hfc;
int k, tx_offset, num_isoc_packets, sink, len, current_len,
errcode;
errcode;
int frame_complete, transp_mode, fifon, status;
__u8 threshbit;
@@ -565,8 +565,8 @@ tx_iso_complete(struct urb *urb)
errcode = urb->iso_frame_desc[k].status;
if (errcode)
DBG(HFCUSB_DBG_VERBOSE_USB, "HFC-S USB: tx_iso_complete "
"packet %i, status: %i\n",
k, errcode);
"packet %i, status: %i\n",
k, errcode);
}
// clear status, so go on with ISO transfers
@@ -607,8 +607,8 @@ tx_iso_complete(struct urb *urb)
if (current_len > 14)
current_len = 14;
current_len =
(len <=
current_len) ? len : current_len;
(len <=
current_len) ? len : current_len;
/* how much bit do we put on the line? */
fifo->bit_line += current_len * 8;
@@ -617,7 +617,7 @@ tx_iso_complete(struct urb *urb)
if (!transp_mode) {
/* here frame completion */
context_iso_urb->
buffer[tx_offset] = 1;
buffer[tx_offset] = 1;
/* add 2 byte flags and 16bit CRC at end of ISDN frame */
fifo->bit_line += 32;
}
@@ -632,12 +632,12 @@ tx_iso_complete(struct urb *urb)
/* define packet delimeters within the URB buffer */
urb->iso_frame_desc[k].offset = tx_offset;
urb->iso_frame_desc[k].length =
current_len + 1;
current_len + 1;
tx_offset += (current_len + 1);
} else {
urb->iso_frame_desc[k].offset =
tx_offset++;
tx_offset++;
urb->iso_frame_desc[k].length = 1;
fifo->bit_line -= sink; /* we lower data margin every msec */
@@ -683,7 +683,7 @@ rx_iso_complete(struct urb *urb)
usb_fifo *fifo = context_iso_urb->owner_fifo;
hfcusb_data *hfc = fifo->hfc;
int k, len, errcode, offset, num_isoc_packets, fifon, maxlen,
status;
status;
unsigned int iso_status;
__u8 *buf;
static __u8 eof[8];
@@ -723,10 +723,10 @@ rx_iso_complete(struct urb *urb)
if (fifon == HFCUSB_D_RX) {
DBG(HFCUSB_DBG_VERBOSE_USB,
"HFC-S USB: ISO-D-RX lst_urblen:%2d "
"act_urblen:%2d max-urblen:%2d EOF:0x%0x",
fifo->last_urblen, len, maxlen,
eof[5]);
"HFC-S USB: ISO-D-RX lst_urblen:%2d "
"act_urblen:%2d max-urblen:%2d EOF:0x%0x",
fifo->last_urblen, len, maxlen,
eof[5]);
DBG_PACKET(HFCUSB_DBG_VERBOSE_USB, buf, len);
}
@@ -778,7 +778,7 @@ rx_iso_complete(struct urb *urb)
/* collect rx data from INT- and ISO-URBs */
static void
collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, int finish)
collect_rx_frame(usb_fifo *fifo, __u8 *data, int len, int finish)
{
hfcusb_data *hfc = fifo->hfc;
int transp_mode, fifon;
@@ -802,8 +802,8 @@ collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, int finish)
memcpy(skb_put(fifo->skbuff, len), data, len);
} else {
DBG(HFCUSB_DBG_FIFO_ERR,
"HCF-USB: got frame exceeded fifo->max_size(%d) fifo(%d)",
fifo->max_size, fifon);
"HCF-USB: got frame exceeded fifo->max_size(%d) fifo(%d)",
fifo->max_size, fifon);
DBG_SKB(HFCUSB_DBG_VERBOSE_USB, fifo->skbuff);
skb_trim(fifo->skbuff, 0);
}
@@ -817,7 +817,7 @@ collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, int finish)
/* we have a complete hdlc packet */
if (finish) {
if (fifo->skbuff->len > 3 &&
!fifo->skbuff->data[fifo->skbuff->len - 1]) {
!fifo->skbuff->data[fifo->skbuff->len - 1]) {
if (fifon == HFCUSB_D_RX) {
DBG(HFCUSB_DBG_DCHANNEL,
@@ -876,10 +876,10 @@ rx_int_complete(struct urb *urb)
if (fifon == HFCUSB_D_RX) {
DBG(HFCUSB_DBG_VERBOSE_USB,
"HFC-S USB: INT-D-RX lst_urblen:%2d "
"act_urblen:%2d max-urblen:%2d EOF:0x%0x",
fifo->last_urblen, len, maxlen,
eof[5]);
"HFC-S USB: INT-D-RX lst_urblen:%2d "
"act_urblen:%2d max-urblen:%2d EOF:0x%0x",
fifo->last_urblen, len, maxlen,
eof[5]);
DBG_PACKET(HFCUSB_DBG_VERBOSE_USB, buf, len);
}
@@ -909,7 +909,7 @@ rx_int_complete(struct urb *urb)
/* start initial INT-URB for certain fifo */
static void
start_int_fifo(usb_fifo * fifo)
start_int_fifo(usb_fifo *fifo)
{
int errcode;
@@ -936,7 +936,7 @@ start_int_fifo(usb_fifo * fifo)
}
static void
setup_bchannel(hfcusb_data * hfc, int channel, int mode)
setup_bchannel(hfcusb_data *hfc, int channel, int mode)
{
__u8 val, idx_table[2] = { 0, 2 };
@@ -999,100 +999,100 @@ hfc_usb_l2l1(struct hisax_if *my_hisax_if, int pr, void *arg)
hfcusb_data *hfc = fifo->hfc;
switch (pr) {
case PH_ACTIVATE | REQUEST:
if (fifo->fifonum == HFCUSB_D_TX) {
DBG(HFCUSB_DBG_STATES,
"HFC_USB: hfc_usb_d_l2l1 D-chan: PH_ACTIVATE | REQUEST");
case PH_ACTIVATE | REQUEST:
if (fifo->fifonum == HFCUSB_D_TX) {
DBG(HFCUSB_DBG_STATES,
"HFC_USB: hfc_usb_d_l2l1 D-chan: PH_ACTIVATE | REQUEST");
if (hfc->l1_state != 3
&& hfc->l1_state != 7) {
hfc->d_if.ifc.l1l2(&hfc->d_if.ifc,
PH_DEACTIVATE |
if (hfc->l1_state != 3
&& hfc->l1_state != 7) {
hfc->d_if.ifc.l1l2(&hfc->d_if.ifc,
PH_DEACTIVATE |
INDICATION,
NULL);
DBG(HFCUSB_DBG_STATES,
"HFC-S USB: PH_DEACTIVATE | INDICATION sent (not state 3 or 7)");
} else {
if (hfc->l1_state == 7) { /* l1 already active */
hfc->d_if.ifc.l1l2(&hfc->
d_if.
ifc,
PH_ACTIVATE
|
INDICATION,
NULL);
DBG(HFCUSB_DBG_STATES,
"HFC-S USB: PH_DEACTIVATE | INDICATION sent (not state 3 or 7)");
"HFC-S USB: PH_ACTIVATE | INDICATION sent again ;)");
} else {
if (hfc->l1_state == 7) { /* l1 already active */
hfc->d_if.ifc.l1l2(&hfc->
d_if.
ifc,
PH_ACTIVATE
|
INDICATION,
NULL);
DBG(HFCUSB_DBG_STATES,
"HFC-S USB: PH_ACTIVATE | INDICATION sent again ;)");
} else {
/* force sending sending INFO1 */
queue_control_request(hfc,
HFCUSB_STATES,
0x14,
1);
mdelay(1);
/* start l1 activation */
queue_control_request(hfc,
HFCUSB_STATES,
0x04,
1);
if (!timer_pending
(&hfc->t3_timer)) {
hfc->t3_timer.
expires =
jiffies +
(HFC_TIMER_T3 *
HZ) / 1000;
add_timer(&hfc->
t3_timer);
}
/* force sending sending INFO1 */
queue_control_request(hfc,
HFCUSB_STATES,
0x14,
1);
mdelay(1);
/* start l1 activation */
queue_control_request(hfc,
HFCUSB_STATES,
0x04,
1);
if (!timer_pending
(&hfc->t3_timer)) {
hfc->t3_timer.
expires =
jiffies +
(HFC_TIMER_T3 *
HZ) / 1000;
add_timer(&hfc->
t3_timer);
}
}
} else {
DBG(HFCUSB_DBG_STATES,
"HFC_USB: hfc_usb_d_l2l1 B-chan: PH_ACTIVATE | REQUEST");
setup_bchannel(hfc,
(fifo->fifonum ==
HFCUSB_B1_TX) ? 0 : 1,
(long) arg);
fifo->hif->l1l2(fifo->hif,
PH_ACTIVATE | INDICATION,
NULL);
}
break;
case PH_DEACTIVATE | REQUEST:
if (fifo->fifonum == HFCUSB_D_TX) {
DBG(HFCUSB_DBG_STATES,
"HFC_USB: hfc_usb_d_l2l1 D-chan: PH_DEACTIVATE | REQUEST");
} else {
DBG(HFCUSB_DBG_STATES,
"HFC_USB: hfc_usb_d_l2l1 Bx-chan: PH_DEACTIVATE | REQUEST");
setup_bchannel(hfc,
(fifo->fifonum ==
HFCUSB_B1_TX) ? 0 : 1,
(int) L1_MODE_NULL);
fifo->hif->l1l2(fifo->hif,
PH_DEACTIVATE | INDICATION,
NULL);
}
break;
case PH_DATA | REQUEST:
if (fifo->skbuff && fifo->delete_flg) {
dev_kfree_skb_any(fifo->skbuff);
fifo->skbuff = NULL;
fifo->delete_flg = 0;
}
fifo->skbuff = arg; /* we have a new buffer */
break;
default:
} else {
DBG(HFCUSB_DBG_STATES,
"HFC_USB: hfc_usb_d_l2l1: unknown state : %#x", pr);
break;
"HFC_USB: hfc_usb_d_l2l1 B-chan: PH_ACTIVATE | REQUEST");
setup_bchannel(hfc,
(fifo->fifonum ==
HFCUSB_B1_TX) ? 0 : 1,
(long) arg);
fifo->hif->l1l2(fifo->hif,
PH_ACTIVATE | INDICATION,
NULL);
}
break;
case PH_DEACTIVATE | REQUEST:
if (fifo->fifonum == HFCUSB_D_TX) {
DBG(HFCUSB_DBG_STATES,
"HFC_USB: hfc_usb_d_l2l1 D-chan: PH_DEACTIVATE | REQUEST");
} else {
DBG(HFCUSB_DBG_STATES,
"HFC_USB: hfc_usb_d_l2l1 Bx-chan: PH_DEACTIVATE | REQUEST");
setup_bchannel(hfc,
(fifo->fifonum ==
HFCUSB_B1_TX) ? 0 : 1,
(int) L1_MODE_NULL);
fifo->hif->l1l2(fifo->hif,
PH_DEACTIVATE | INDICATION,
NULL);
}
break;
case PH_DATA | REQUEST:
if (fifo->skbuff && fifo->delete_flg) {
dev_kfree_skb_any(fifo->skbuff);
fifo->skbuff = NULL;
fifo->delete_flg = 0;
}
fifo->skbuff = arg; /* we have a new buffer */
break;
default:
DBG(HFCUSB_DBG_STATES,
"HFC_USB: hfc_usb_d_l2l1: unknown state : %#x", pr);
break;
}
}
/* initial init HFC-S USB chip registers, HiSax interface, USB URBs */
static int
hfc_usb_init(hfcusb_data * hfc)
hfc_usb_init(hfcusb_data *hfc)
{
usb_fifo *fifo;
int i;
@@ -1138,7 +1138,7 @@ hfc_usb_init(hfcusb_data * hfc)
write_usb(hfc, HFCUSB_FIFO, i); /* select the desired fifo */
fifo[i].skbuff = NULL; /* init buffer pointer */
fifo[i].max_size =
(i <= HFCUSB_B2_RX) ? MAX_BCH_SIZE : MAX_DFRAME_LEN;
(i <= HFCUSB_B2_RX) ? MAX_BCH_SIZE : MAX_DFRAME_LEN;
fifo[i].last_urblen = 0;
/* set 2 bit for D- & E-channel */
write_usb(hfc, HFCUSB_HDLC_PAR,
@@ -1185,7 +1185,7 @@ hfc_usb_init(hfcusb_data * hfc)
usb_fill_control_urb(hfc->ctrl_urb,
hfc->dev,
hfc->ctrl_out_pipe,
(u_char *) & hfc->ctrl_write,
(u_char *)&hfc->ctrl_write,
NULL, 0, ctrl_complete, hfc);
/* Init All Fifos */
for (i = 0; i < HFCUSB_NUM_FIFOS; i++) {
@@ -1264,9 +1264,9 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)
struct usb_host_endpoint *ep;
int ifnum = iface->desc.bInterfaceNumber;
int i, idx, alt_idx, probe_alt_setting, vend_idx, cfg_used, *vcf,
attr, cfg_found, cidx, ep_addr;
attr, cfg_found, cidx, ep_addr;
int cmptbl[16], small_match, iso_packet_size, packet_size,
alt_used = 0;
alt_used = 0;
hfcsusb_vdata *driver_info;
vend_idx = 0xffff;
@@ -1309,7 +1309,7 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)
for (i = 0; i < iface->desc.bNumEndpoints;
i++) {
ep_addr =
ep->desc.bEndpointAddress;
ep->desc.bEndpointAddress;
/* get endpoint base */
idx = ((ep_addr & 0x7f) - 1) * 2;
if (ep_addr & 0x80)
@@ -1345,7 +1345,7 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)
if (cfg_used < small_match) {
small_match = cfg_used;
alt_used =
probe_alt_setting;
probe_alt_setting;
iface_used = iface;
}
}
@@ -1376,95 +1376,95 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)
if (vcf[idx] != EP_NOP
&& vcf[idx] != EP_NUL) {
switch (attr) {
case USB_ENDPOINT_XFER_INT:
case USB_ENDPOINT_XFER_INT:
context->
fifos[cidx].
pipe =
usb_rcvintpipe
(dev,
ep->desc.
bEndpointAddress);
context->
fifos[cidx].
usb_transfer_mode
= USB_INT;
packet_size =
le16_to_cpu(ep->desc.wMaxPacketSize);
break;
case USB_ENDPOINT_XFER_BULK:
if (ep_addr & 0x80)
context->
fifos[cidx].
pipe =
usb_rcvintpipe
(dev,
ep->desc.
bEndpointAddress);
fifos
[cidx].
pipe =
usb_rcvbulkpipe
(dev,
ep->
desc.
bEndpointAddress);
else
context->
fifos[cidx].
usb_transfer_mode
= USB_INT;
packet_size =
le16_to_cpu(ep->desc.wMaxPacketSize);
break;
case USB_ENDPOINT_XFER_BULK:
if (ep_addr & 0x80)
context->
fifos
[cidx].
pipe =
usb_rcvbulkpipe
(dev,
ep->
desc.
bEndpointAddress);
else
context->
fifos
[cidx].
pipe =
usb_sndbulkpipe
(dev,
ep->
desc.
bEndpointAddress);
fifos
[cidx].
pipe =
usb_sndbulkpipe
(dev,
ep->
desc.
bEndpointAddress);
context->
fifos[cidx].
usb_transfer_mode
= USB_BULK;
packet_size =
le16_to_cpu(ep->desc.wMaxPacketSize);
break;
case USB_ENDPOINT_XFER_ISOC:
if (ep_addr & 0x80)
context->
fifos[cidx].
usb_transfer_mode
= USB_BULK;
packet_size =
le16_to_cpu(ep->desc.wMaxPacketSize);
break;
case USB_ENDPOINT_XFER_ISOC:
if (ep_addr & 0x80)
context->
fifos
[cidx].
pipe =
usb_rcvisocpipe
(dev,
ep->
desc.
bEndpointAddress);
else
context->
fifos
[cidx].
pipe =
usb_sndisocpipe
(dev,
ep->
desc.
bEndpointAddress);
fifos
[cidx].
pipe =
usb_rcvisocpipe
(dev,
ep->
desc.
bEndpointAddress);
else
context->
fifos[cidx].
usb_transfer_mode
= USB_ISOC;
iso_packet_size =
le16_to_cpu(ep->desc.wMaxPacketSize);
break;
default:
context->
fifos[cidx].
pipe = 0;
fifos
[cidx].
pipe =
usb_sndisocpipe
(dev,
ep->
desc.
bEndpointAddress);
context->
fifos[cidx].
usb_transfer_mode
= USB_ISOC;
iso_packet_size =
le16_to_cpu(ep->desc.wMaxPacketSize);
break;
default:
context->
fifos[cidx].
pipe = 0;
} /* switch attribute */
if (context->fifos[cidx].pipe) {
context->fifos[cidx].
fifonum = cidx;
fifonum = cidx;
context->fifos[cidx].hfc =
context;
context;
context->fifos[cidx].usb_packet_maxlen =
le16_to_cpu(ep->desc.wMaxPacketSize);
le16_to_cpu(ep->desc.wMaxPacketSize);
context->fifos[cidx].
intervall =
ep->desc.bInterval;
intervall =
ep->desc.bInterval;
context->fifos[cidx].
skbuff = NULL;
skbuff = NULL;
}
}
ep++;
@@ -1480,14 +1480,14 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)
/* create the control pipes needed for register access */
context->ctrl_in_pipe =
usb_rcvctrlpipe(context->dev, 0);
usb_rcvctrlpipe(context->dev, 0);
context->ctrl_out_pipe =
usb_sndctrlpipe(context->dev, 0);
usb_sndctrlpipe(context->dev, 0);
context->ctrl_urb = usb_alloc_urb(0, GFP_KERNEL);
driver_info =
(hfcsusb_vdata *) hfcusb_idtab[vend_idx].
driver_info;
(hfcsusb_vdata *) hfcusb_idtab[vend_idx].
driver_info;
printk(KERN_INFO "HFC-S USB: detected \"%s\"\n",
driver_info->vend_name);

Visa fil

@@ -76,11 +76,11 @@
#define SINK_MIN 48
#define SINK_DMIN 12
#define SINK_DMAX 18
#define BITLINE_INF (-64*8)
#define BITLINE_INF (-64 * 8)
/* HFC-S USB register access by Control-URSs */
#define write_usb(a,b,c)usb_control_msg((a)->dev,(a)->ctrl_out_pipe,0,0x40,(c),(b),NULL,0,HFC_CTRL_TIMEOUT)
#define read_usb(a,b,c) usb_control_msg((a)->dev,(a)->ctrl_in_pipe,1,0xC0,0,(b),(c),1,HFC_CTRL_TIMEOUT)
#define write_usb(a, b, c) usb_control_msg((a)->dev, (a)->ctrl_out_pipe, 0, 0x40, (c), (b), NULL, 0, HFC_CTRL_TIMEOUT)
#define read_usb(a, b, c) usb_control_msg((a)->dev, (a)->ctrl_in_pipe, 1, 0xC0, 0, (b), (c), 1, HFC_CTRL_TIMEOUT)
#define HFC_CTRL_BUFSIZE 32
/* entry and size of output/input control buffer */
@@ -200,8 +200,8 @@ typedef struct {
#define LED_B2_OFF 9
#define LED_B2_DATA 10
#define LED_NORMAL 0 // LEDs are normal
#define LED_INVERTED 1 // LEDs are inverted
#define LED_NORMAL 0 // LEDs are normal
#define LED_INVERTED 1 // LEDs are inverted
#endif // __HFC_USB_H__

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -26,8 +26,8 @@ hfcs_interrupt(int intno, void *dev_id)
u_long flags;
spin_lock_irqsave(&cs->lock, flags);
if ((HFCD_ANYINT | HFCD_BUSY_NBUSY) &
(stat = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_STAT))) {
if ((HFCD_ANYINT | HFCD_BUSY_NBUSY) &
(stat = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_STAT))) {
val = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_INT_S1);
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "HFCS: stat(%02x) s1(%02x)", stat, val);
@@ -106,57 +106,57 @@ hfcs_card_msg(struct IsdnCardState *cs, int mt, void *arg)
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "HFCS: card_msg %x", mt);
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_hfcs(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_hfcs(cs);
return(0);
case CARD_INIT:
delay = (75*HZ)/100 +1;
mod_timer(&cs->hw.hfcD.timer, jiffies + delay);
spin_lock_irqsave(&cs->lock, flags);
reset_hfcs(cs);
init2bds0(cs);
spin_unlock_irqrestore(&cs->lock, flags);
delay = (80*HZ)/1000 +1;
msleep(80);
spin_lock_irqsave(&cs->lock, flags);
cs->hw.hfcD.ctmt |= HFCD_TIM800;
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcD.ctmt);
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_hfcs(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_hfcs(cs);
return (0);
case CARD_INIT:
delay = (75 * HZ) / 100 + 1;
mod_timer(&cs->hw.hfcD.timer, jiffies + delay);
spin_lock_irqsave(&cs->lock, flags);
reset_hfcs(cs);
init2bds0(cs);
spin_unlock_irqrestore(&cs->lock, flags);
delay = (80 * HZ) / 1000 + 1;
msleep(80);
spin_lock_irqsave(&cs->lock, flags);
cs->hw.hfcD.ctmt |= HFCD_TIM800;
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcD.ctmt);
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
#ifdef __ISAPNP__
static struct isapnp_device_id hfc_ids[] __devinitdata = {
{ ISAPNP_VENDOR('A', 'N', 'X'), ISAPNP_FUNCTION(0x1114),
ISAPNP_VENDOR('A', 'N', 'X'), ISAPNP_FUNCTION(0x1114),
ISAPNP_VENDOR('A', 'N', 'X'), ISAPNP_FUNCTION(0x1114),
(unsigned long) "Acer P10" },
{ ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0002),
ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0002),
ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0002),
(unsigned long) "Billion 2" },
{ ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0001),
ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0001),
ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0001),
(unsigned long) "Billion 1" },
{ ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x7410),
ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x7410),
ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x7410),
(unsigned long) "IStar PnP" },
{ ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2610),
ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2610),
ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2610),
(unsigned long) "Teles 16.3c" },
{ ISAPNP_VENDOR('S', 'F', 'M'), ISAPNP_FUNCTION(0x0001),
ISAPNP_VENDOR('S', 'F', 'M'), ISAPNP_FUNCTION(0x0001),
ISAPNP_VENDOR('S', 'F', 'M'), ISAPNP_FUNCTION(0x0001),
(unsigned long) "Tornado Tipa C" },
{ ISAPNP_VENDOR('K', 'Y', 'E'), ISAPNP_FUNCTION(0x0001),
ISAPNP_VENDOR('K', 'Y', 'E'), ISAPNP_FUNCTION(0x0001),
ISAPNP_VENDOR('K', 'Y', 'E'), ISAPNP_FUNCTION(0x0001),
(unsigned long) "Genius Speed Surfer" },
{ 0, }
};
@@ -177,30 +177,30 @@ setup_hfcs(struct IsdnCard *card)
#ifdef __ISAPNP__
if (!card->para[1] && isapnp_present()) {
struct pnp_dev *pnp_d;
while(ipid->card_vendor) {
while (ipid->card_vendor) {
if ((pnp_c = pnp_find_card(ipid->card_vendor,
ipid->card_device, pnp_c))) {
ipid->card_device, pnp_c))) {
pnp_d = NULL;
if ((pnp_d = pnp_find_dev(pnp_c,
ipid->vendor, ipid->function, pnp_d))) {
ipid->vendor, ipid->function, pnp_d))) {
int err;
printk(KERN_INFO "HiSax: %s detected\n",
(char *)ipid->driver_data);
(char *)ipid->driver_data);
pnp_disable_dev(pnp_d);
err = pnp_activate_dev(pnp_d);
if (err<0) {
if (err < 0) {
printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
__func__, err);
return(0);
__func__, err);
return (0);
}
card->para[1] = pnp_port_start(pnp_d, 0);
card->para[0] = pnp_irq(pnp_d, 0);
if (!card->para[0] || !card->para[1]) {
printk(KERN_ERR "HFC PnP:some resources are missing %ld/%lx\n",
card->para[0], card->para[1]);
card->para[0], card->para[1]);
pnp_disable_dev(pnp_d);
return(0);
return (0);
}
break;
} else {
@@ -209,10 +209,10 @@ setup_hfcs(struct IsdnCard *card)
}
ipid++;
pnp_c = NULL;
}
}
if (!ipid->card_vendor) {
printk(KERN_INFO "HFC PnP: no ISAPnP card found\n");
return(0);
return (0);
}
}
#endif
@@ -229,7 +229,7 @@ setup_hfcs(struct IsdnCard *card)
if (cs->typ == ISDN_CTYPE_TELES3C) {
cs->hw.hfcD.bfifosize = 1024 + 512;
} else if (cs->typ == ISDN_CTYPE_ACERP10) {
cs->hw.hfcD.bfifosize = 7*1024 + 512;
cs->hw.hfcD.bfifosize = 7 * 1024 + 512;
} else
return (0);
if (!request_region(cs->hw.hfcD.addr, 2, "HFCS isdn")) {

Visa fil

@@ -133,15 +133,15 @@ extern const char *tei_revision;
/* include l3dss1 & ni1 specific process structures, but no other defines */
#ifdef CONFIG_HISAX_EURO
#define l3dss1_process
#include "l3dss1.h"
#undef l3dss1_process
#define l3dss1_process
#include "l3dss1.h"
#undef l3dss1_process
#endif /* CONFIG_HISAX_EURO */
#ifdef CONFIG_HISAX_NI1
#define l3ni1_process
#include "l3ni1.h"
#undef l3ni1_process
#define l3ni1_process
#include "l3ni1.h"
#undef l3ni1_process
#endif /* CONFIG_HISAX_NI1 */
#define MAX_DFRAME_LEN 260
@@ -149,7 +149,7 @@ extern const char *tei_revision;
#define HSCX_BUFMAX 4096
#define MAX_DATA_SIZE (HSCX_BUFMAX - 4)
#define MAX_DATA_MEM (HSCX_BUFMAX + 64)
#define RAW_BUFMAX (((HSCX_BUFMAX*6)/5) + 5)
#define RAW_BUFMAX (((HSCX_BUFMAX * 6) / 5) + 5)
#define MAX_HEADER_LEN 4
#define MAX_WINDOW 8
#define MAX_MON_FRAME 32
@@ -165,7 +165,7 @@ extern const char *tei_revision;
struct FsmInst;
typedef void (* FSMFNPTR)(struct FsmInst *, int, void *);
typedef void (*FSMFNPTR)(struct FsmInst *, int, void *);
struct Fsm {
FSMFNPTR *jumpmatrix;
@@ -272,10 +272,10 @@ struct Layer2 {
struct Layer3 {
void (*l3l4) (struct PStack *, int, void *);
void (*l3ml3) (struct PStack *, int, void *);
void (*l3ml3) (struct PStack *, int, void *);
void (*l3l2) (struct PStack *, int, void *);
struct FsmInst l3m;
struct FsmTimer l3m_timer;
struct FsmTimer l3m_timer;
struct sk_buff_head squeue;
struct l3_process *proc;
struct l3_process *global;
@@ -286,7 +286,7 @@ struct Layer3 {
struct LLInterface {
void (*l4l3) (struct PStack *, int, void *);
int (*l4l3_proto) (struct PStack *, isdn_ctrl *);
int (*l4l3_proto) (struct PStack *, isdn_ctrl *);
void *userdata;
u_long flag;
};
@@ -325,16 +325,16 @@ struct PStack {
struct Management ma;
int protocol; /* EDSS1, 1TR6 or NI1 */
/* protocol specific data fields */
union
{ u_char uuuu; /* only as dummy */
/* protocol specific data fields */
union
{ u_char uuuu; /* only as dummy */
#ifdef CONFIG_HISAX_EURO
dss1_stk_priv dss1; /* private dss1 data */
#endif /* CONFIG_HISAX_EURO */
dss1_stk_priv dss1; /* private dss1 data */
#endif /* CONFIG_HISAX_EURO */
#ifdef CONFIG_HISAX_NI1
ni1_stk_priv ni1; /* private ni1 data */
#endif /* CONFIG_HISAX_NI1 */
} prot;
ni1_stk_priv ni1; /* private ni1 data */
#endif /* CONFIG_HISAX_NI1 */
} prot;
};
struct l3_process {
@@ -347,18 +347,18 @@ struct l3_process {
struct Channel *chan;
struct PStack *st;
struct l3_process *next;
ulong redir_result;
ulong redir_result;
/* protocol specific data fields */
union
{ u_char uuuu; /* only when euro not defined, avoiding empty union */
#ifdef CONFIG_HISAX_EURO
dss1_proc_priv dss1; /* private dss1 data */
#endif /* CONFIG_HISAX_EURO */
/* protocol specific data fields */
union
{ u_char uuuu; /* only when euro not defined, avoiding empty union */
#ifdef CONFIG_HISAX_EURO
dss1_proc_priv dss1; /* private dss1 data */
#endif /* CONFIG_HISAX_EURO */
#ifdef CONFIG_HISAX_NI1
ni1_proc_priv ni1; /* private ni1 data */
#endif /* CONFIG_HISAX_NI1 */
} prot;
ni1_proc_priv ni1; /* private ni1 data */
#endif /* CONFIG_HISAX_NI1 */
} prot;
};
struct hscx_hw {
@@ -642,7 +642,7 @@ struct hfc_hw {
unsigned char cip;
u_char isac_spcr;
struct timer_list timer;
};
};
struct sedl_hw {
unsigned int cfg_reg;
@@ -693,25 +693,25 @@ struct hfcPCI_hw {
unsigned char int_m2;
unsigned char int_s1;
unsigned char sctrl;
unsigned char sctrl_r;
unsigned char sctrl_e;
unsigned char trm;
unsigned char sctrl_r;
unsigned char sctrl_e;
unsigned char trm;
unsigned char stat;
unsigned char fifo;
unsigned char fifo_en;
unsigned char bswapped;
unsigned char nt_mode;
int nt_timer;
struct pci_dev *dev;
unsigned char *pci_io; /* start of PCI IO memory */
unsigned char fifo_en;
unsigned char bswapped;
unsigned char nt_mode;
int nt_timer;
struct pci_dev *dev;
unsigned char *pci_io; /* start of PCI IO memory */
dma_addr_t dma; /* dma handle for Fifos */
void *fifos; /* FIFO memory */
int last_bfifo_cnt[2]; /* marker saving last b-fifo frame count */
void *fifos; /* FIFO memory */
int last_bfifo_cnt[2]; /* marker saving last b-fifo frame count */
struct timer_list timer;
};
struct hfcSX_hw {
unsigned long base;
unsigned long base;
unsigned char cirm;
unsigned char ctmt;
unsigned char conn;
@@ -720,18 +720,18 @@ struct hfcSX_hw {
unsigned char int_m2;
unsigned char int_s1;
unsigned char sctrl;
unsigned char sctrl_r;
unsigned char sctrl_e;
unsigned char trm;
unsigned char sctrl_r;
unsigned char sctrl_e;
unsigned char trm;
unsigned char stat;
unsigned char fifo;
unsigned char bswapped;
unsigned char nt_mode;
unsigned char chip;
int b_fifo_size;
unsigned char last_fifo;
void *extra;
int nt_timer;
unsigned char bswapped;
unsigned char nt_mode;
unsigned char chip;
int b_fifo_size;
unsigned char last_fifo;
void *extra;
int nt_timer;
struct timer_list timer;
};
@@ -784,13 +784,13 @@ struct bkm_hw {
/* Scitel Quadro stuff */
unsigned long plx_adr;
unsigned long data_adr;
};
};
struct gazel_hw {
struct pci_dev *dev;
unsigned int cfg_reg;
unsigned int pciaddr[2];
signed int ipac;
signed int ipac;
signed int isac;
signed int hscx[2];
signed int isacfifo;
@@ -877,8 +877,8 @@ struct icc_chip {
#define HW_ARCOFI 3
#define FLG_TWO_DCHAN 4
#define FLG_L1_DBUSY 5
#define FLG_DBUSY_TIMER 6
#define FLG_LOCK_ATOMIC 7
#define FLG_DBUSY_TIMER 6
#define FLG_LOCK_ATOMIC 7
#define FLG_ARCOFI_TIMER 8
#define FLG_ARCOFI_ERROR 9
#define FLG_HW_L1_UINT 10
@@ -892,8 +892,8 @@ struct IsdnCardState {
u_long irq_flags;
u_long HW_Flags;
int *busy_flag;
int chanlimit; /* limited number of B-chans to use */
int logecho; /* log echo if supported by card */
int chanlimit; /* limited number of B-chans to use */
int logecho; /* log echo if supported by card */
union {
struct elsa_hw elsa;
struct teles0_hw teles0;
@@ -937,8 +937,8 @@ struct IsdnCardState {
void (*DC_Close) (struct IsdnCardState *);
irq_handler_t irq_func;
int (*auxcmd) (struct IsdnCardState *, isdn_ctrl *);
struct Channel channel[2+MAX_WAITING_CALLS];
struct BCState bcs[2+MAX_WAITING_CALLS];
struct Channel channel[2 + MAX_WAITING_CALLS];
struct BCState bcs[2 + MAX_WAITING_CALLS];
struct PStack *stlist;
struct sk_buff_head rq, sq; /* D-channel queues */
int cardnr;
@@ -969,7 +969,7 @@ struct IsdnCardState {
};
#define schedule_event(s, ev) do {test_and_set_bit(ev, &s->event);schedule_work(&s->tqueue); } while(0)
#define schedule_event(s, ev) do { test_and_set_bit(ev, &s->event); schedule_work(&s->tqueue); } while (0)
#define MON0_RX 1
#define MON1_RX 2
@@ -1053,7 +1053,7 @@ struct IsdnCardState {
#define CARD_IX1MICROR2 0
#endif
#ifdef CONFIG_HISAX_DIEHLDIVA
#ifdef CONFIG_HISAX_DIEHLDIVA
#define CARD_DIEHLDIVA 1
#ifndef ISDN_CHIP_ISAC
#define ISDN_CHIP_ISAC 1
@@ -1062,7 +1062,7 @@ struct IsdnCardState {
#define CARD_DIEHLDIVA 0
#endif
#ifdef CONFIG_HISAX_ASUSCOM
#ifdef CONFIG_HISAX_ASUSCOM
#define CARD_ASUSCOM 1
#ifndef ISDN_CHIP_ISAC
#define ISDN_CHIP_ISAC 1
@@ -1071,7 +1071,7 @@ struct IsdnCardState {
#define CARD_ASUSCOM 0
#endif
#ifdef CONFIG_HISAX_TELEINT
#ifdef CONFIG_HISAX_TELEINT
#define CARD_TELEINT 1
#ifndef ISDN_CHIP_ISAC
#define ISDN_CHIP_ISAC 1
@@ -1080,7 +1080,7 @@ struct IsdnCardState {
#define CARD_TELEINT 0
#endif
#ifdef CONFIG_HISAX_SEDLBAUER
#ifdef CONFIG_HISAX_SEDLBAUER
#define CARD_SEDLBAUER 1
#ifndef ISDN_CHIP_ISAC
#define ISDN_CHIP_ISAC 1
@@ -1089,7 +1089,7 @@ struct IsdnCardState {
#define CARD_SEDLBAUER 0
#endif
#ifdef CONFIG_HISAX_SPORTSTER
#ifdef CONFIG_HISAX_SPORTSTER
#define CARD_SPORTSTER 1
#ifndef ISDN_CHIP_ISAC
#define ISDN_CHIP_ISAC 1
@@ -1098,7 +1098,7 @@ struct IsdnCardState {
#define CARD_SPORTSTER 0
#endif
#ifdef CONFIG_HISAX_MIC
#ifdef CONFIG_HISAX_MIC
#define CARD_MIC 1
#ifndef ISDN_CHIP_ISAC
#define ISDN_CHIP_ISAC 1
@@ -1107,7 +1107,7 @@ struct IsdnCardState {
#define CARD_MIC 0
#endif
#ifdef CONFIG_HISAX_NETJET
#ifdef CONFIG_HISAX_NETJET
#define CARD_NETJET_S 1
#ifndef ISDN_CHIP_ISAC
#define ISDN_CHIP_ISAC 1
@@ -1206,7 +1206,7 @@ struct IsdnCardState {
#define CARD_W6692 0
#endif
#ifdef CONFIG_HISAX_NETJET_U
#ifdef CONFIG_HISAX_NETJET_U
#define CARD_NETJET_U 1
#ifndef ISDN_CHIP_ICC
#define ISDN_CHIP_ICC 1
@@ -1269,8 +1269,8 @@ void setstack_l3dc(struct PStack *st, struct Channel *chanp);
void setstack_l3bc(struct PStack *st, struct Channel *chanp);
void releasestack_isdnl3(struct PStack *st);
u_char *findie(u_char * p, int size, u_char ie, int wanted_set);
int getcallref(u_char * p);
u_char *findie(u_char *p, int size, u_char ie, int wanted_set);
int getcallref(u_char *p);
int newcallref(void);
int FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount);
@@ -1279,36 +1279,36 @@ int FsmEvent(struct FsmInst *fi, int event, void *arg);
void FsmChangeState(struct FsmInst *fi, int newstate);
void FsmInitTimer(struct FsmInst *fi, struct FsmTimer *ft);
int FsmAddTimer(struct FsmTimer *ft, int millisec, int event,
void *arg, int where);
void *arg, int where);
void FsmRestartTimer(struct FsmTimer *ft, int millisec, int event,
void *arg, int where);
void *arg, int where);
void FsmDelTimer(struct FsmTimer *ft, int where);
int jiftime(char *s, long mark);
int HiSax_command(isdn_ctrl * ic);
int HiSax_command(isdn_ctrl *ic);
int HiSax_writebuf_skb(int id, int chan, int ack, struct sk_buff *skb);
__printf(3, 4)
void HiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, ...);
__printf(3, 0)
void VHiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, va_list args);
void HiSax_reportcard(int cardnr, int sel);
int QuickHex(char *txt, u_char * p, int cnt);
void LogFrame(struct IsdnCardState *cs, u_char * p, int size);
int QuickHex(char *txt, u_char *p, int cnt);
void LogFrame(struct IsdnCardState *cs, u_char *p, int size);
void dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir);
void iecpy(u_char * dest, u_char * iestart, int ieoffset);
void iecpy(u_char *dest, u_char *iestart, int ieoffset);
#endif /* __KERNEL__ */
/*
* Busywait delay for `jiffs' jiffies
*/
#define HZDELAY(jiffs) do { \
int tout = jiffs; \
\
while (tout--) { \
int loops = USEC_PER_SEC / HZ; \
while (loops--) \
udelay(1); \
} \
#define HZDELAY(jiffs) do { \
int tout = jiffs; \
\
while (tout--) { \
int loops = USEC_PER_SEC / HZ; \
while (loops--) \
udelay(1); \
} \
} while (0)
int ll_run(struct IsdnCardState *cs, int addfeatures);

Visa fil

@@ -54,9 +54,9 @@ typedef struct IsdnCardState IsdnCardState_t;
typedef struct IsdnCard IsdnCard_t;
struct IsdnCard {
int typ;
int protocol; /* EDSS1, 1TR6 or NI1 */
unsigned long para[4];
int typ;
int protocol; /* EDSS1, 1TR6 or NI1 */
unsigned long para[4];
IsdnCardState_t *cs;
};

Visa fil

@@ -4,12 +4,12 @@
* Author Frode Isaksen
* Copyright 2001 by Frode Isaksen <fisaksen@bewan.com>
* 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
* How to use:
*
*
* Before including this file, you need to
* #define __debug_variable my_debug
* where my_debug is a variable in your code which
@@ -25,45 +25,45 @@
#ifdef CONFIG_HISAX_DEBUG
#define DBG(level, format, arg...) do { \
if (level & __debug_variable) \
printk(KERN_DEBUG "%s: " format "\n" , __func__ , ## arg); \
} while (0)
#define DBG(level, format, arg...) do { \
if (level & __debug_variable) \
printk(KERN_DEBUG "%s: " format "\n" , __func__ , ## arg); \
} while (0)
#define DBG_PACKET(level,data,count) \
if (level & __debug_variable) dump_packet(__func__,data,count)
#define DBG_PACKET(level, data, count) \
if (level & __debug_variable) dump_packet(__func__, data, count)
#define DBG_SKB(level,skb) \
if ((level & __debug_variable) && skb) dump_packet(__func__,skb->data,skb->len)
#define DBG_SKB(level, skb) \
if ((level & __debug_variable) && skb) dump_packet(__func__, skb->data, skb->len)
static void __attribute__((unused))
dump_packet(const char *name,const u_char *data,int pkt_len)
dump_packet(const char *name, const u_char *data, int pkt_len)
{
#define DUMP_HDR_SIZE 20
#define DUMP_TLR_SIZE 8
if (pkt_len) {
int i,len1,len2;
int i, len1, len2;
printk(KERN_DEBUG "%s: length=%d,data=",name,pkt_len);
printk(KERN_DEBUG "%s: length=%d,data=", name, pkt_len);
if (pkt_len > DUMP_HDR_SIZE+ DUMP_TLR_SIZE) {
if (pkt_len > DUMP_HDR_SIZE + DUMP_TLR_SIZE) {
len1 = DUMP_HDR_SIZE;
len2 = DUMP_TLR_SIZE;
} else {
len1 = pkt_len > DUMP_HDR_SIZE ? DUMP_HDR_SIZE : pkt_len;
len2 = 0;
len2 = 0;
}
for (i = 0; i < len1; ++i) {
printk ("%.2x", data[i]);
printk("%.2x", data[i]);
}
if (len2) {
printk ("..");
printk("..");
for (i = pkt_len-DUMP_TLR_SIZE; i < pkt_len; ++i) {
printk ("%.2x", data[i]);
printk("%.2x", data[i]);
}
}
printk ("\n");
printk("\n");
}
#undef DUMP_HDR_SIZE
#undef DUMP_TLR_SIZE
@@ -72,8 +72,8 @@ dump_packet(const char *name,const u_char *data,int pkt_len)
#else
#define DBG(level, format, arg...) do {} while (0)
#define DBG_PACKET(level,data,count) do {} while (0)
#define DBG_SKB(level,skb) do {} while (0)
#define DBG_PACKET(level, data, count) do {} while (0)
#define DBG_SKB(level, skb) do {} while (0)
#endif

Visa fil

@@ -4,7 +4,7 @@
* Author Kai Germaschewski
* Copyright 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
* 2001 by Karsten Keil <keil@isdn4linux.de>
*
*
* based upon Karsten Keil's original avm_pci.c driver
*
* This software may be used and distributed according to the terms
@@ -71,7 +71,7 @@ MODULE_DEVICE_TABLE(pci, fcpci_ids);
#ifdef CONFIG_PNP
static struct pnp_device_id fcpnp_ids[] __devinitdata = {
{
{
.id = "AVM0900",
.driver_data = (unsigned long) "Fritz!Card PnP",
},
@@ -153,7 +153,7 @@ MODULE_LICENSE("GPL");
static unsigned char fcpci_read_isac(struct isac *isac, unsigned char offset)
{
struct fritz_adapter *adapter = isac->priv;
unsigned char idx = (offset > 0x2f) ?
unsigned char idx = (offset > 0x2f) ?
AVM_IDX_ISAC_REG_HIGH : AVM_IDX_ISAC_REG_LOW;
unsigned char val;
unsigned long flags;
@@ -161,7 +161,7 @@ static unsigned char fcpci_read_isac(struct isac *isac, unsigned char offset)
spin_lock_irqsave(&adapter->hw_lock, flags);
outb(idx, adapter->io + AVM_INDEX);
val = inb(adapter->io + AVM_DATA + (offset & 0xf));
spin_unlock_irqrestore(&adapter->hw_lock, flags);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
DBG(0x1000, " port %#x, value %#x",
offset, val);
return val;
@@ -171,7 +171,7 @@ static void fcpci_write_isac(struct isac *isac, unsigned char offset,
unsigned char value)
{
struct fritz_adapter *adapter = isac->priv;
unsigned char idx = (offset > 0x2f) ?
unsigned char idx = (offset > 0x2f) ?
AVM_IDX_ISAC_REG_HIGH : AVM_IDX_ISAC_REG_LOW;
unsigned long flags;
@@ -180,10 +180,10 @@ static void fcpci_write_isac(struct isac *isac, unsigned char offset,
spin_lock_irqsave(&adapter->hw_lock, flags);
outb(idx, adapter->io + AVM_INDEX);
outb(value, adapter->io + AVM_DATA + (offset & 0xf));
spin_unlock_irqrestore(&adapter->hw_lock, flags);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
}
static void fcpci_read_isac_fifo(struct isac *isac, unsigned char * data,
static void fcpci_read_isac_fifo(struct isac *isac, unsigned char *data,
int size)
{
struct fritz_adapter *adapter = isac->priv;
@@ -192,10 +192,10 @@ static void fcpci_read_isac_fifo(struct isac *isac, unsigned char * data,
spin_lock_irqsave(&adapter->hw_lock, flags);
outb(AVM_IDX_ISAC_FIFO, adapter->io + AVM_INDEX);
insb(adapter->io + AVM_DATA, data, size);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
}
static void fcpci_write_isac_fifo(struct isac *isac, unsigned char * data,
static void fcpci_write_isac_fifo(struct isac *isac, unsigned char *data,
int size)
{
struct fritz_adapter *adapter = isac->priv;
@@ -204,7 +204,7 @@ static void fcpci_write_isac_fifo(struct isac *isac, unsigned char * data,
spin_lock_irqsave(&adapter->hw_lock, flags);
outb(AVM_IDX_ISAC_FIFO, adapter->io + AVM_INDEX);
outsb(adapter->io + AVM_DATA, data, size);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
}
static u32 fcpci_read_hdlc_status(struct fritz_adapter *adapter, int nr)
@@ -254,14 +254,14 @@ static unsigned char fcpci2_read_isac(struct isac *isac, unsigned char offset)
spin_lock_irqsave(&adapter->hw_lock, flags);
outl(offset, adapter->io + AVM_ISACSX_INDEX);
val = inl(adapter->io + AVM_ISACSX_DATA);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
DBG(0x1000, " port %#x, value %#x",
offset, val);
return val;
}
static void fcpci2_write_isac(struct isac *isac, unsigned char offset,
static void fcpci2_write_isac(struct isac *isac, unsigned char offset,
unsigned char value)
{
struct fritz_adapter *adapter = isac->priv;
@@ -272,10 +272,10 @@ static void fcpci2_write_isac(struct isac *isac, unsigned char offset,
spin_lock_irqsave(&adapter->hw_lock, flags);
outl(offset, adapter->io + AVM_ISACSX_INDEX);
outl(value, adapter->io + AVM_ISACSX_DATA);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
}
static void fcpci2_read_isac_fifo(struct isac *isac, unsigned char * data,
static void fcpci2_read_isac_fifo(struct isac *isac, unsigned char *data,
int size)
{
struct fritz_adapter *adapter = isac->priv;
@@ -286,10 +286,10 @@ static void fcpci2_read_isac_fifo(struct isac *isac, unsigned char * data,
outl(0, adapter->io + AVM_ISACSX_INDEX);
for (i = 0; i < size; i++)
data[i] = inl(adapter->io + AVM_ISACSX_DATA);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
}
static void fcpci2_write_isac_fifo(struct isac *isac, unsigned char * data,
static void fcpci2_write_isac_fifo(struct isac *isac, unsigned char *data,
int size)
{
struct fritz_adapter *adapter = isac->priv;
@@ -300,7 +300,7 @@ static void fcpci2_write_isac_fifo(struct isac *isac, unsigned char * data,
outl(0, adapter->io + AVM_ISACSX_INDEX);
for (i = 0; i < size; i++)
outl(data[i], adapter->io + AVM_ISACSX_DATA);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
spin_unlock_irqrestore(&adapter->hw_lock, flags);
}
static u32 fcpci2_read_hdlc_status(struct fritz_adapter *adapter, int nr)
@@ -349,10 +349,10 @@ static void __fcpnp_write_ctrl(struct fritz_bcs *bcs, int which)
outb(idx, adapter->io + AVM_INDEX);
if (which & 4)
outb(bcs->ctrl.sr.mode,
outb(bcs->ctrl.sr.mode,
adapter->io + AVM_DATA + HDLC_STATUS + 2);
if (which & 2)
outb(bcs->ctrl.sr.xml,
outb(bcs->ctrl.sr.xml,
adapter->io + AVM_DATA + HDLC_STATUS + 1);
if (which & 1)
outb(bcs->ctrl.sr.cmd,
@@ -416,7 +416,7 @@ static void hdlc_fill_fifo(struct fritz_bcs *bcs)
break;
case AVM_FRITZ_PCIV2:
fcpci2_write_ctrl(bcs, 3);
outsl(adapter->io +
outsl(adapter->io +
(bcs->channel ? AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1),
p, (count + 3) / 4);
break;
@@ -447,12 +447,12 @@ static inline void hdlc_empty_fifo(struct fritz_bcs *bcs, int count)
case AVM_FRITZ_PCI:
spin_lock(&adapter->hw_lock);
outl(idx, adapter->io + AVM_INDEX);
insl(adapter->io + AVM_DATA + HDLC_FIFO,
insl(adapter->io + AVM_DATA + HDLC_FIFO,
p, (count + 3) / 4);
spin_unlock(&adapter->hw_lock);
break;
case AVM_FRITZ_PCIV2:
insl(adapter->io +
insl(adapter->io +
(bcs->channel ? AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1),
p, (count + 3) / 4);
break;
@@ -489,7 +489,7 @@ static inline void hdlc_rpr_irq(struct fritz_bcs *bcs, u32 stat)
hdlc_empty_fifo(bcs, len);
if ((stat & HDLC_STAT_RME) || (bcs->mode == L1_MODE_TRANS)) {
if (((stat & HDLC_STAT_CRCVFRRAB)== HDLC_STAT_CRCVFR) ||
if (((stat & HDLC_STAT_CRCVFRRAB) == HDLC_STAT_CRCVFR) ||
(bcs->mode == L1_MODE_TRANS)) {
skb = dev_alloc_skb(bcs->rcvidx);
if (!skb) {
@@ -512,7 +512,7 @@ static inline void hdlc_rpr_irq(struct fritz_bcs *bcs, u32 stat)
static inline void hdlc_xdu_irq(struct fritz_bcs *bcs)
{
struct fritz_adapter *adapter = bcs->adapter;
/* Here we lost an TX interrupt, so
* restart transmitting the whole frame.
@@ -587,7 +587,7 @@ static inline void hdlc_irq(struct fritz_adapter *adapter)
static void modehdlc(struct fritz_bcs *bcs, int mode)
{
struct fritz_adapter *adapter = bcs->adapter;
DBG(0x40, "hdlc %c mode %d --> %d",
'A' + bcs->channel, bcs->mode, mode);
@@ -638,12 +638,12 @@ static void fritz_b_l2l1(struct hisax_if *ifc, int pr, void *arg)
break;
case PH_ACTIVATE | REQUEST:
mode = (long) arg;
DBG(4,"B%d,PH_ACTIVATE_REQUEST %d", bcs->channel + 1, mode);
DBG(4, "B%d,PH_ACTIVATE_REQUEST %d", bcs->channel + 1, mode);
modehdlc(bcs, mode);
B_L1L2(bcs, PH_ACTIVATE | INDICATION, NULL);
break;
case PH_DEACTIVATE | REQUEST:
DBG(4,"B%d,PH_DEACTIVATE_REQUEST", bcs->channel + 1);
DBG(4, "B%d,PH_DEACTIVATE_REQUEST", bcs->channel + 1);
modehdlc(bcs, L1_MODE_NULL);
B_L1L2(bcs, PH_DEACTIVATE | INDICATION, NULL);
break;
@@ -702,10 +702,10 @@ static inline void fcpci2_init(struct fritz_adapter *adapter)
static inline void fcpci_init(struct fritz_adapter *adapter)
{
outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER |
outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER |
AVM_STATUS0_ENA_IRQ, adapter->io + AVM_STATUS0);
outb(AVM_STATUS1_ENA_IOM | adapter->irq,
outb(AVM_STATUS1_ENA_IOM | adapter->irq,
adapter->io + AVM_STATUS1);
mdelay(10);
}
@@ -717,7 +717,7 @@ static int __devinit fcpcipnp_setup(struct fritz_adapter *adapter)
u32 val = 0;
int retval;
DBG(1,"");
DBG(1, "");
isac_init(&adapter->isac); // FIXME is this okay now
@@ -737,7 +737,7 @@ static int __devinit fcpcipnp_setup(struct fritz_adapter *adapter)
}
DBG(1, "stat %#x Class %X Rev %d",
val, val & 0xff, (val>>8) & 0xff);
val, val & 0xff, (val >> 8) & 0xff);
spin_lock_init(&adapter->hw_lock);
adapter->isac.priv = adapter;
@@ -819,15 +819,15 @@ static int __devinit fcpcipnp_setup(struct fritz_adapter *adapter)
return 0;
err_region:
err_region:
release_region(adapter->io, 32);
err:
err:
return retval;
}
static void __devexit fcpcipnp_release(struct fritz_adapter *adapter)
{
DBG(1,"");
DBG(1, "");
outb(0, adapter->io + AVM_STATUS0);
free_irq(adapter->irq, adapter);
@@ -836,7 +836,7 @@ static void __devexit fcpcipnp_release(struct fritz_adapter *adapter)
// ----------------------------------------------------------------------
static struct fritz_adapter * __devinit
static struct fritz_adapter * __devinit
new_adapter(void)
{
struct fritz_adapter *adapter;
@@ -850,7 +850,7 @@ new_adapter(void)
adapter->isac.hisax_d_if.owner = THIS_MODULE;
adapter->isac.hisax_d_if.ifc.priv = &adapter->isac;
adapter->isac.hisax_d_if.ifc.l2l1 = isac_d_l2l1;
for (i = 0; i < 2; i++) {
adapter->bcs[i].adapter = adapter;
adapter->bcs[i].channel = i;
@@ -862,7 +862,7 @@ new_adapter(void)
b_if[i] = &adapter->bcs[i].b_if;
if (hisax_register(&adapter->isac.hisax_d_if, b_if, "fcpcipnp",
protocol) != 0) {
protocol) != 0) {
kfree(adapter);
adapter = NULL;
}
@@ -889,7 +889,7 @@ static int __devinit fcpci_probe(struct pci_dev *pdev,
pci_set_drvdata(pdev, adapter);
if (pdev->device == PCI_DEVICE_ID_AVM_A1_V2)
if (pdev->device == PCI_DEVICE_ID_AVM_A1_V2)
adapter->type = AVM_FRITZ_PCIV2;
else
adapter->type = AVM_FRITZ_PCI;
@@ -909,10 +909,10 @@ static int __devinit fcpci_probe(struct pci_dev *pdev,
goto err_free;
return 0;
err_free:
err_free:
delete_adapter(adapter);
err:
err:
return retval;
}
@@ -923,7 +923,7 @@ static int __devinit fcpnp_probe(struct pnp_dev *pdev, const struct pnp_device_i
int retval;
if (!pdev)
return(-ENODEV);
return (-ENODEV);
retval = -ENOMEM;
adapter = new_adapter();
@@ -938,7 +938,7 @@ static int __devinit fcpnp_probe(struct pnp_dev *pdev, const struct pnp_device_i
retval = pnp_activate_dev(pdev);
if (retval < 0) {
printk(KERN_WARNING "%s: pnp_activate_dev(%s) ret(%d)\n", __func__,
(char *)dev_id->driver_data, retval);
(char *)dev_id->driver_data, retval);
goto err_free;
}
adapter->io = pnp_port_start(pdev, 0);
@@ -952,10 +952,10 @@ static int __devinit fcpnp_probe(struct pnp_dev *pdev, const struct pnp_device_i
goto err_free;
return 0;
err_free:
err_free:
delete_adapter(adapter);
err:
err:
return retval;
}

Visa fil

@@ -38,7 +38,7 @@ struct fritz_bcs {
int rcvidx;
int fifo_size;
u_char rcvbuf[HSCX_BUFMAX]; /* B-Channel receive Buffer */
int tx_cnt; /* B-Channel transmit counter */
struct sk_buff *tx_skb; /* B-Channel transmit Buffer */
};
@@ -55,4 +55,3 @@ struct fritz_adapter {
u32 (*read_hdlc_status) (struct fritz_adapter *adapter, int nr);
void (*write_ctrl) (struct fritz_bcs *bcs, int which);
};

Visa fil

@@ -1,10 +1,10 @@
/*
* Interface between low level (hardware) drivers and
* Interface between low level (hardware) drivers and
* HiSax protocol stack
*
* Author Kai Germaschewski
* Copyright 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*

Visa fil

@@ -1,11 +1,11 @@
/*
* Driver for ISAC-S and ISAC-SX
* Driver for ISAC-S and ISAC-SX
* ISDN Subscriber Access Controller for Terminals
*
* Author Kai Germaschewski
* Copyright 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
* 2001 by Karsten Keil <keil@isdn4linux.de>
*
*
* based upon Karsten Keil's original isac.c driver
*
* This software may be used and distributed according to the terms
@@ -36,10 +36,10 @@ static int debug = 1;
module_param(debug, int, 0);
static char *ISACVer[] = {
"2086/2186 V1.1",
"2085 B1",
"2085 B2",
"2085 V2.3"
"2086/2186 V1.1",
"2085 B1",
"2085 B2",
"2085 V2.3"
};
#endif
@@ -178,7 +178,7 @@ enum {
ST_L1_F8,
};
#define L1_STATE_COUNT (ST_L1_F8+1)
#define L1_STATE_COUNT (ST_L1_F8 + 1)
static char *strL1State[] =
{
@@ -382,7 +382,7 @@ static struct FsmNode L1FnList[] __initdata =
{ST_L1_F3_PDOWN, EV_PH_AI8, l1_go_f7_act_ind},
{ST_L1_F3_PDOWN, EV_PH_ACTIVATE_REQ, l1_ar8},
{ST_L1_F3_PDOWN, EV_TIMER3, l1_timer3},
{ST_L1_F3_PEND_DEACT, EV_PH_RES, l1_di},
{ST_L1_F3_PEND_DEACT, EV_PH_EI, l1_di},
{ST_L1_F3_PEND_DEACT, EV_PH_DC, l1_go_f3pdown},
@@ -432,7 +432,7 @@ static void l1m_debug(struct FsmInst *fi, char *fmt, ...)
{
va_list args;
char buf[256];
va_start(args, fmt);
vsnprintf(buf, sizeof(buf), fmt, args);
DBG(DBG_L1M, "%s", buf);
@@ -522,7 +522,7 @@ static inline void isac_cisq_interrupt(struct isac *isac)
}
if (val & ISAC_CIR0_CIC1) {
val = isac->read_isac(isac, ISAC_CIR1);
DBG(DBG_WARN, "ISAC CIR1 %#x", val );
DBG(DBG_WARN, "ISAC CIR1 %#x", val);
}
}
@@ -531,10 +531,10 @@ static inline void isac_rme_interrupt(struct isac *isac)
unsigned char val;
int count;
struct sk_buff *skb;
val = isac->read_isac(isac, ISAC_RSTA);
if ((val & (ISAC_RSTA_RDO | ISAC_RSTA_CRC | ISAC_RSTA_RAB) )
!= ISAC_RSTA_CRC) {
if ((val & (ISAC_RSTA_RDO | ISAC_RSTA_CRC | ISAC_RSTA_RAB))
!= ISAC_RSTA_CRC) {
DBG(DBG_WARN, "RSTA %#x, dropped", val);
isac->write_isac(isac, ISAC_CMDR, ISAC_CMDR_RMC);
goto out;
@@ -560,7 +560,7 @@ static inline void isac_rme_interrupt(struct isac *isac)
memcpy(skb_put(skb, count), isac->rcvbuf, count);
DBG_SKB(DBG_RPACKET, skb);
D_L1L2(isac, PH_DATA | INDICATION, skb);
out:
out:
isac->rcvidx = 0;
}
@@ -659,10 +659,10 @@ static inline void isacsx_rme_interrupt(struct isac *isac)
unsigned char val;
val = isac->read_isac(isac, ISACSX_RSTAD);
if ((val & (ISACSX_RSTAD_VFR |
ISACSX_RSTAD_RDO |
ISACSX_RSTAD_CRC |
ISACSX_RSTAD_RAB))
if ((val & (ISACSX_RSTAD_VFR |
ISACSX_RSTAD_RDO |
ISACSX_RSTAD_CRC |
ISACSX_RSTAD_RAB))
!= (ISACSX_RSTAD_VFR | ISACSX_RSTAD_CRC)) {
DBG(DBG_WARN, "RSTAD %#x, dropped", val);
isac->write_isac(isac, ISACSX_CMDRD, ISACSX_CMDRD_RMC);
@@ -690,7 +690,7 @@ static inline void isacsx_rme_interrupt(struct isac *isac)
memcpy(skb_put(skb, count), isac->rcvbuf, count);
DBG_SKB(DBG_RPACKET, skb);
D_L1L2(isac, PH_DATA | INDICATION, skb);
out:
out:
isac->rcvidx = 0;
}
@@ -778,8 +778,8 @@ void isac_setup(struct isac *isac)
ph_command(isac, ISAC_CMD_RES);
isac->write_isac(isac, ISAC_MASK, 0xff);
isac->mocr = 0xaa;
isac->write_isac(isac, ISAC_MASK, 0xff);
isac->mocr = 0xaa;
if (test_bit(ISAC_IOM1, &isac->flags)) {
/* IOM 1 Mode */
isac->write_isac(isac, ISAC_ADF2, 0x0);
@@ -832,7 +832,7 @@ void isacsx_setup(struct isac *isac)
// all HDLC IRQ unmasked
isac->write_isac(isac, ISACSX_MASKD, 0x03);
// unmask ICD, CID IRQs
isac->write_isac(isac, ISACSX_MASK,
isac->write_isac(isac, ISACSX_MASK,
~(ISACSX_ISTA_ICD | ISACSX_ISTA_CIC));
}

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -54,7 +54,7 @@ modehscx(struct BCState *bcs, int mode, int bc)
cs->BC_Write_Reg(cs, hscx, HSCX_XBCH, 0x0);
cs->BC_Write_Reg(cs, hscx, HSCX_RLCR, 0x0);
cs->BC_Write_Reg(cs, hscx, HSCX_CCR1,
test_bit(HW_IPAC, &cs->HW_Flags) ? 0x82 : 0x85);
test_bit(HW_IPAC, &cs->HW_Flags) ? 0x82 : 0x85);
cs->BC_Write_Reg(cs, hscx, HSCX_CCR2, 0x30);
cs->BC_Write_Reg(cs, hscx, HSCX_XCCR, 7);
cs->BC_Write_Reg(cs, hscx, HSCX_RCCR, 7);
@@ -65,27 +65,27 @@ modehscx(struct BCState *bcs, int mode, int bc)
if (bc == 0) {
cs->BC_Write_Reg(cs, hscx, HSCX_TSAX,
test_bit(HW_IOM1, &cs->HW_Flags) ? 0x7 : bcs->hw.hscx.tsaxr0);
test_bit(HW_IOM1, &cs->HW_Flags) ? 0x7 : bcs->hw.hscx.tsaxr0);
cs->BC_Write_Reg(cs, hscx, HSCX_TSAR,
test_bit(HW_IOM1, &cs->HW_Flags) ? 0x7 : bcs->hw.hscx.tsaxr0);
test_bit(HW_IOM1, &cs->HW_Flags) ? 0x7 : bcs->hw.hscx.tsaxr0);
} else {
cs->BC_Write_Reg(cs, hscx, HSCX_TSAX, bcs->hw.hscx.tsaxr1);
cs->BC_Write_Reg(cs, hscx, HSCX_TSAR, bcs->hw.hscx.tsaxr1);
}
switch (mode) {
case (L1_MODE_NULL):
cs->BC_Write_Reg(cs, hscx, HSCX_TSAX, 0x1f);
cs->BC_Write_Reg(cs, hscx, HSCX_TSAR, 0x1f);
cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0x84);
break;
case (L1_MODE_TRANS):
cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0xe4);
break;
case (L1_MODE_HDLC):
cs->BC_Write_Reg(cs, hscx, HSCX_CCR1,
test_bit(HW_IPAC, &cs->HW_Flags) ? 0x8a : 0x8d);
cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0x8c);
break;
case (L1_MODE_NULL):
cs->BC_Write_Reg(cs, hscx, HSCX_TSAX, 0x1f);
cs->BC_Write_Reg(cs, hscx, HSCX_TSAR, 0x1f);
cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0x84);
break;
case (L1_MODE_TRANS):
cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0xe4);
break;
case (L1_MODE_HDLC):
cs->BC_Write_Reg(cs, hscx, HSCX_CCR1,
test_bit(HW_IPAC, &cs->HW_Flags) ? 0x8a : 0x8d);
cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0x8c);
break;
}
if (mode)
cs->BC_Write_Reg(cs, hscx, HSCX_CMDR, 0x41);
@@ -100,55 +100,55 @@ hscx_l2l1(struct PStack *st, int pr, void *arg)
struct sk_buff *skb = arg;
switch (pr) {
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->hw.hscx.count = 0;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
printk(KERN_WARNING "hscx_l2l1: this shouldn't happen\n");
} else {
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->hw.hscx.count = 0;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
modehscx(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
modehscx(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->hw.hscx.count = 0;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
printk(KERN_WARNING "hscx_l2l1: this shouldn't happen\n");
} else {
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->hw.hscx.count = 0;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
modehscx(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
modehscx(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
}
}
@@ -177,13 +177,13 @@ open_hscxstate(struct IsdnCardState *cs, struct BCState *bcs)
if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
if (!(bcs->hw.hscx.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
printk(KERN_WARNING
"HiSax: No memory for hscx.rcvbuf\n");
"HiSax: No memory for hscx.rcvbuf\n");
test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
return (1);
}
if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) {
printk(KERN_WARNING
"HiSax: No memory for bcs->blog\n");
"HiSax: No memory for bcs->blog\n");
test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
kfree(bcs->hw.hscx.rcvbuf);
bcs->hw.hscx.rcvbuf = NULL;

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -84,7 +84,7 @@ hscx_fill_fifo(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
int more, count;
int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags)? 64: 32;
int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags) ? 64 : 32;
u_char *ptr;
if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
@@ -125,7 +125,7 @@ hscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
u_char r;
struct BCState *bcs = cs->bcs + hscx;
struct sk_buff *skb;
int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags)? 64: 32;
int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags) ? 64 : 32;
int count;
if (!test_bit(BC_FLG_INIT, &bcs->Flag))
@@ -159,7 +159,7 @@ hscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
WriteHSCXCMDR(cs, hscx, 0x80);
} else {
count = READHSCX(cs, hscx, HSCX_RBCL) & (
test_bit(HW_IPAC, &cs->HW_Flags)? 0x3f: 0x1f);
test_bit(HW_IPAC, &cs->HW_Flags) ? 0x3f : 0x1f);
if (count == 0)
count = fifo_size;
hscx_empty_fifo(bcs, count);
@@ -197,8 +197,8 @@ hscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
hscx_fill_fifo(bcs);
return;
} else {
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
u_long flags;
spin_lock_irqsave(&bcs->aclock, flags);
bcs->ackcnt += bcs->hw.hscx.count;
@@ -206,7 +206,7 @@ hscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
schedule_event(bcs, B_ACKPENDING);
}
dev_kfree_skb_irq(bcs->tx_skb);
bcs->hw.hscx.count = 0;
bcs->hw.hscx.count = 0;
bcs->tx_skb = NULL;
}
}
@@ -239,7 +239,7 @@ hscx_int_main(struct IsdnCardState *cs, u_char val)
bcs->err_tx++;
#endif
/* Here we lost an TX interrupt, so
* restart transmitting the whole frame.
* restart transmitting the whole frame.
*/
if (bcs->tx_skb) {
skb_push(bcs->tx_skb, bcs->hw.hscx.count);
@@ -266,7 +266,7 @@ hscx_int_main(struct IsdnCardState *cs, u_char val)
hscx_fill_fifo(bcs);
else {
/* Here we lost an TX interrupt, so
* restart transmitting the whole frame.
* restart transmitting the whole frame.
*/
#ifdef ERROR_STATISTIC
bcs->err_tx++;

Visa fil

@@ -4,7 +4,7 @@
*
* Author Matt Henderson & Guy Ellis
* Copyright by Traverse Technologies Pty Ltd, www.travers.com.au
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -50,30 +50,30 @@ static void
icc_new_ph(struct IsdnCardState *cs)
{
switch (cs->dc.icc.ph_state) {
case (ICC_IND_EI1):
ph_command(cs, ICC_CMD_DI);
l1_msg(cs, HW_RESET | INDICATION, NULL);
break;
case (ICC_IND_DC):
l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
break;
case (ICC_IND_DR):
l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
break;
case (ICC_IND_PU):
l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
break;
case (ICC_IND_FJ):
l1_msg(cs, HW_RSYNC | INDICATION, NULL);
break;
case (ICC_IND_AR):
l1_msg(cs, HW_INFO2 | INDICATION, NULL);
break;
case (ICC_IND_AI):
l1_msg(cs, HW_INFO4 | INDICATION, NULL);
break;
default:
break;
case (ICC_IND_EI1):
ph_command(cs, ICC_CMD_DI);
l1_msg(cs, HW_RESET | INDICATION, NULL);
break;
case (ICC_IND_DC):
l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
break;
case (ICC_IND_DR):
l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
break;
case (ICC_IND_PU):
l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
break;
case (ICC_IND_FJ):
l1_msg(cs, HW_RSYNC | INDICATION, NULL);
break;
case (ICC_IND_AR):
l1_msg(cs, HW_INFO2 | INDICATION, NULL);
break;
case (ICC_IND_AI):
l1_msg(cs, HW_INFO4 | INDICATION, NULL);
break;
default:
break;
}
}
@@ -83,7 +83,7 @@ icc_bh(struct work_struct *work)
struct IsdnCardState *cs =
container_of(work, struct IsdnCardState, tqueue);
struct PStack *stptr;
if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) {
if (cs->debug)
debugl1(cs, "D-Channel Busy cleared");
@@ -94,7 +94,7 @@ icc_bh(struct work_struct *work)
}
}
if (test_and_clear_bit(D_L1STATECHANGE, &cs->event))
icc_new_ph(cs);
icc_new_ph(cs);
if (test_and_clear_bit(D_RCVBUFREADY, &cs->event))
DChannel_proc_rcv(cs);
if (test_and_clear_bit(D_XMTBUFREADY, &cs->event))
@@ -254,11 +254,11 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
} else
schedule_event(cs, D_XMTBUFREADY);
}
afterXPR:
afterXPR:
if (val & 0x04) { /* CISQ */
exval = cs->readisac(cs, ICC_CIR0);
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ICC CIR0 %02X", exval );
debugl1(cs, "ICC CIR0 %02X", exval);
if (exval & 2) {
cs->dc.icc.ph_state = (exval >> 2) & 0xf;
if (cs->debug & L1_DEB_ISAC)
@@ -268,7 +268,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
if (exval & 1) {
exval = cs->readisac(cs, ICC_CIR1);
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ICC CIR1 %02X", exval );
debugl1(cs, "ICC CIR1 %02X", exval);
}
}
if (val & 0x02) { /* SIN */
@@ -331,13 +331,13 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
}
cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp++] = cs->readisac(cs, ICC_MOR0);
if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ICC MOR0 %02x", cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp -1]);
debugl1(cs, "ICC MOR0 %02x", cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp - 1]);
if (cs->dc.icc.mon_rxp == 1) {
cs->dc.icc.mocr |= 0x04;
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
}
}
afterMONR0:
afterMONR0:
if (v1 & 0x80) {
if (!cs->dc.icc.mon_rx) {
if (!(cs->dc.icc.mon_rx = kmalloc(MAX_MON_FRAME, GFP_ATOMIC))) {
@@ -361,11 +361,11 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
}
cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp++] = cs->readisac(cs, ICC_MOR1);
if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ICC MOR1 %02x", cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp -1]);
debugl1(cs, "ICC MOR1 %02x", cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp - 1]);
cs->dc.icc.mocr |= 0x40;
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
}
afterMONR1:
afterMONR1:
if (v1 & 0x04) {
cs->dc.icc.mocr &= 0xf0;
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
@@ -381,15 +381,15 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
schedule_event(cs, D_RX_MON1);
}
if (v1 & 0x02) {
if ((!cs->dc.icc.mon_tx) || (cs->dc.icc.mon_txc &&
(cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc) &&
!(v1 & 0x08))) {
if ((!cs->dc.icc.mon_tx) || (cs->dc.icc.mon_txc &&
(cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc) &&
!(v1 & 0x08))) {
cs->dc.icc.mocr &= 0xf0;
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
cs->dc.icc.mocr |= 0x0a;
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
if (cs->dc.icc.mon_txc &&
(cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc))
(cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc))
schedule_event(cs, D_TX_MON0);
goto AfterMOX0;
}
@@ -398,21 +398,21 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
goto AfterMOX0;
}
cs->writeisac(cs, ICC_MOX0,
cs->dc.icc.mon_tx[cs->dc.icc.mon_txp++]);
cs->dc.icc.mon_tx[cs->dc.icc.mon_txp++]);
if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ICC %02x -> MOX0", cs->dc.icc.mon_tx[cs->dc.icc.mon_txp -1]);
debugl1(cs, "ICC %02x -> MOX0", cs->dc.icc.mon_tx[cs->dc.icc.mon_txp - 1]);
}
AfterMOX0:
AfterMOX0:
if (v1 & 0x20) {
if ((!cs->dc.icc.mon_tx) || (cs->dc.icc.mon_txc &&
(cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc) &&
!(v1 & 0x80))) {
if ((!cs->dc.icc.mon_tx) || (cs->dc.icc.mon_txc &&
(cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc) &&
!(v1 & 0x80))) {
cs->dc.icc.mocr &= 0x0f;
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
cs->dc.icc.mocr |= 0xa0;
cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
if (cs->dc.icc.mon_txc &&
(cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc))
(cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc))
schedule_event(cs, D_TX_MON1);
goto AfterMOX1;
}
@@ -421,11 +421,11 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
goto AfterMOX1;
}
cs->writeisac(cs, ICC_MOX1,
cs->dc.icc.mon_tx[cs->dc.icc.mon_txp++]);
cs->dc.icc.mon_tx[cs->dc.icc.mon_txp++]);
if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ICC %02x -> MOX1", cs->dc.icc.mon_tx[cs->dc.icc.mon_txp -1]);
debugl1(cs, "ICC %02x -> MOX1", cs->dc.icc.mon_tx[cs->dc.icc.mon_txp - 1]);
}
AfterMOX1:
AfterMOX1:
#endif
}
}
@@ -440,128 +440,128 @@ ICC_l1hw(struct PStack *st, int pr, void *arg)
int val;
switch (pr) {
case (PH_DATA |REQUEST):
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
skb_queue_tail(&cs->sq, skb);
case (PH_DATA | REQUEST):
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
skb_queue_tail(&cs->sq, skb);
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA Queued", 0);
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA Queued", 0);
#endif
} else {
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA", 0);
#endif
icc_fill_fifo(cs);
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL |INDICATION):
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
spin_unlock_irqrestore(&cs->lock, flags);
break;
}
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
} else {
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
Logl2Frame(cs, skb, "PH_DATA", 0);
#endif
icc_fill_fifo(cs);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | REQUEST):
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
debugl1(cs, "-> PH_REQUEST_PULL");
#endif
if (!cs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (HW_RESET | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
if ((cs->dc.icc.ph_state == ICC_IND_EI1) ||
(cs->dc.icc.ph_state == ICC_IND_DR))
ph_command(cs, ICC_CMD_DI);
else
ph_command(cs, ICC_CMD_RES);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_ENABLE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
ph_command(cs, ICC_CMD_DI);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_INFO1 | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
ph_command(cs, ICC_CMD_AR);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_INFO3 | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
ph_command(cs, ICC_CMD_AI);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_TESTLOOP | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
val = 0;
if (1 & (long) arg)
val |= 0x0c;
if (2 & (long) arg)
val |= 0x3;
if (test_bit(HW_IOM1, &cs->HW_Flags)) {
/* IOM 1 Mode */
if (!val) {
cs->writeisac(cs, ICC_SPCR, 0xa);
cs->writeisac(cs, ICC_ADF1, 0x2);
} else {
cs->writeisac(cs, ICC_SPCR, val);
cs->writeisac(cs, ICC_ADF1, 0xa);
}
} else {
/* IOM 2 Mode */
cs->writeisac(cs, ICC_SPCR, val);
if (val)
cs->writeisac(cs, ICC_ADF1, 0x8);
else
cs->writeisac(cs, ICC_ADF1, 0x0);
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_DEACTIVATE | RESPONSE):
skb_queue_purge(&cs->rq);
skb_queue_purge(&cs->sq);
if (cs->tx_skb) {
dev_kfree_skb_any(cs->tx_skb);
cs->tx_skb = NULL;
}
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
schedule_event(cs, D_CLEARBUSY);
break;
default:
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "icc_l1hw unknown %04x", pr);
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
spin_unlock_irqrestore(&cs->lock, flags);
break;
}
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
#endif
icc_fill_fifo(cs);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | REQUEST):
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
debugl1(cs, "-> PH_REQUEST_PULL");
#endif
if (!cs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (HW_RESET | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
if ((cs->dc.icc.ph_state == ICC_IND_EI1) ||
(cs->dc.icc.ph_state == ICC_IND_DR))
ph_command(cs, ICC_CMD_DI);
else
ph_command(cs, ICC_CMD_RES);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_ENABLE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
ph_command(cs, ICC_CMD_DI);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_INFO1 | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
ph_command(cs, ICC_CMD_AR);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_INFO3 | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
ph_command(cs, ICC_CMD_AI);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_TESTLOOP | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
val = 0;
if (1 & (long) arg)
val |= 0x0c;
if (2 & (long) arg)
val |= 0x3;
if (test_bit(HW_IOM1, &cs->HW_Flags)) {
/* IOM 1 Mode */
if (!val) {
cs->writeisac(cs, ICC_SPCR, 0xa);
cs->writeisac(cs, ICC_ADF1, 0x2);
} else {
cs->writeisac(cs, ICC_SPCR, val);
cs->writeisac(cs, ICC_ADF1, 0xa);
}
} else {
/* IOM 2 Mode */
cs->writeisac(cs, ICC_SPCR, val);
if (val)
cs->writeisac(cs, ICC_ADF1, 0x8);
else
cs->writeisac(cs, ICC_ADF1, 0x0);
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_DEACTIVATE | RESPONSE):
skb_queue_purge(&cs->rq);
skb_queue_purge(&cs->sq);
if (cs->tx_skb) {
dev_kfree_skb_any(cs->tx_skb);
cs->tx_skb = NULL;
}
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
schedule_event(cs, D_CLEARBUSY);
break;
default:
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "icc_l1hw unknown %04x", pr);
break;
}
}
@@ -588,7 +588,7 @@ dbusy_timer_handler(struct IsdnCardState *cs)
if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
rbch = cs->readisac(cs, ICC_RBCH);
star = cs->readisac(cs, ICC_STAR);
if (cs->debug)
if (cs->debug)
debugl1(cs, "D-Channel Busy RBCH %02x STAR %02x",
rbch, star);
if (rbch & ICC_RBCH_XAC) { /* D-Channel Busy */
@@ -622,8 +622,8 @@ initicc(struct IsdnCardState *cs)
cs->DC_Close = DC_Close_icc;
cs->dc.icc.mon_tx = NULL;
cs->dc.icc.mon_rx = NULL;
cs->writeisac(cs, ICC_MASK, 0xff);
cs->dc.icc.mocr = 0xaa;
cs->writeisac(cs, ICC_MASK, 0xff);
cs->dc.icc.mocr = 0xaa;
if (test_bit(HW_IOM1, &cs->HW_Flags)) {
/* IOM 1 Mode */
cs->writeisac(cs, ICC_ADF2, 0x0);

Visa fil

@@ -4,12 +4,12 @@
*
* Author Matt Henderson & Guy Ellis
* Copyright by Traverse Technologies Pty Ltd, www.travers.com.au
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
* 1999.7.14 Initial implementation of routines for Siemens ISDN
* Communication Controller PEB 2070 based on the ISAC routines
* 1999.7.14 Initial implementation of routines for Siemens ISDN
* Communication Controller PEB 2070 based on the ISAC routines
* written by Karsten Keil.
*/

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*

Visa fil

@@ -1,10 +1,10 @@
/*
/*
*
* IPACX specific routines
*
* Author Joerg Petersohn
* Derived from hisax_isac.c, isac.c, hscx.c and others
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -24,7 +24,7 @@
#define D_FIFO_SIZE 32
// ipacx interrupt mask values
// ipacx interrupt mask values
#define _MASK_IMASK 0x2E // global mask
#define _MASKB_IMASK 0x0B
#define _MASKD_IMASK 0x03 // all on
@@ -55,33 +55,33 @@ static void clear_pending_ints(struct IsdnCardState *cs);
//----------------------------------------------------------
// Issue Layer 1 command to chip
//----------------------------------------------------------
static void
static void
ph_command(struct IsdnCardState *cs, unsigned int command)
{
if (cs->debug &L1_DEB_ISAC)
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ph_command (%#x) in (%#x)", command,
cs->dc.isac.ph_state);
//###################################
//###################################
// printk(KERN_INFO "ph_command (%#x)\n", command);
//###################################
//###################################
cs->writeisac(cs, IPACX_CIX0, (command << 4) | 0x0E);
}
//----------------------------------------------------------
// Transceiver interrupt handler
//----------------------------------------------------------
static inline void
static inline void
cic_int(struct IsdnCardState *cs)
{
u_char event;
event = cs->readisac(cs, IPACX_CIR0) >> 4;
if (cs->debug &L1_DEB_ISAC) debugl1(cs, "cic_int(event=%#x)", event);
//#########################################
if (cs->debug & L1_DEB_ISAC) debugl1(cs, "cic_int(event=%#x)", event);
//#########################################
// printk(KERN_INFO "cic_int(%x)\n", event);
//#########################################
cs->dc.isac.ph_state = event;
schedule_event(cs, D_L1STATECHANGE);
//#########################################
cs->dc.isac.ph_state = event;
schedule_event(cs, D_L1STATECHANGE);
}
//==========================================================
@@ -99,99 +99,99 @@ dch_l2l1(struct PStack *st, int pr, void *arg)
u_char cda1_cr;
switch (pr) {
case (PH_DATA |REQUEST):
if (cs->debug &DEB_DLOG_HEX) LogFrame(cs, skb->data, skb->len);
if (cs->debug &DEB_DLOG_VERBOSE) dlogframe(cs, skb, 0);
if (cs->tx_skb) {
skb_queue_tail(&cs->sq, skb);
case (PH_DATA | REQUEST):
if (cs->debug & DEB_DLOG_HEX) LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE) dlogframe(cs, skb, 0);
if (cs->tx_skb) {
skb_queue_tail(&cs->sq, skb);
#ifdef L2FRAME_DEBUG
if (cs->debug &L1_DEB_LAPD) Logl2Frame(cs, skb, "PH_DATA Queued", 0);
if (cs->debug & L1_DEB_LAPD) Logl2Frame(cs, skb, "PH_DATA Queued", 0);
#endif
} else {
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG
if (cs->debug &L1_DEB_LAPD) Logl2Frame(cs, skb, "PH_DATA", 0);
#endif
dch_fill_fifo(cs);
}
break;
case (PH_PULL |INDICATION):
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
break;
}
if (cs->debug & DEB_DLOG_HEX) LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE) dlogframe(cs, skb, 0);
} else {
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG
if (cs->debug & L1_DEB_LAPD) Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
if (cs->debug & L1_DEB_LAPD) Logl2Frame(cs, skb, "PH_DATA", 0);
#endif
dch_fill_fifo(cs);
}
break;
case (PH_PULL | INDICATION):
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
break;
case (PH_PULL | REQUEST):
}
if (cs->debug & DEB_DLOG_HEX) LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE) dlogframe(cs, skb, 0);
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG
if (cs->debug & L1_DEB_LAPD) debugl1(cs, "-> PH_REQUEST_PULL");
if (cs->debug & L1_DEB_LAPD) Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
#endif
if (!cs->tx_skb) {
clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
dch_fill_fifo(cs);
break;
case (HW_RESET | REQUEST):
case (HW_ENABLE | REQUEST):
if ((cs->dc.isac.ph_state == IPACX_IND_RES) ||
(cs->dc.isac.ph_state == IPACX_IND_DR) ||
(cs->dc.isac.ph_state == IPACX_IND_DC))
ph_command(cs, IPACX_CMD_TIM);
else
ph_command(cs, IPACX_CMD_RES);
break;
case (PH_PULL | REQUEST):
#ifdef L2FRAME_DEBUG
if (cs->debug & L1_DEB_LAPD) debugl1(cs, "-> PH_REQUEST_PULL");
#endif
if (!cs->tx_skb) {
clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (HW_INFO3 | REQUEST):
ph_command(cs, IPACX_CMD_AR8);
break;
case (HW_RESET | REQUEST):
case (HW_ENABLE | REQUEST):
if ((cs->dc.isac.ph_state == IPACX_IND_RES) ||
(cs->dc.isac.ph_state == IPACX_IND_DR) ||
(cs->dc.isac.ph_state == IPACX_IND_DC))
ph_command(cs, IPACX_CMD_TIM);
else
ph_command(cs, IPACX_CMD_RES);
break;
case (HW_TESTLOOP | REQUEST):
cs->writeisac(cs, IPACX_CDA_TSDP10, 0x80); // Timeslot 0 is B1
cs->writeisac(cs, IPACX_CDA_TSDP11, 0x81); // Timeslot 0 is B1
cda1_cr = cs->readisac(cs, IPACX_CDA1_CR);
(void) cs->readisac(cs, IPACX_CDA2_CR);
if ((long)arg &1) { // loop B1
cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr |0x0a);
}
else { // B1 off
cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr &~0x0a);
}
if ((long)arg &2) { // loop B2
cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr |0x14);
}
else { // B2 off
cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr &~0x14);
}
break;
case (HW_INFO3 | REQUEST):
ph_command(cs, IPACX_CMD_AR8);
break;
case (HW_DEACTIVATE | RESPONSE):
skb_queue_purge(&cs->rq);
skb_queue_purge(&cs->sq);
if (cs->tx_skb) {
dev_kfree_skb_any(cs->tx_skb);
cs->tx_skb = NULL;
}
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer);
break;
case (HW_TESTLOOP | REQUEST):
cs->writeisac(cs, IPACX_CDA_TSDP10, 0x80); // Timeslot 0 is B1
cs->writeisac(cs, IPACX_CDA_TSDP11, 0x81); // Timeslot 0 is B1
cda1_cr = cs->readisac(cs, IPACX_CDA1_CR);
(void) cs->readisac(cs, IPACX_CDA2_CR);
if ((long)arg & 1) { // loop B1
cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr | 0x0a);
}
else { // B1 off
cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr & ~0x0a);
}
if ((long)arg & 2) { // loop B2
cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr | 0x14);
}
else { // B2 off
cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr & ~0x14);
}
break;
default:
if (cs->debug &L1_DEB_WARN) debugl1(cs, "dch_l2l1 unknown %04x", pr);
break;
case (HW_DEACTIVATE | RESPONSE):
skb_queue_purge(&cs->rq);
skb_queue_purge(&cs->sq);
if (cs->tx_skb) {
dev_kfree_skb_any(cs->tx_skb);
cs->tx_skb = NULL;
}
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer);
break;
default:
if (cs->debug & L1_DEB_WARN) debugl1(cs, "dch_l2l1 unknown %04x", pr);
break;
}
}
@@ -206,11 +206,11 @@ dbusy_timer_handler(struct IsdnCardState *cs)
if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
rbchd = cs->readisac(cs, IPACX_RBCHD);
stard = cs->readisac(cs, IPACX_STARD);
if (cs->debug)
debugl1(cs, "D-Channel Busy RBCHD %02x STARD %02x", rbchd, stard);
if (!(stard &0x40)) { // D-Channel Busy
if (cs->debug)
debugl1(cs, "D-Channel Busy RBCHD %02x STARD %02x", rbchd, stard);
if (!(stard & 0x40)) { // D-Channel Busy
set_bit(FLG_L1_DBUSY, &cs->HW_Flags);
for (st = cs->stlist; st; st = st->next) {
for (st = cs->stlist; st; st = st->next) {
st->l1.l1l2(st, PH_PAUSE | INDICATION, NULL); // flow control on
}
} else {
@@ -232,30 +232,30 @@ dbusy_timer_handler(struct IsdnCardState *cs)
//----------------------------------------------------------
// Fill buffer from receive FIFO
//----------------------------------------------------------
static void
static void
dch_empty_fifo(struct IsdnCardState *cs, int count)
{
u_char *ptr;
if ((cs->debug &L1_DEB_ISAC) && !(cs->debug &L1_DEB_ISAC_FIFO))
if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
debugl1(cs, "dch_empty_fifo()");
// message too large, remove
// message too large, remove
if ((cs->rcvidx + count) >= MAX_DFRAME_LEN_L1) {
if (cs->debug &L1_DEB_WARN)
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "dch_empty_fifo() incoming message too large");
cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC
cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC
cs->rcvidx = 0;
return;
}
ptr = cs->rcvbuf + cs->rcvidx;
cs->rcvidx += count;
cs->readisacfifo(cs, ptr, count);
cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC
if (cs->debug &L1_DEB_ISAC_FIFO) {
if (cs->debug & L1_DEB_ISAC_FIFO) {
char *t = cs->dlog;
t += sprintf(t, "dch_empty_fifo() cnt %d", count);
@@ -267,15 +267,15 @@ dch_empty_fifo(struct IsdnCardState *cs, int count)
//----------------------------------------------------------
// Fill transmit FIFO
//----------------------------------------------------------
static void
static void
dch_fill_fifo(struct IsdnCardState *cs)
{
int count;
u_char cmd, *ptr;
if ((cs->debug &L1_DEB_ISAC) && !(cs->debug &L1_DEB_ISAC_FIFO))
if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
debugl1(cs, "dch_fill_fifo()");
if (!cs->tx_skb) return;
count = cs->tx_skb->len;
if (count <= 0) return;
@@ -286,14 +286,14 @@ dch_fill_fifo(struct IsdnCardState *cs)
} else {
cmd = 0x0A; // XTF | XME
}
ptr = cs->tx_skb->data;
skb_pull(cs->tx_skb, count);
cs->tx_cnt += count;
cs->writeisacfifo(cs, ptr, count);
cs->writeisac(cs, IPACX_CMDRD, cmd);
// set timeout for transmission contol
// set timeout for transmission contol
if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
debugl1(cs, "dch_fill_fifo dbusytimer running");
del_timer(&cs->dbusytimer);
@@ -301,8 +301,8 @@ dch_fill_fifo(struct IsdnCardState *cs)
init_timer(&cs->dbusytimer);
cs->dbusytimer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ)/1000);
add_timer(&cs->dbusytimer);
if (cs->debug &L1_DEB_ISAC_FIFO) {
if (cs->debug & L1_DEB_ISAC_FIFO) {
char *t = cs->dlog;
t += sprintf(t, "dch_fill_fifo() cnt %d", count);
@@ -314,7 +314,7 @@ dch_fill_fifo(struct IsdnCardState *cs)
//----------------------------------------------------------
// D channel interrupt handler
//----------------------------------------------------------
static inline void
static inline void
dch_int(struct IsdnCardState *cs)
{
struct sk_buff *skb;
@@ -322,31 +322,31 @@ dch_int(struct IsdnCardState *cs)
int count;
istad = cs->readisac(cs, IPACX_ISTAD);
//##############################################
//##############################################
// printk(KERN_WARNING "dch_int(istad=%02x)\n", istad);
//##############################################
if (istad &0x80) { // RME
rstad = cs->readisac(cs, IPACX_RSTAD);
if ((rstad &0xf0) != 0xa0) { // !(VFR && !RDO && CRC && !RAB)
if (!(rstad &0x80))
if (cs->debug &L1_DEB_WARN)
debugl1(cs, "dch_int(): invalid frame");
if ((rstad &0x40))
if (cs->debug &L1_DEB_WARN)
debugl1(cs, "dch_int(): RDO");
if (!(rstad &0x20))
if (cs->debug &L1_DEB_WARN)
debugl1(cs, "dch_int(): CRC error");
cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC
//##############################################
if (istad & 0x80) { // RME
rstad = cs->readisac(cs, IPACX_RSTAD);
if ((rstad & 0xf0) != 0xa0) { // !(VFR && !RDO && CRC && !RAB)
if (!(rstad & 0x80))
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "dch_int(): invalid frame");
if ((rstad & 0x40))
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "dch_int(): RDO");
if (!(rstad & 0x20))
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "dch_int(): CRC error");
cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC
} else { // received frame ok
count = cs->readisac(cs, IPACX_RBCLD);
if (count) count--; // RSTAB is last byte
count &= D_FIFO_SIZE-1;
if (count) count--; // RSTAB is last byte
count &= D_FIFO_SIZE - 1;
if (count == 0) count = D_FIFO_SIZE;
dch_empty_fifo(cs, count);
if ((count = cs->rcvidx) > 0) {
cs->rcvidx = 0;
cs->rcvidx = 0;
if (!(skb = dev_alloc_skb(count)))
printk(KERN_WARNING "HiSax dch_int(): receive out of memory\n");
else {
@@ -354,57 +354,57 @@ dch_int(struct IsdnCardState *cs)
skb_queue_tail(&cs->rq, skb);
}
}
}
cs->rcvidx = 0;
}
cs->rcvidx = 0;
schedule_event(cs, D_RCVBUFREADY);
}
if (istad &0x40) { // RPF
if (istad & 0x40) { // RPF
dch_empty_fifo(cs, D_FIFO_SIZE);
}
if (istad &0x20) { // RFO
if (cs->debug &L1_DEB_WARN) debugl1(cs, "dch_int(): RFO");
cs->writeisac(cs, IPACX_CMDRD, 0x40); //RRES
if (istad & 0x20) { // RFO
if (cs->debug & L1_DEB_WARN) debugl1(cs, "dch_int(): RFO");
cs->writeisac(cs, IPACX_CMDRD, 0x40); //RRES
}
if (istad &0x10) { // XPR
if (istad & 0x10) { // XPR
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
schedule_event(cs, D_CLEARBUSY);
if (cs->tx_skb) {
if (cs->tx_skb->len) {
dch_fill_fifo(cs);
goto afterXPR;
}
else {
dev_kfree_skb_irq(cs->tx_skb);
cs->tx_skb = NULL;
cs->tx_cnt = 0;
}
}
if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
cs->tx_cnt = 0;
dch_fill_fifo(cs);
}
else {
schedule_event(cs, D_XMTBUFREADY);
}
}
afterXPR:
if (cs->tx_skb) {
if (cs->tx_skb->len) {
dch_fill_fifo(cs);
goto afterXPR;
}
else {
dev_kfree_skb_irq(cs->tx_skb);
cs->tx_skb = NULL;
cs->tx_cnt = 0;
}
}
if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
cs->tx_cnt = 0;
dch_fill_fifo(cs);
}
else {
schedule_event(cs, D_XMTBUFREADY);
}
}
afterXPR:
if (istad &0x0C) { // XDU or XMR
if (cs->debug &L1_DEB_WARN) debugl1(cs, "dch_int(): XDU");
if (cs->tx_skb) {
skb_push(cs->tx_skb, cs->tx_cnt); // retransmit
cs->tx_cnt = 0;
if (istad & 0x0C) { // XDU or XMR
if (cs->debug & L1_DEB_WARN) debugl1(cs, "dch_int(): XDU");
if (cs->tx_skb) {
skb_push(cs->tx_skb, cs->tx_cnt); // retransmit
cs->tx_cnt = 0;
dch_fill_fifo(cs);
} else {
printk(KERN_WARNING "HiSax: ISAC XDU no skb\n");
debugl1(cs, "ISAC XDU no skb");
}
}
}
}
//----------------------------------------------------------
@@ -423,15 +423,15 @@ dch_init(struct IsdnCardState *cs)
printk(KERN_INFO "HiSax: IPACX ISDN driver v0.1.0\n");
cs->setstack_d = dch_setstack;
cs->dbusytimer.function = (void *) dbusy_timer_handler;
cs->dbusytimer.data = (long) cs;
init_timer(&cs->dbusytimer);
cs->writeisac(cs, IPACX_TR_CONF0, 0x00); // clear LDD
cs->writeisac(cs, IPACX_TR_CONF2, 0x00); // enable transmitter
cs->writeisac(cs, IPACX_MODED, 0xC9); // transparent mode 0, RAC, stop/go
cs->writeisac(cs, IPACX_MON_CR, 0x00); // disable monitor channel
cs->writeisac(cs, IPACX_TR_CONF0, 0x00); // clear LDD
cs->writeisac(cs, IPACX_TR_CONF2, 0x00); // enable transmitter
cs->writeisac(cs, IPACX_MODED, 0xC9); // transparent mode 0, RAC, stop/go
cs->writeisac(cs, IPACX_MON_CR, 0x00); // disable monitor channel
}
@@ -450,55 +450,55 @@ bch_l2l1(struct PStack *st, int pr, void *arg)
u_long flags;
switch (pr) {
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->hw.hscx.count = 0;
bch_fill_fifo(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
printk(KERN_WARNING "HiSax bch_l2l1(): this shouldn't happen\n");
} else {
set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->hw.hscx.count = 0;
bch_fill_fifo(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
set_bit(BC_FLG_ACTIV, &bcs->Flag);
bch_mode(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
clear_bit(BC_FLG_ACTIV, &bcs->Flag);
clear_bit(BC_FLG_BUSY, &bcs->Flag);
bch_mode(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->hw.hscx.count = 0;
bch_fill_fifo(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
printk(KERN_WARNING "HiSax bch_l2l1(): this shouldn't happen\n");
} else {
set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->hw.hscx.count = 0;
bch_fill_fifo(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
set_bit(BC_FLG_ACTIV, &bcs->Flag);
bch_mode(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
clear_bit(BC_FLG_ACTIV, &bcs->Flag);
clear_bit(BC_FLG_BUSY, &bcs->Flag);
bch_mode(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
}
}
@@ -513,28 +513,28 @@ bch_empty_fifo(struct BCState *bcs, int count)
int cnt;
cs = bcs->cs;
hscx = bcs->hw.hscx.hscx;
if ((cs->debug &L1_DEB_HSCX) && !(cs->debug &L1_DEB_HSCX_FIFO))
hscx = bcs->hw.hscx.hscx;
if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
debugl1(cs, "bch_empty_fifo()");
// message too large, remove
// message too large, remove
if (bcs->hw.hscx.rcvidx + count > HSCX_BUFMAX) {
if (cs->debug &L1_DEB_WARN)
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "bch_empty_fifo() incoming packet too large");
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x80); // RMC
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x80); // RMC
bcs->hw.hscx.rcvidx = 0;
return;
}
ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx;
cnt = count;
while (cnt--) *ptr++ = cs->BC_Read_Reg(cs, hscx, IPACX_RFIFOB);
while (cnt--) *ptr++ = cs->BC_Read_Reg(cs, hscx, IPACX_RFIFOB);
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x80); // RMC
ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx;
bcs->hw.hscx.rcvidx += count;
if (cs->debug &L1_DEB_HSCX_FIFO) {
if (cs->debug & L1_DEB_HSCX_FIFO) {
char *t = bcs->blog;
t += sprintf(t, "bch_empty_fifo() B-%d cnt %d", hscx, count);
@@ -554,7 +554,7 @@ bch_fill_fifo(struct BCState *bcs)
u_char *ptr, *p, hscx;
cs = bcs->cs;
if ((cs->debug &L1_DEB_HSCX) && !(cs->debug &L1_DEB_HSCX_FIFO))
if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
debugl1(cs, "bch_fill_fifo()");
if (!bcs->tx_skb) return;
@@ -567,17 +567,17 @@ bch_fill_fifo(struct BCState *bcs)
count = B_FIFO_SIZE;
} else {
count = bcs->tx_skb->len;
}
}
cnt = count;
p = ptr = bcs->tx_skb->data;
skb_pull(bcs->tx_skb, count);
bcs->tx_cnt -= count;
bcs->hw.hscx.count += count;
while (cnt--) cs->BC_Write_Reg(cs, hscx, IPACX_XFIFOB, *p++);
while (cnt--) cs->BC_Write_Reg(cs, hscx, IPACX_XFIFOB, *p++);
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, (more ? 0x08 : 0x0a));
if (cs->debug &L1_DEB_HSCX_FIFO) {
if (cs->debug & L1_DEB_HSCX_FIFO) {
char *t = bcs->blog;
t += sprintf(t, "chb_fill_fifo() B-%d cnt %d", hscx, count);
@@ -600,31 +600,31 @@ bch_int(struct IsdnCardState *cs, u_char hscx)
bcs = cs->bcs + hscx;
istab = cs->BC_Read_Reg(cs, hscx, IPACX_ISTAB);
//##############################################
//##############################################
// printk(KERN_WARNING "bch_int(istab=%02x)\n", istab);
//##############################################
//##############################################
if (!test_bit(BC_FLG_INIT, &bcs->Flag)) return;
if (istab &0x80) { // RME
if (istab & 0x80) { // RME
rstab = cs->BC_Read_Reg(cs, hscx, IPACX_RSTAB);
if ((rstab &0xf0) != 0xa0) { // !(VFR && !RDO && CRC && !RAB)
if (!(rstab &0x80))
if (cs->debug &L1_DEB_WARN)
debugl1(cs, "bch_int() B-%d: invalid frame", hscx);
if ((rstab &0x40) && (bcs->mode != L1_MODE_NULL))
if (cs->debug &L1_DEB_WARN)
debugl1(cs, "bch_int() B-%d: RDO mode=%d", hscx, bcs->mode);
if (!(rstab &0x20))
if (cs->debug &L1_DEB_WARN)
debugl1(cs, "bch_int() B-%d: CRC error", hscx);
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x80); // RMC
}
else { // received frame ok
count = cs->BC_Read_Reg(cs, hscx, IPACX_RBCLB) &(B_FIFO_SIZE-1);
if ((rstab & 0xf0) != 0xa0) { // !(VFR && !RDO && CRC && !RAB)
if (!(rstab & 0x80))
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "bch_int() B-%d: invalid frame", hscx);
if ((rstab & 0x40) && (bcs->mode != L1_MODE_NULL))
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "bch_int() B-%d: RDO mode=%d", hscx, bcs->mode);
if (!(rstab & 0x20))
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "bch_int() B-%d: CRC error", hscx);
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x80); // RMC
}
else { // received frame ok
count = cs->BC_Read_Reg(cs, hscx, IPACX_RBCLB) & (B_FIFO_SIZE - 1);
if (count == 0) count = B_FIFO_SIZE;
bch_empty_fifo(bcs, count);
if ((count = bcs->hw.hscx.rcvidx - 1) > 0) {
if (cs->debug &L1_DEB_HSCX_FIFO)
if (cs->debug & L1_DEB_HSCX_FIFO)
debugl1(cs, "bch_int Frame %d", count);
if (!(skb = dev_alloc_skb(count)))
printk(KERN_WARNING "HiSax bch_int(): receive frame out of memory\n");
@@ -637,8 +637,8 @@ bch_int(struct IsdnCardState *cs, u_char hscx)
bcs->hw.hscx.rcvidx = 0;
schedule_event(bcs, B_RCVBUFREADY);
}
if (istab &0x40) { // RPF
if (istab & 0x40) { // RPF
bch_empty_fifo(bcs, B_FIFO_SIZE);
if (bcs->mode == L1_MODE_TRANS) { // queue every chunk
@@ -653,21 +653,21 @@ bch_int(struct IsdnCardState *cs, u_char hscx)
schedule_event(bcs, B_RCVBUFREADY);
}
}
if (istab &0x20) { // RFO
if (cs->debug &L1_DEB_WARN)
if (istab & 0x20) { // RFO
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "bch_int() B-%d: RFO error", hscx);
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x40); // RRES
}
if (istab &0x10) { // XPR
if (istab & 0x10) { // XPR
if (bcs->tx_skb) {
if (bcs->tx_skb->len) {
bch_fill_fifo(bcs);
goto afterXPR;
} else {
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
u_long flags;
spin_lock_irqsave(&bcs->aclock, flags);
bcs->ackcnt += bcs->hw.hscx.count;
@@ -678,7 +678,7 @@ bch_int(struct IsdnCardState *cs, u_char hscx)
dev_kfree_skb_irq(bcs->tx_skb);
bcs->hw.hscx.count = 0;
bcs->tx_skb = NULL;
}
}
if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
bcs->hw.hscx.count = 0;
set_bit(BC_FLG_BUSY, &bcs->Flag);
@@ -688,22 +688,22 @@ bch_int(struct IsdnCardState *cs, u_char hscx)
schedule_event(bcs, B_XMTBUFREADY);
}
}
afterXPR:
afterXPR:
if (istab &0x04) { // XDU
if (bcs->mode == L1_MODE_TRANS) {
if (istab & 0x04) { // XDU
if (bcs->mode == L1_MODE_TRANS) {
bch_fill_fifo(bcs);
}
else {
if (bcs->tx_skb) { // restart transmitting the whole frame
skb_push(bcs->tx_skb, bcs->hw.hscx.count);
bcs->tx_cnt += bcs->hw.hscx.count;
bcs->hw.hscx.count = 0;
}
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x01); // XRES
if (cs->debug &L1_DEB_WARN)
debugl1(cs, "bch_int() B-%d XDU error", hscx);
}
}
else {
if (bcs->tx_skb) { // restart transmitting the whole frame
skb_push(bcs->tx_skb, bcs->hw.hscx.count);
bcs->tx_cnt += bcs->hw.hscx.count;
bcs->hw.hscx.count = 0;
}
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x01); // XRES
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "bch_int() B-%d XDU error", hscx);
}
}
}
@@ -715,43 +715,43 @@ bch_mode(struct BCState *bcs, int mode, int bc)
struct IsdnCardState *cs = bcs->cs;
int hscx = bcs->hw.hscx.hscx;
bc = bc ? 1 : 0; // in case bc is greater than 1
bc = bc ? 1 : 0; // in case bc is greater than 1
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "mode_bch() switch B-%d mode %d chan %d", hscx, mode, bc);
bcs->mode = mode;
bcs->channel = bc;
// map controller to according timeslot
if (!hscx)
{
cs->writeisac(cs, IPACX_BCHA_TSDP_BC1, 0x80 | bc);
cs->writeisac(cs, IPACX_BCHA_CR, 0x88);
}
else
{
cs->writeisac(cs, IPACX_BCHB_TSDP_BC1, 0x80 | bc);
cs->writeisac(cs, IPACX_BCHB_CR, 0x88);
}
// map controller to according timeslot
if (!hscx)
{
cs->writeisac(cs, IPACX_BCHA_TSDP_BC1, 0x80 | bc);
cs->writeisac(cs, IPACX_BCHA_CR, 0x88);
}
else
{
cs->writeisac(cs, IPACX_BCHB_TSDP_BC1, 0x80 | bc);
cs->writeisac(cs, IPACX_BCHB_CR, 0x88);
}
switch (mode) {
case (L1_MODE_NULL):
cs->BC_Write_Reg(cs, hscx, IPACX_MODEB, 0xC0); // rec off
cs->BC_Write_Reg(cs, hscx, IPACX_EXMB, 0x30); // std adj.
cs->BC_Write_Reg(cs, hscx, IPACX_MASKB, 0xFF); // ints off
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x41); // validate adjustments
break;
case (L1_MODE_TRANS):
cs->BC_Write_Reg(cs, hscx, IPACX_MODEB, 0x88); // ext transp mode
cs->BC_Write_Reg(cs, hscx, IPACX_EXMB, 0x00); // xxx00000
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x41); // validate adjustments
cs->BC_Write_Reg(cs, hscx, IPACX_MASKB, _MASKB_IMASK);
break;
case (L1_MODE_HDLC):
cs->BC_Write_Reg(cs, hscx, IPACX_MODEB, 0xC8); // transp mode 0
cs->BC_Write_Reg(cs, hscx, IPACX_EXMB, 0x01); // idle=hdlc flags crc enabled
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x41); // validate adjustments
cs->BC_Write_Reg(cs, hscx, IPACX_MASKB, _MASKB_IMASK);
break;
case (L1_MODE_NULL):
cs->BC_Write_Reg(cs, hscx, IPACX_MODEB, 0xC0); // rec off
cs->BC_Write_Reg(cs, hscx, IPACX_EXMB, 0x30); // std adj.
cs->BC_Write_Reg(cs, hscx, IPACX_MASKB, 0xFF); // ints off
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x41); // validate adjustments
break;
case (L1_MODE_TRANS):
cs->BC_Write_Reg(cs, hscx, IPACX_MODEB, 0x88); // ext transp mode
cs->BC_Write_Reg(cs, hscx, IPACX_EXMB, 0x00); // xxx00000
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x41); // validate adjustments
cs->BC_Write_Reg(cs, hscx, IPACX_MASKB, _MASKB_IMASK);
break;
case (L1_MODE_HDLC):
cs->BC_Write_Reg(cs, hscx, IPACX_MODEB, 0xC8); // transp mode 0
cs->BC_Write_Reg(cs, hscx, IPACX_EXMB, 0x01); // idle=hdlc flags crc enabled
cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x41); // validate adjustments
cs->BC_Write_Reg(cs, hscx, IPACX_MASKB, _MASKB_IMASK);
break;
}
}
@@ -784,13 +784,13 @@ bch_open_state(struct IsdnCardState *cs, struct BCState *bcs)
if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
if (!(bcs->hw.hscx.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
printk(KERN_WARNING
"HiSax open_bchstate(): No memory for hscx.rcvbuf\n");
"HiSax open_bchstate(): No memory for hscx.rcvbuf\n");
clear_bit(BC_FLG_INIT, &bcs->Flag);
return (1);
}
if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) {
printk(KERN_WARNING
"HiSax open_bchstate: No memory for bcs->blog\n");
"HiSax open_bchstate: No memory for bcs->blog\n");
clear_bit(BC_FLG_INIT, &bcs->Flag);
kfree(bcs->hw.hscx.rcvbuf);
bcs->hw.hscx.rcvbuf = NULL;
@@ -842,21 +842,21 @@ bch_init(struct IsdnCardState *cs, int hscx)
//----------------------------------------------------------
// Main interrupt handler
//----------------------------------------------------------
void
void
interrupt_ipacx(struct IsdnCardState *cs)
{
u_char ista;
while ((ista = cs->readisac(cs, IPACX_ISTA))) {
//#################################################
//#################################################
// printk(KERN_WARNING "interrupt_ipacx(ista=%02x)\n", ista);
//#################################################
if (ista &0x80) bch_int(cs, 0); // B channel interrupts
if (ista &0x40) bch_int(cs, 1);
if (ista &0x01) dch_int(cs); // D channel
if (ista &0x10) cic_int(cs); // Layer 1 state
}
//#################################################
if (ista & 0x80) bch_int(cs, 0); // B channel interrupts
if (ista & 0x40) bch_int(cs, 1);
if (ista & 0x01) dch_int(cs); // D channel
if (ista & 0x10) cic_int(cs); // Layer 1 state
}
}
//----------------------------------------------------------
@@ -867,17 +867,17 @@ clear_pending_ints(struct IsdnCardState *cs)
{
int ista;
// all interrupts off
cs->writeisac(cs, IPACX_MASK, 0xff);
// all interrupts off
cs->writeisac(cs, IPACX_MASK, 0xff);
cs->writeisac(cs, IPACX_MASKD, 0xff);
cs->BC_Write_Reg(cs, 0, IPACX_MASKB, 0xff);
cs->BC_Write_Reg(cs, 1, IPACX_MASKB, 0xff);
ista = cs->readisac(cs, IPACX_ISTA);
if (ista &0x80) cs->BC_Read_Reg(cs, 0, IPACX_ISTAB);
if (ista &0x40) cs->BC_Read_Reg(cs, 1, IPACX_ISTAB);
if (ista &0x10) cs->readisac(cs, IPACX_CIR0);
if (ista &0x01) cs->readisac(cs, IPACX_ISTAD);
ista = cs->readisac(cs, IPACX_ISTA);
if (ista & 0x80) cs->BC_Read_Reg(cs, 0, IPACX_ISTAB);
if (ista & 0x40) cs->BC_Read_Reg(cs, 1, IPACX_ISTAB);
if (ista & 0x10) cs->readisac(cs, IPACX_CIR0);
if (ista & 0x01) cs->readisac(cs, IPACX_ISTAD);
}
//----------------------------------------------------------
@@ -887,23 +887,23 @@ clear_pending_ints(struct IsdnCardState *cs)
void
init_ipacx(struct IsdnCardState *cs, int part)
{
if (part &1) { // initialise chip
//##################################################
if (part & 1) { // initialise chip
//##################################################
// printk(KERN_INFO "init_ipacx(%x)\n", part);
//##################################################
//##################################################
clear_pending_ints(cs);
bch_init(cs, 0);
bch_init(cs, 1);
dch_init(cs);
}
if (part &2) { // reenable all interrupts and start chip
if (part & 2) { // reenable all interrupts and start chip
cs->BC_Write_Reg(cs, 0, IPACX_MASKB, _MASKB_IMASK);
cs->BC_Write_Reg(cs, 1, IPACX_MASKB, _MASKB_IMASK);
cs->writeisac(cs, IPACX_MASKD, _MASKD_IMASK);
cs->writeisac(cs, IPACX_MASK, _MASK_IMASK); // global mask register
// reset HDLC Transmitters/receivers
cs->writeisac(cs, IPACX_CMDRD, 0x41);
cs->writeisac(cs, IPACX_CMDRD, 0x41);
cs->BC_Write_Reg(cs, 0, IPACX_CMDRB, 0x41);
cs->BC_Write_Reg(cs, 1, IPACX_CMDRB, 0x41);
ph_command(cs, IPACX_CMD_RES);
@@ -911,4 +911,3 @@ init_ipacx(struct IsdnCardState *cs, int part)
}
//----------------- end of file -----------------------

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -49,34 +49,34 @@ static void
isac_new_ph(struct IsdnCardState *cs)
{
switch (cs->dc.isac.ph_state) {
case (ISAC_IND_RS):
case (ISAC_IND_EI):
ph_command(cs, ISAC_CMD_DUI);
l1_msg(cs, HW_RESET | INDICATION, NULL);
break;
case (ISAC_IND_DID):
l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
break;
case (ISAC_IND_DR):
l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
break;
case (ISAC_IND_PU):
l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
break;
case (ISAC_IND_RSY):
l1_msg(cs, HW_RSYNC | INDICATION, NULL);
break;
case (ISAC_IND_ARD):
l1_msg(cs, HW_INFO2 | INDICATION, NULL);
break;
case (ISAC_IND_AI8):
l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
break;
case (ISAC_IND_AI10):
l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL);
break;
default:
break;
case (ISAC_IND_RS):
case (ISAC_IND_EI):
ph_command(cs, ISAC_CMD_DUI);
l1_msg(cs, HW_RESET | INDICATION, NULL);
break;
case (ISAC_IND_DID):
l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
break;
case (ISAC_IND_DR):
l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
break;
case (ISAC_IND_PU):
l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
break;
case (ISAC_IND_RSY):
l1_msg(cs, HW_RSYNC | INDICATION, NULL);
break;
case (ISAC_IND_ARD):
l1_msg(cs, HW_INFO2 | INDICATION, NULL);
break;
case (ISAC_IND_AI8):
l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
break;
case (ISAC_IND_AI10):
l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL);
break;
default:
break;
}
}
@@ -86,7 +86,7 @@ isac_bh(struct work_struct *work)
struct IsdnCardState *cs =
container_of(work, struct IsdnCardState, tqueue);
struct PStack *stptr;
if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) {
if (cs->debug)
debugl1(cs, "D-Channel Busy cleared");
@@ -97,7 +97,7 @@ isac_bh(struct work_struct *work)
}
}
if (test_and_clear_bit(D_L1STATECHANGE, &cs->event))
isac_new_ph(cs);
isac_new_ph(cs);
if (test_and_clear_bit(D_RCVBUFREADY, &cs->event))
DChannel_proc_rcv(cs);
if (test_and_clear_bit(D_XMTBUFREADY, &cs->event))
@@ -257,11 +257,11 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
} else
schedule_event(cs, D_XMTBUFREADY);
}
afterXPR:
afterXPR:
if (val & 0x04) { /* CISQ */
exval = cs->readisac(cs, ISAC_CIR0);
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC CIR0 %02X", exval );
debugl1(cs, "ISAC CIR0 %02X", exval);
if (exval & 2) {
cs->dc.isac.ph_state = (exval >> 2) & 0xf;
if (cs->debug & L1_DEB_ISAC)
@@ -271,7 +271,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
if (exval & 1) {
exval = cs->readisac(cs, ISAC_CIR1);
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC CIR1 %02X", exval );
debugl1(cs, "ISAC CIR1 %02X", exval);
}
}
if (val & 0x02) { /* SIN */
@@ -334,13 +334,13 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
}
cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp++] = cs->readisac(cs, ISAC_MOR0);
if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ISAC MOR0 %02x", cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp -1]);
debugl1(cs, "ISAC MOR0 %02x", cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp - 1]);
if (cs->dc.isac.mon_rxp == 1) {
cs->dc.isac.mocr |= 0x04;
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
}
}
afterMONR0:
afterMONR0:
if (v1 & 0x80) {
if (!cs->dc.isac.mon_rx) {
if (!(cs->dc.isac.mon_rx = kmalloc(MAX_MON_FRAME, GFP_ATOMIC))) {
@@ -364,11 +364,11 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
}
cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp++] = cs->readisac(cs, ISAC_MOR1);
if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ISAC MOR1 %02x", cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp -1]);
debugl1(cs, "ISAC MOR1 %02x", cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp - 1]);
cs->dc.isac.mocr |= 0x40;
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
}
afterMONR1:
afterMONR1:
if (v1 & 0x04) {
cs->dc.isac.mocr &= 0xf0;
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
@@ -384,15 +384,15 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
schedule_event(cs, D_RX_MON1);
}
if (v1 & 0x02) {
if ((!cs->dc.isac.mon_tx) || (cs->dc.isac.mon_txc &&
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc) &&
!(v1 & 0x08))) {
if ((!cs->dc.isac.mon_tx) || (cs->dc.isac.mon_txc &&
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc) &&
!(v1 & 0x08))) {
cs->dc.isac.mocr &= 0xf0;
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
cs->dc.isac.mocr |= 0x0a;
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
if (cs->dc.isac.mon_txc &&
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc))
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc))
schedule_event(cs, D_TX_MON0);
goto AfterMOX0;
}
@@ -401,21 +401,21 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
goto AfterMOX0;
}
cs->writeisac(cs, ISAC_MOX0,
cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ISAC %02x -> MOX0", cs->dc.isac.mon_tx[cs->dc.isac.mon_txp -1]);
debugl1(cs, "ISAC %02x -> MOX0", cs->dc.isac.mon_tx[cs->dc.isac.mon_txp - 1]);
}
AfterMOX0:
AfterMOX0:
if (v1 & 0x20) {
if ((!cs->dc.isac.mon_tx) || (cs->dc.isac.mon_txc &&
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc) &&
!(v1 & 0x80))) {
if ((!cs->dc.isac.mon_tx) || (cs->dc.isac.mon_txc &&
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc) &&
!(v1 & 0x80))) {
cs->dc.isac.mocr &= 0x0f;
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
cs->dc.isac.mocr |= 0xa0;
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
if (cs->dc.isac.mon_txc &&
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc))
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc))
schedule_event(cs, D_TX_MON1);
goto AfterMOX1;
}
@@ -424,11 +424,11 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
goto AfterMOX1;
}
cs->writeisac(cs, ISAC_MOX1,
cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ISAC %02x -> MOX1", cs->dc.isac.mon_tx[cs->dc.isac.mon_txp -1]);
debugl1(cs, "ISAC %02x -> MOX1", cs->dc.isac.mon_tx[cs->dc.isac.mon_txp - 1]);
}
AfterMOX1:;
AfterMOX1:;
#endif
}
}
@@ -443,123 +443,123 @@ ISAC_l1hw(struct PStack *st, int pr, void *arg)
int val;
switch (pr) {
case (PH_DATA |REQUEST):
case (PH_DATA | REQUEST):
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
skb_queue_tail(&cs->sq, skb);
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA Queued", 0);
#endif
} else {
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA", 0);
#endif
isac_fill_fifo(cs);
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
} else {
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
skb_queue_tail(&cs->sq, skb);
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA Queued", 0);
#endif
} else {
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA", 0);
#endif
isac_fill_fifo(cs);
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL |INDICATION):
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
} else {
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
#endif
isac_fill_fifo(cs);
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | REQUEST):
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
debugl1(cs, "-> PH_REQUEST_PULL");
Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
#endif
if (!cs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (HW_RESET | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
if ((cs->dc.isac.ph_state == ISAC_IND_EI) ||
(cs->dc.isac.ph_state == ISAC_IND_DR) ||
(cs->dc.isac.ph_state == ISAC_IND_RS))
ph_command(cs, ISAC_CMD_TIM);
else
ph_command(cs, ISAC_CMD_RS);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_ENABLE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
isac_fill_fifo(cs);
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | REQUEST):
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
debugl1(cs, "-> PH_REQUEST_PULL");
#endif
if (!cs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (HW_RESET | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
if ((cs->dc.isac.ph_state == ISAC_IND_EI) ||
(cs->dc.isac.ph_state == ISAC_IND_DR) ||
(cs->dc.isac.ph_state == ISAC_IND_RS))
ph_command(cs, ISAC_CMD_TIM);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_INFO3 | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
ph_command(cs, ISAC_CMD_AR8);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_TESTLOOP | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
val = 0;
if (1 & (long) arg)
val |= 0x0c;
if (2 & (long) arg)
val |= 0x3;
if (test_bit(HW_IOM1, &cs->HW_Flags)) {
/* IOM 1 Mode */
if (!val) {
cs->writeisac(cs, ISAC_SPCR, 0xa);
cs->writeisac(cs, ISAC_ADF1, 0x2);
} else {
cs->writeisac(cs, ISAC_SPCR, val);
cs->writeisac(cs, ISAC_ADF1, 0xa);
}
else
ph_command(cs, ISAC_CMD_RS);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_ENABLE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
ph_command(cs, ISAC_CMD_TIM);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_INFO3 | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
ph_command(cs, ISAC_CMD_AR8);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_TESTLOOP | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
val = 0;
if (1 & (long) arg)
val |= 0x0c;
if (2 & (long) arg)
val |= 0x3;
if (test_bit(HW_IOM1, &cs->HW_Flags)) {
/* IOM 1 Mode */
if (!val) {
cs->writeisac(cs, ISAC_SPCR, 0xa);
cs->writeisac(cs, ISAC_ADF1, 0x2);
} else {
/* IOM 2 Mode */
cs->writeisac(cs, ISAC_SPCR, val);
if (val)
cs->writeisac(cs, ISAC_ADF1, 0x8);
else
cs->writeisac(cs, ISAC_ADF1, 0x0);
cs->writeisac(cs, ISAC_ADF1, 0xa);
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_DEACTIVATE | RESPONSE):
skb_queue_purge(&cs->rq);
skb_queue_purge(&cs->sq);
if (cs->tx_skb) {
dev_kfree_skb_any(cs->tx_skb);
cs->tx_skb = NULL;
}
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
schedule_event(cs, D_CLEARBUSY);
break;
default:
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "isac_l1hw unknown %04x", pr);
break;
} else {
/* IOM 2 Mode */
cs->writeisac(cs, ISAC_SPCR, val);
if (val)
cs->writeisac(cs, ISAC_ADF1, 0x8);
else
cs->writeisac(cs, ISAC_ADF1, 0x0);
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_DEACTIVATE | RESPONSE):
skb_queue_purge(&cs->rq);
skb_queue_purge(&cs->sq);
if (cs->tx_skb) {
dev_kfree_skb_any(cs->tx_skb);
cs->tx_skb = NULL;
}
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
schedule_event(cs, D_CLEARBUSY);
break;
default:
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "isac_l1hw unknown %04x", pr);
break;
}
}
@@ -587,7 +587,7 @@ dbusy_timer_handler(struct IsdnCardState *cs)
if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
rbch = cs->readisac(cs, ISAC_RBCH);
star = cs->readisac(cs, ISAC_STAR);
if (cs->debug)
if (cs->debug)
debugl1(cs, "D-Channel Busy RBCH %02x STAR %02x",
rbch, star);
if (rbch & ISAC_RBCH_XAC) { /* D-Channel Busy */
@@ -620,8 +620,8 @@ void initisac(struct IsdnCardState *cs)
cs->DC_Close = DC_Close_isac;
cs->dc.isac.mon_tx = NULL;
cs->dc.isac.mon_rx = NULL;
cs->writeisac(cs, ISAC_MASK, 0xff);
cs->dc.isac.mocr = 0xaa;
cs->writeisac(cs, ISAC_MASK, 0xff);
cs->dc.isac.mocr = 0xaa;
if (test_bit(HW_IOM1, &cs->HW_Flags)) {
/* IOM 1 Mode */
cs->writeisac(cs, ISAC_ADF2, 0x0);

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*

Filskillnaden har hållits tillbaka eftersom den är för stor Load Diff

Visa fil

@@ -4,12 +4,12 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
*/
#define ISAR_IRQMSK 0x04
#define ISAR_IRQSTA 0x04
#define ISAR_IRQBIT 0x75
@@ -21,7 +21,7 @@
#define ISAR_HIA 0x50
#define ISAR_MBOX 0x4c
#define ISAR_WADR 0x4a
#define ISAR_RADR 0x48
#define ISAR_RADR 0x48
#define ISAR_HIS_VNR 0x14
#define ISAR_HIS_DKEY 0x02
@@ -32,9 +32,9 @@
#define ISAR_HIS_TIMERIRQ 0x25
#define ISAR_HIS_P0CFG 0x3c
#define ISAR_HIS_P12CFG 0x24
#define ISAR_HIS_SARTCFG 0x25
#define ISAR_HIS_PUMPCFG 0x26
#define ISAR_HIS_PUMPCTRL 0x2a
#define ISAR_HIS_SARTCFG 0x25
#define ISAR_HIS_PUMPCFG 0x26
#define ISAR_HIS_PUMPCTRL 0x2a
#define ISAR_HIS_IOM2CFG 0x27
#define ISAR_HIS_IOM2REQ 0x07
#define ISAR_HIS_IOM2CTRL 0x2b
@@ -43,7 +43,7 @@
#define ISAR_HIS_SDATA 0x20
#define ISAR_HIS_DPS1 0x40
#define ISAR_HIS_DPS2 0x80
#define SET_DPS(x) ((x<<6) & 0xc0)
#define SET_DPS(x) ((x << 6) & 0xc0)
#define ISAR_CMD_TIMERIRQ_OFF 0x20
#define ISAR_CMD_TIMERIRQ_ON 0x21

Visa fil

@@ -5,7 +5,7 @@
* Author Karsten Keil
* based on the teles driver from Jan den Ouden
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -40,7 +40,7 @@ enum {
ST_L1_F8,
};
#define L1S_STATE_COUNT (ST_L1_F8+1)
#define L1S_STATE_COUNT (ST_L1_F8 + 1)
static char *strL1SState[] =
{
@@ -65,7 +65,7 @@ enum {
ST_L1_TRANS,
};
#define L1U_STATE_COUNT (ST_L1_TRANS+1)
#define L1U_STATE_COUNT (ST_L1_TRANS + 1)
static char *strL1UState[] =
{
@@ -83,7 +83,7 @@ enum {
ST_L1_ACTIV,
};
#define L1B_STATE_COUNT (ST_L1_ACTIV+1)
#define L1B_STATE_COUNT (ST_L1_ACTIV + 1)
static char *strL1BState[] =
{
@@ -100,7 +100,7 @@ enum {
EV_DEACT_CNF,
EV_DEACT_IND,
EV_POWER_UP,
EV_RSYNC_IND,
EV_RSYNC_IND,
EV_INFO2_IND,
EV_INFO4_IND,
EV_TIMER_DEACT,
@@ -118,7 +118,7 @@ static char *strL1Event[] =
"EV_DEACT_CNF",
"EV_DEACT_IND",
"EV_POWER_UP",
"EV_RSYNC_IND",
"EV_RSYNC_IND",
"EV_INFO2_IND",
"EV_INFO4_IND",
"EV_TIMER_DEACT",
@@ -131,7 +131,7 @@ debugl1(struct IsdnCardState *cs, char *fmt, ...)
{
va_list args;
char tmp[8];
va_start(args, fmt);
sprintf(tmp, "Card%d ", cs->cardnr + 1);
VHiSax_putstatus(cs, tmp, fmt, args);
@@ -145,7 +145,7 @@ l1m_debug(struct FsmInst *fi, char *fmt, ...)
struct PStack *st = fi->userdata;
struct IsdnCardState *cs = st->l1.hardware;
char tmp[8];
va_start(args, fmt);
sprintf(tmp, "Card%d ", cs->cardnr + 1);
VHiSax_putstatus(cs, tmp, fmt, args);
@@ -209,19 +209,19 @@ DChannel_proc_rcv(struct IsdnCardState *cs)
if (stptr)
if (test_bit(FLG_L1_ACTTIMER, &stptr->l1.Flags))
FsmEvent(&stptr->l1.l1m, EV_TIMER_ACT, NULL);
FsmEvent(&stptr->l1.l1m, EV_TIMER_ACT, NULL);
while ((skb = skb_dequeue(&cs->rq))) {
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA", 1);
#endif
stptr = cs->stlist;
if (skb->len<3) {
debugl1(cs, "D-channel frame too short(%d)",skb->len);
if (skb->len < 3) {
debugl1(cs, "D-channel frame too short(%d)", skb->len);
dev_kfree_skb(skb);
return;
}
if ((skb->data[0] & 1) || !(skb->data[1] &1)) {
if ((skb->data[0] & 1) || !(skb->data[1] & 1)) {
debugl1(cs, "D-channel frame wrong EA0/EA1");
dev_kfree_skb(skb);
return;
@@ -378,60 +378,60 @@ static char *
l2cmd(u_char cmd)
{
switch (cmd & ~0x10) {
case 1:
return "RR";
case 5:
return "RNR";
case 9:
return "REJ";
case 0x6f:
return "SABME";
case 0x0f:
return "DM";
case 3:
return "UI";
case 0x43:
return "DISC";
case 0x63:
return "UA";
case 0x87:
return "FRMR";
case 0xaf:
return "XID";
default:
if (!(cmd & 1))
return "I";
else
return "invalid command";
case 1:
return "RR";
case 5:
return "RNR";
case 9:
return "REJ";
case 0x6f:
return "SABME";
case 0x0f:
return "DM";
case 3:
return "UI";
case 0x43:
return "DISC";
case 0x63:
return "UA";
case 0x87:
return "FRMR";
case 0xaf:
return "XID";
default:
if (!(cmd & 1))
return "I";
else
return "invalid command";
}
}
static char tmpdeb[32];
static char *
l2frames(u_char * ptr)
l2frames(u_char *ptr)
{
switch (ptr[2] & ~0x10) {
case 1:
case 5:
case 9:
sprintf(tmpdeb, "%s[%d](nr %d)", l2cmd(ptr[2]), ptr[3] & 1, ptr[3] >> 1);
case 1:
case 5:
case 9:
sprintf(tmpdeb, "%s[%d](nr %d)", l2cmd(ptr[2]), ptr[3] & 1, ptr[3] >> 1);
break;
case 0x6f:
case 0x0f:
case 3:
case 0x43:
case 0x63:
case 0x87:
case 0xaf:
sprintf(tmpdeb, "%s[%d]", l2cmd(ptr[2]), (ptr[2] & 0x10) >> 4);
break;
default:
if (!(ptr[2] & 1)) {
sprintf(tmpdeb, "I[%d](ns %d, nr %d)", ptr[3] & 1, ptr[2] >> 1, ptr[3] >> 1);
break;
case 0x6f:
case 0x0f:
case 3:
case 0x43:
case 0x63:
case 0x87:
case 0xaf:
sprintf(tmpdeb, "%s[%d]", l2cmd(ptr[2]), (ptr[2] & 0x10) >> 4);
break;
default:
if (!(ptr[2] & 1)) {
sprintf(tmpdeb, "I[%d](ns %d, nr %d)", ptr[3] & 1, ptr[2] >> 1, ptr[3] >> 1);
break;
} else
return "invalid command";
} else
return "invalid command";
}
@@ -547,24 +547,24 @@ l1_timer3(struct FsmInst *fi, int event, void *arg)
{
struct PStack *st = fi->userdata;
test_and_clear_bit(FLG_L1_T3RUN, &st->l1.Flags);
test_and_clear_bit(FLG_L1_T3RUN, &st->l1.Flags);
if (test_and_clear_bit(FLG_L1_ACTIVATING, &st->l1.Flags))
L1deactivated(st->l1.hardware);
#ifdef HISAX_UINTERFACE
if (!test_bit(FLG_L1_UINT, &st->l1.Flags))
#endif
if (st->l1.l1m.state != ST_L1_F6) {
FsmChangeState(fi, ST_L1_F3);
st->l1.l1hw(st, HW_ENABLE | REQUEST, NULL);
}
if (st->l1.l1m.state != ST_L1_F6) {
FsmChangeState(fi, ST_L1_F3);
st->l1.l1hw(st, HW_ENABLE | REQUEST, NULL);
}
}
static void
l1_timer_act(struct FsmInst *fi, int event, void *arg)
{
struct PStack *st = fi->userdata;
test_and_clear_bit(FLG_L1_ACTTIMER, &st->l1.Flags);
test_and_set_bit(FLG_L1_ACTIVATED, &st->l1.Flags);
L1activated(st->l1.hardware);
@@ -574,7 +574,7 @@ static void
l1_timer_deact(struct FsmInst *fi, int event, void *arg)
{
struct PStack *st = fi->userdata;
test_and_clear_bit(FLG_L1_DEACTTIMER, &st->l1.Flags);
test_and_clear_bit(FLG_L1_ACTIVATED, &st->l1.Flags);
L1deactivated(st->l1.hardware);
@@ -585,7 +585,7 @@ static void
l1_activate_s(struct FsmInst *fi, int event, void *arg)
{
struct PStack *st = fi->userdata;
st->l1.l1hw(st, HW_RESET | REQUEST, NULL);
}
@@ -679,7 +679,7 @@ static void
l1_activate_u(struct FsmInst *fi, int event, void *arg)
{
struct PStack *st = fi->userdata;
st->l1.l1hw(st, HW_INFO1 | REQUEST, NULL);
}
@@ -751,7 +751,7 @@ static struct FsmNode L1BFnList[] __initdata =
{ST_L1_WAIT_DEACT, EV_TIMER_DEACT, l1b_timer_deact},
};
int __init
int __init
Isdnl1New(void)
{
int retval;
@@ -803,35 +803,35 @@ dch_l2l1(struct PStack *st, int pr, void *arg)
struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
switch (pr) {
case (PH_DATA | REQUEST):
case (PH_PULL | REQUEST):
case (PH_PULL |INDICATION):
st->l1.l1hw(st, pr, arg);
break;
case (PH_ACTIVATE | REQUEST):
if (cs->debug)
debugl1(cs, "PH_ACTIVATE_REQ %s",
st->l1.l1m.fsm->strState[st->l1.l1m.state]);
if (test_bit(FLG_L1_ACTIVATED, &st->l1.Flags))
st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL);
else {
test_and_set_bit(FLG_L1_ACTIVATING, &st->l1.Flags);
FsmEvent(&st->l1.l1m, EV_PH_ACTIVATE, arg);
}
break;
case (PH_TESTLOOP | REQUEST):
if (1 & (long) arg)
debugl1(cs, "PH_TEST_LOOP B1");
if (2 & (long) arg)
debugl1(cs, "PH_TEST_LOOP B2");
if (!(3 & (long) arg))
debugl1(cs, "PH_TEST_LOOP DISABLED");
st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg);
break;
default:
if (cs->debug)
debugl1(cs, "dch_l2l1 msg %04X unhandled", pr);
break;
case (PH_DATA | REQUEST):
case (PH_PULL | REQUEST):
case (PH_PULL | INDICATION):
st->l1.l1hw(st, pr, arg);
break;
case (PH_ACTIVATE | REQUEST):
if (cs->debug)
debugl1(cs, "PH_ACTIVATE_REQ %s",
st->l1.l1m.fsm->strState[st->l1.l1m.state]);
if (test_bit(FLG_L1_ACTIVATED, &st->l1.Flags))
st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL);
else {
test_and_set_bit(FLG_L1_ACTIVATING, &st->l1.Flags);
FsmEvent(&st->l1.l1m, EV_PH_ACTIVATE, arg);
}
break;
case (PH_TESTLOOP | REQUEST):
if (1 & (long) arg)
debugl1(cs, "PH_TEST_LOOP B1");
if (2 & (long) arg)
debugl1(cs, "PH_TEST_LOOP B2");
if (!(3 & (long) arg))
debugl1(cs, "PH_TEST_LOOP DISABLED");
st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg);
break;
default:
if (cs->debug)
debugl1(cs, "dch_l2l1 msg %04X unhandled", pr);
break;
}
}
@@ -840,35 +840,35 @@ l1_msg(struct IsdnCardState *cs, int pr, void *arg) {
struct PStack *st;
st = cs->stlist;
while (st) {
switch(pr) {
case (HW_RESET | INDICATION):
FsmEvent(&st->l1.l1m, EV_RESET_IND, arg);
break;
case (HW_DEACTIVATE | CONFIRM):
FsmEvent(&st->l1.l1m, EV_DEACT_CNF, arg);
break;
case (HW_DEACTIVATE | INDICATION):
FsmEvent(&st->l1.l1m, EV_DEACT_IND, arg);
break;
case (HW_POWERUP | CONFIRM):
FsmEvent(&st->l1.l1m, EV_POWER_UP, arg);
break;
case (HW_RSYNC | INDICATION):
FsmEvent(&st->l1.l1m, EV_RSYNC_IND, arg);
break;
case (HW_INFO2 | INDICATION):
FsmEvent(&st->l1.l1m, EV_INFO2_IND, arg);
break;
case (HW_INFO4_P8 | INDICATION):
case (HW_INFO4_P10 | INDICATION):
FsmEvent(&st->l1.l1m, EV_INFO4_IND, arg);
break;
default:
if (cs->debug)
debugl1(cs, "l1msg %04X unhandled", pr);
break;
switch (pr) {
case (HW_RESET | INDICATION):
FsmEvent(&st->l1.l1m, EV_RESET_IND, arg);
break;
case (HW_DEACTIVATE | CONFIRM):
FsmEvent(&st->l1.l1m, EV_DEACT_CNF, arg);
break;
case (HW_DEACTIVATE | INDICATION):
FsmEvent(&st->l1.l1m, EV_DEACT_IND, arg);
break;
case (HW_POWERUP | CONFIRM):
FsmEvent(&st->l1.l1m, EV_POWER_UP, arg);
break;
case (HW_RSYNC | INDICATION):
FsmEvent(&st->l1.l1m, EV_RSYNC_IND, arg);
break;
case (HW_INFO2 | INDICATION):
FsmEvent(&st->l1.l1m, EV_INFO2_IND, arg);
break;
case (HW_INFO4_P8 | INDICATION):
case (HW_INFO4_P10 | INDICATION):
FsmEvent(&st->l1.l1m, EV_INFO4_IND, arg);
break;
default:
if (cs->debug)
debugl1(cs, "l1msg %04X unhandled", pr);
break;
}
st = st->next;
}
@@ -876,13 +876,13 @@ l1_msg(struct IsdnCardState *cs, int pr, void *arg) {
void
l1_msg_b(struct PStack *st, int pr, void *arg) {
switch(pr) {
case (PH_ACTIVATE | REQUEST):
FsmEvent(&st->l1.l1m, EV_PH_ACTIVATE, NULL);
break;
case (PH_DEACTIVATE | REQUEST):
FsmEvent(&st->l1.l1m, EV_PH_DEACTIVATE, NULL);
break;
switch (pr) {
case (PH_ACTIVATE | REQUEST):
FsmEvent(&st->l1.l1m, EV_PH_ACTIVATE, NULL);
break;
case (PH_DEACTIVATE | REQUEST):
FsmEvent(&st->l1.l1m, EV_PH_DEACTIVATE, NULL);
break;
}
}

Visa fil

@@ -3,7 +3,7 @@
* Author Karsten Keil
* based on the teles driver from Jan den Ouden
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -37,7 +37,7 @@ enum {
ST_L2_8,
};
#define L2_STATE_COUNT (ST_L2_8+1)
#define L2_STATE_COUNT (ST_L2_8 + 1)
static char *strL2State[] =
{
@@ -76,7 +76,7 @@ enum {
EV_L2_FRAME_ERROR,
};
#define L2_EVENT_COUNT (EV_L2_FRAME_ERROR+1)
#define L2_EVENT_COUNT (EV_L2_FRAME_ERROR + 1)
static char *strL2Event[] =
{
@@ -155,7 +155,7 @@ ReleaseWin(struct Layer2 *l2)
{
int cnt;
if((cnt = freewin1(l2)))
if ((cnt = freewin1(l2)))
printk(KERN_WARNING "isdl2 freed %d skbuffs in release\n", cnt);
}
@@ -164,7 +164,7 @@ cansend(struct PStack *st)
{
unsigned int p1;
if(test_bit(FLG_MOD128, &st->l2.flag))
if (test_bit(FLG_MOD128, &st->l2.flag))
p1 = (st->l2.vs - st->l2.va) % 128;
else
p1 = (st->l2.vs - st->l2.va) % 8;
@@ -194,7 +194,7 @@ l2addrsize(struct Layer2 *l2)
}
static int
sethdraddr(struct Layer2 *l2, u_char * header, int rsp)
sethdraddr(struct Layer2 *l2, u_char *header, int rsp)
{
u_char *ptr = header;
int crbit = rsp;
@@ -226,41 +226,41 @@ enqueue_super(struct PStack *st,
#define enqueue_ui(a, b) enqueue_super(a, b)
static inline int
IsUI(u_char * data)
IsUI(u_char *data)
{
return ((data[0] & 0xef) == UI);
}
static inline int
IsUA(u_char * data)
IsUA(u_char *data)
{
return ((data[0] & 0xef) == UA);
}
static inline int
IsDM(u_char * data)
IsDM(u_char *data)
{
return ((data[0] & 0xef) == DM);
}
static inline int
IsDISC(u_char * data)
IsDISC(u_char *data)
{
return ((data[0] & 0xef) == DISC);
}
static inline int
IsSFrame(u_char * data, struct PStack *st)
IsSFrame(u_char *data, struct PStack *st)
{
register u_char d = *data;
if (!test_bit(FLG_MOD128, &st->l2.flag))
d &= 0xf;
return(((d & 0xf3) == 1) && ((d & 0x0c) != 0x0c));
return (((d & 0xf3) == 1) && ((d & 0x0c) != 0x0c));
}
static inline int
IsSABME(u_char * data, struct PStack *st)
IsSABME(u_char *data, struct PStack *st)
{
u_char d = data[0] & ~0x10;
@@ -268,19 +268,19 @@ IsSABME(u_char * data, struct PStack *st)
}
static inline int
IsREJ(u_char * data, struct PStack *st)
IsREJ(u_char *data, struct PStack *st)
{
return (test_bit(FLG_MOD128, &st->l2.flag) ? data[0] == REJ : (data[0] & 0xf) == REJ);
}
static inline int
IsFRMR(u_char * data)
IsFRMR(u_char *data)
{
return ((data[0] & 0xef) == FRMR);
}
static inline int
IsRNR(u_char * data, struct PStack *st)
IsRNR(u_char *data, struct PStack *st)
{
return (test_bit(FLG_MOD128, &st->l2.flag) ? data[0] == RNR : (data[0] & 0xf) == RNR);
}
@@ -368,14 +368,14 @@ FRMR_error(struct PStack *st, struct sk_buff *skb)
return 'N';
else
l2m_debug(&st->l2.l2m, "FRMR information %2x %2x %2x %2x %2x",
datap[0], datap[1], datap[2],
datap[3], datap[4]);
datap[0], datap[1], datap[2],
datap[3], datap[4]);
} else {
if (skb->len < headers + 3)
return 'N';
else
l2m_debug(&st->l2.l2m, "FRMR information %2x %2x %2x",
datap[0], datap[1], datap[2]);
datap[0], datap[1], datap[2]);
}
return 0;
@@ -384,9 +384,9 @@ FRMR_error(struct PStack *st, struct sk_buff *skb)
static unsigned int
legalnr(struct PStack *st, unsigned int nr)
{
struct Layer2 *l2 = &st->l2;
struct Layer2 *l2 = &st->l2;
if(test_bit(FLG_MOD128, &l2->flag))
if (test_bit(FLG_MOD128, &l2->flag))
return ((nr - l2->va) % 128) <= ((l2->vs - l2->va) % 128);
else
return ((nr - l2->va) % 8) <= ((l2->vs - l2->va) % 8);
@@ -402,7 +402,7 @@ setva(struct PStack *st, unsigned int nr)
spin_lock_irqsave(&l2->lock, flags);
while (l2->va != nr) {
(l2->va)++;
if(test_bit(FLG_MOD128, &l2->flag))
if (test_bit(FLG_MOD128, &l2->flag))
l2->va %= 128;
else
l2->va %= 8;
@@ -413,7 +413,7 @@ setva(struct PStack *st, unsigned int nr)
l2->windowar[l2->sow] = NULL;
l2->sow = (l2->sow + 1) % l2->window;
spin_unlock_irqrestore(&l2->lock, flags);
if (test_bit(FLG_LLI_L2WAKEUP, &st->lli.flag) && (len >=0))
if (test_bit(FLG_LLI_L2WAKEUP, &st->lli.flag) && (len >= 0))
lli_writewakeup(st, len);
spin_lock_irqsave(&l2->lock, flags);
}
@@ -438,7 +438,7 @@ send_uframe(struct PStack *st, u_char cmd, u_char cr)
}
static inline u_char
get_PollFlag(struct PStack * st, struct sk_buff * skb)
get_PollFlag(struct PStack *st, struct sk_buff *skb)
{
return (skb->data[l2addrsize(&(st->l2))] & 0x10);
}
@@ -470,29 +470,29 @@ restart_t200(struct PStack *st, int i)
static inline void
stop_t200(struct PStack *st, int i)
{
if(test_and_clear_bit(FLG_T200_RUN, &st->l2.flag))
if (test_and_clear_bit(FLG_T200_RUN, &st->l2.flag))
FsmDelTimer(&st->l2.t200, i);
}
static inline void
st5_dl_release_l2l3(struct PStack *st)
{
int pr;
int pr;
if(test_and_clear_bit(FLG_PEND_REL, &st->l2.flag))
pr = DL_RELEASE | CONFIRM;
else
pr = DL_RELEASE | INDICATION;
if (test_and_clear_bit(FLG_PEND_REL, &st->l2.flag))
pr = DL_RELEASE | CONFIRM;
else
pr = DL_RELEASE | INDICATION;
st->l2.l2l3(st, pr, NULL);
st->l2.l2l3(st, pr, NULL);
}
static inline void
lapb_dl_release_l2l3(struct PStack *st, int f)
{
if (test_bit(FLG_LAPB, &st->l2.flag))
st->l2.l2l1(st, PH_DEACTIVATE | REQUEST, NULL);
st->l2.l2l3(st, DL_RELEASE | f, NULL);
if (test_bit(FLG_LAPB, &st->l2.flag))
st->l2.l2l1(st, PH_DEACTIVATE | REQUEST, NULL);
st->l2.l2l3(st, DL_RELEASE | f, NULL);
}
static void
@@ -557,7 +557,7 @@ l2_st8_mdl_error_dm(struct FsmInst *fi, int event, void *arg)
static void
l2_go_st3(struct FsmInst *fi, int event, void *arg)
{
FsmChangeState(fi, ST_L2_3);
FsmChangeState(fi, ST_L2_3);
}
static void
@@ -565,7 +565,7 @@ l2_mdl_assign(struct FsmInst *fi, int event, void *arg)
{
struct PStack *st = fi->userdata;
FsmChangeState(fi, ST_L2_3);
FsmChangeState(fi, ST_L2_3);
st->l2.l2tei(st, MDL_ASSIGN | INDICATION, NULL);
}
@@ -755,7 +755,7 @@ l2_restart_multi(struct FsmInst *fi, int event, void *arg)
if (est)
st->l2.l2l3(st, DL_ESTABLISH | INDICATION, NULL);
if ((ST_L2_7==state) || (ST_L2_8 == state))
if ((ST_L2_7 == state) || (ST_L2_8 == state))
if (!skb_queue_empty(&st->l2.i_queue) && cansend(st))
st->l2.l2l1(st, PH_PULL | REQUEST, NULL);
}
@@ -782,7 +782,7 @@ l2_connected(struct FsmInst *fi, int event, void *arg)
{
struct PStack *st = fi->userdata;
struct sk_buff *skb = arg;
int pr=-1;
int pr = -1;
if (!get_PollFlag(st, skb)) {
l2_mdl_error_ua(fi, event, arg);
@@ -853,7 +853,7 @@ l2_st5_dm_release(struct FsmInst *fi, int event, void *arg)
if (get_PollFlagFree(st, skb)) {
stop_t200(st, 7);
if (!test_bit(FLG_L3_INIT, &st->l2.flag))
if (!test_bit(FLG_L3_INIT, &st->l2.flag))
skb_queue_purge(&st->l2.i_queue);
if (test_bit(FLG_LAPB, &st->l2.flag))
st->l2.l2l1(st, PH_DEACTIVATE | REQUEST, NULL);
@@ -941,7 +941,7 @@ invoke_retransmission(struct PStack *st, unsigned int nr)
if (l2->vs != nr) {
while (l2->vs != nr) {
(l2->vs)--;
if(test_bit(FLG_MOD128, &l2->flag)) {
if (test_bit(FLG_MOD128, &l2->flag)) {
l2->vs %= 128;
p1 = (l2->vs - l2->va) % 128;
} else {
@@ -1013,7 +1013,7 @@ l2_st7_got_super(struct FsmInst *fi, int event, void *arg)
EV_L2_T203, NULL, 7);
} else if ((l2->va != nr) || (typ == RNR)) {
setva(st, nr);
if(typ != RR) FsmDelTimer(&st->l2.t203, 9);
if (typ != RR) FsmDelTimer(&st->l2.t203, 9);
restart_t200(st, 12);
}
if (!skb_queue_empty(&st->l2.i_queue) && (typ == RR))
@@ -1080,10 +1080,10 @@ l2_got_iframe(struct FsmInst *fi, int event, void *arg)
}
if (test_bit(FLG_OWN_BUSY, &l2->flag)) {
dev_kfree_skb(skb);
if(PollFlag) enquiry_response(st);
if (PollFlag) enquiry_response(st);
} else if (l2->vr == ns) {
(l2->vr)++;
if(test_bit(FLG_MOD128, &l2->flag))
if (test_bit(FLG_MOD128, &l2->flag))
l2->vr %= 128;
else
l2->vr %= 8;
@@ -1150,7 +1150,7 @@ l2_st5_tout_200(struct FsmInst *fi, int event, void *arg)
struct PStack *st = fi->userdata;
if (test_bit(FLG_LAPD, &st->l2.flag) &&
test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 9);
} else if (st->l2.rc == st->l2.N200) {
FsmChangeState(fi, ST_L2_4);
@@ -1174,7 +1174,7 @@ l2_st6_tout_200(struct FsmInst *fi, int event, void *arg)
struct PStack *st = fi->userdata;
if (test_bit(FLG_LAPD, &st->l2.flag) &&
test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 9);
} else if (st->l2.rc == st->l2.N200) {
FsmChangeState(fi, ST_L2_4);
@@ -1195,7 +1195,7 @@ l2_st7_tout_200(struct FsmInst *fi, int event, void *arg)
struct PStack *st = fi->userdata;
if (test_bit(FLG_LAPD, &st->l2.flag) &&
test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 9);
return;
}
@@ -1213,7 +1213,7 @@ l2_st8_tout_200(struct FsmInst *fi, int event, void *arg)
struct PStack *st = fi->userdata;
if (test_bit(FLG_LAPD, &st->l2.flag) &&
test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 9);
return;
}
@@ -1234,7 +1234,7 @@ l2_st7_tout_203(struct FsmInst *fi, int event, void *arg)
struct PStack *st = fi->userdata;
if (test_bit(FLG_LAPD, &st->l2.flag) &&
test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
FsmAddTimer(&st->l2.t203, st->l2.T203, EV_L2_T203, NULL, 9);
return;
}
@@ -1272,7 +1272,7 @@ l2_pull_iqueue(struct FsmInst *fi, int event, void *arg)
}
}
spin_lock_irqsave(&l2->lock, flags);
if(test_bit(FLG_MOD128, &l2->flag))
if (test_bit(FLG_MOD128, &l2->flag))
p1 = (l2->vs - l2->va) % 128;
else
p1 = (l2->vs - l2->va) % 8;
@@ -1445,7 +1445,7 @@ static void
l2_st14_persistent_da(struct FsmInst *fi, int event, void *arg)
{
struct PStack *st = fi->userdata;
skb_queue_purge(&st->l2.i_queue);
skb_queue_purge(&st->l2.ui_queue);
if (test_and_clear_bit(FLG_ESTAB_PEND, &st->l2.flag))
@@ -1495,7 +1495,7 @@ l2_set_own_busy(struct FsmInst *fi, int event, void *arg)
{
struct PStack *st = fi->userdata;
if(!test_and_set_bit(FLG_OWN_BUSY, &st->l2.flag)) {
if (!test_and_set_bit(FLG_OWN_BUSY, &st->l2.flag)) {
enquiry_cr(st, RNR, RSP, 0);
test_and_clear_bit(FLG_ACK_PEND, &st->l2.flag);
}
@@ -1506,7 +1506,7 @@ l2_clear_own_busy(struct FsmInst *fi, int event, void *arg)
{
struct PStack *st = fi->userdata;
if(!test_and_clear_bit(FLG_OWN_BUSY, &st->l2.flag)) {
if (!test_and_clear_bit(FLG_OWN_BUSY, &st->l2.flag)) {
enquiry_cr(st, RR, RSP, 0);
test_and_clear_bit(FLG_ACK_PEND, &st->l2.flag);
}
@@ -1631,76 +1631,76 @@ isdnl2_l1l2(struct PStack *st, int pr, void *arg)
int c = 0;
switch (pr) {
case (PH_DATA | INDICATION):
datap = skb->data;
len = l2addrsize(&st->l2);
if (skb->len > len)
datap += len;
else {
FsmEvent(&st->l2.l2m, EV_L2_FRAME_ERROR, (void *) 'N');
dev_kfree_skb(skb);
return;
}
if (!(*datap & 1)) { /* I-Frame */
if(!(c = iframe_error(st, skb)))
ret = FsmEvent(&st->l2.l2m, EV_L2_I, skb);
} else if (IsSFrame(datap, st)) { /* S-Frame */
if(!(c = super_error(st, skb)))
ret = FsmEvent(&st->l2.l2m, EV_L2_SUPER, skb);
} else if (IsUI(datap)) {
if(!(c = UI_error(st, skb)))
ret = FsmEvent(&st->l2.l2m, EV_L2_UI, skb);
} else if (IsSABME(datap, st)) {
if(!(c = unnum_error(st, skb, CMD)))
ret = FsmEvent(&st->l2.l2m, EV_L2_SABME, skb);
} else if (IsUA(datap)) {
if(!(c = unnum_error(st, skb, RSP)))
ret = FsmEvent(&st->l2.l2m, EV_L2_UA, skb);
} else if (IsDISC(datap)) {
if(!(c = unnum_error(st, skb, CMD)))
ret = FsmEvent(&st->l2.l2m, EV_L2_DISC, skb);
} else if (IsDM(datap)) {
if(!(c = unnum_error(st, skb, RSP)))
ret = FsmEvent(&st->l2.l2m, EV_L2_DM, skb);
} else if (IsFRMR(datap)) {
if(!(c = FRMR_error(st,skb)))
ret = FsmEvent(&st->l2.l2m, EV_L2_FRMR, skb);
} else {
FsmEvent(&st->l2.l2m, EV_L2_FRAME_ERROR, (void *) 'L');
dev_kfree_skb(skb);
ret = 0;
}
if(c) {
dev_kfree_skb(skb);
FsmEvent(&st->l2.l2m, EV_L2_FRAME_ERROR, (void *)(long)c);
ret = 0;
}
if (ret)
dev_kfree_skb(skb);
break;
case (PH_PULL | CONFIRM):
FsmEvent(&st->l2.l2m, EV_L2_ACK_PULL, arg);
break;
case (PH_PAUSE | INDICATION):
test_and_set_bit(FLG_DCHAN_BUSY, &st->l2.flag);
break;
case (PH_PAUSE | CONFIRM):
test_and_clear_bit(FLG_DCHAN_BUSY, &st->l2.flag);
break;
case (PH_ACTIVATE | CONFIRM):
case (PH_ACTIVATE | INDICATION):
test_and_set_bit(FLG_L1_ACTIV, &st->l2.flag);
if (test_and_clear_bit(FLG_ESTAB_PEND, &st->l2.flag))
FsmEvent(&st->l2.l2m, EV_L2_DL_ESTABLISH_REQ, arg);
break;
case (PH_DEACTIVATE | INDICATION):
case (PH_DEACTIVATE | CONFIRM):
test_and_clear_bit(FLG_L1_ACTIV, &st->l2.flag);
FsmEvent(&st->l2.l2m, EV_L1_DEACTIVATE, arg);
break;
default:
l2m_debug(&st->l2.l2m, "l2 unknown pr %04x", pr);
break;
case (PH_DATA | INDICATION):
datap = skb->data;
len = l2addrsize(&st->l2);
if (skb->len > len)
datap += len;
else {
FsmEvent(&st->l2.l2m, EV_L2_FRAME_ERROR, (void *) 'N');
dev_kfree_skb(skb);
return;
}
if (!(*datap & 1)) { /* I-Frame */
if (!(c = iframe_error(st, skb)))
ret = FsmEvent(&st->l2.l2m, EV_L2_I, skb);
} else if (IsSFrame(datap, st)) { /* S-Frame */
if (!(c = super_error(st, skb)))
ret = FsmEvent(&st->l2.l2m, EV_L2_SUPER, skb);
} else if (IsUI(datap)) {
if (!(c = UI_error(st, skb)))
ret = FsmEvent(&st->l2.l2m, EV_L2_UI, skb);
} else if (IsSABME(datap, st)) {
if (!(c = unnum_error(st, skb, CMD)))
ret = FsmEvent(&st->l2.l2m, EV_L2_SABME, skb);
} else if (IsUA(datap)) {
if (!(c = unnum_error(st, skb, RSP)))
ret = FsmEvent(&st->l2.l2m, EV_L2_UA, skb);
} else if (IsDISC(datap)) {
if (!(c = unnum_error(st, skb, CMD)))
ret = FsmEvent(&st->l2.l2m, EV_L2_DISC, skb);
} else if (IsDM(datap)) {
if (!(c = unnum_error(st, skb, RSP)))
ret = FsmEvent(&st->l2.l2m, EV_L2_DM, skb);
} else if (IsFRMR(datap)) {
if (!(c = FRMR_error(st, skb)))
ret = FsmEvent(&st->l2.l2m, EV_L2_FRMR, skb);
} else {
FsmEvent(&st->l2.l2m, EV_L2_FRAME_ERROR, (void *) 'L');
dev_kfree_skb(skb);
ret = 0;
}
if (c) {
dev_kfree_skb(skb);
FsmEvent(&st->l2.l2m, EV_L2_FRAME_ERROR, (void *)(long)c);
ret = 0;
}
if (ret)
dev_kfree_skb(skb);
break;
case (PH_PULL | CONFIRM):
FsmEvent(&st->l2.l2m, EV_L2_ACK_PULL, arg);
break;
case (PH_PAUSE | INDICATION):
test_and_set_bit(FLG_DCHAN_BUSY, &st->l2.flag);
break;
case (PH_PAUSE | CONFIRM):
test_and_clear_bit(FLG_DCHAN_BUSY, &st->l2.flag);
break;
case (PH_ACTIVATE | CONFIRM):
case (PH_ACTIVATE | INDICATION):
test_and_set_bit(FLG_L1_ACTIV, &st->l2.flag);
if (test_and_clear_bit(FLG_ESTAB_PEND, &st->l2.flag))
FsmEvent(&st->l2.l2m, EV_L2_DL_ESTABLISH_REQ, arg);
break;
case (PH_DEACTIVATE | INDICATION):
case (PH_DEACTIVATE | CONFIRM):
test_and_clear_bit(FLG_L1_ACTIV, &st->l2.flag);
FsmEvent(&st->l2.l2m, EV_L1_DEACTIVATE, arg);
break;
default:
l2m_debug(&st->l2.l2m, "l2 unknown pr %04x", pr);
break;
}
}
@@ -1708,45 +1708,45 @@ static void
isdnl2_l3l2(struct PStack *st, int pr, void *arg)
{
switch (pr) {
case (DL_DATA | REQUEST):
if (FsmEvent(&st->l2.l2m, EV_L2_DL_DATA, arg)) {
dev_kfree_skb((struct sk_buff *) arg);
case (DL_DATA | REQUEST):
if (FsmEvent(&st->l2.l2m, EV_L2_DL_DATA, arg)) {
dev_kfree_skb((struct sk_buff *) arg);
}
break;
case (DL_UNIT_DATA | REQUEST):
if (FsmEvent(&st->l2.l2m, EV_L2_DL_UNIT_DATA, arg)) {
dev_kfree_skb((struct sk_buff *) arg);
}
break;
case (DL_ESTABLISH | REQUEST):
if (test_bit(FLG_L1_ACTIV, &st->l2.flag)) {
if (test_bit(FLG_LAPD, &st->l2.flag) ||
test_bit(FLG_ORIG, &st->l2.flag)) {
FsmEvent(&st->l2.l2m, EV_L2_DL_ESTABLISH_REQ, arg);
}
break;
case (DL_UNIT_DATA | REQUEST):
if (FsmEvent(&st->l2.l2m, EV_L2_DL_UNIT_DATA, arg)) {
dev_kfree_skb((struct sk_buff *) arg);
} else {
if (test_bit(FLG_LAPD, &st->l2.flag) ||
test_bit(FLG_ORIG, &st->l2.flag)) {
test_and_set_bit(FLG_ESTAB_PEND, &st->l2.flag);
}
break;
case (DL_ESTABLISH | REQUEST):
if (test_bit(FLG_L1_ACTIV, &st->l2.flag)) {
if (test_bit(FLG_LAPD, &st->l2.flag) ||
test_bit(FLG_ORIG, &st->l2.flag)) {
FsmEvent(&st->l2.l2m, EV_L2_DL_ESTABLISH_REQ, arg);
}
} else {
if (test_bit(FLG_LAPD, &st->l2.flag) ||
test_bit(FLG_ORIG, &st->l2.flag)) {
test_and_set_bit(FLG_ESTAB_PEND, &st->l2.flag);
}
st->l2.l2l1(st, PH_ACTIVATE, NULL);
}
break;
case (DL_RELEASE | REQUEST):
if (test_bit(FLG_LAPB, &st->l2.flag)) {
st->l2.l2l1(st, PH_DEACTIVATE, NULL);
}
FsmEvent(&st->l2.l2m, EV_L2_DL_RELEASE_REQ, arg);
break;
case (MDL_ASSIGN | REQUEST):
FsmEvent(&st->l2.l2m, EV_L2_MDL_ASSIGN, arg);
break;
case (MDL_REMOVE | REQUEST):
FsmEvent(&st->l2.l2m, EV_L2_MDL_REMOVE, arg);
break;
case (MDL_ERROR | RESPONSE):
FsmEvent(&st->l2.l2m, EV_L2_MDL_ERROR, arg);
break;
st->l2.l2l1(st, PH_ACTIVATE, NULL);
}
break;
case (DL_RELEASE | REQUEST):
if (test_bit(FLG_LAPB, &st->l2.flag)) {
st->l2.l2l1(st, PH_DEACTIVATE, NULL);
}
FsmEvent(&st->l2.l2m, EV_L2_DL_RELEASE_REQ, arg);
break;
case (MDL_ASSIGN | REQUEST):
FsmEvent(&st->l2.l2m, EV_L2_MDL_ASSIGN, arg);
break;
case (MDL_REMOVE | REQUEST):
FsmEvent(&st->l2.l2m, EV_L2_MDL_REMOVE, arg);
break;
case (MDL_ERROR | RESPONSE):
FsmEvent(&st->l2.l2m, EV_L2_MDL_ERROR, arg);
break;
}
}
@@ -1787,7 +1787,7 @@ setstack_isdnl2(struct PStack *st, char *debug_id)
if (test_bit(FLG_LAPB, &st->l2.flag))
st->l2.l2m.state = ST_L2_4;
else
st->l2.l2m.state = ST_L2_1;
st->l2.l2m.state = ST_L2_1;
st->l2.l2m.debug = 0;
st->l2.l2m.userdata = st;
st->l2.l2m.userint = 0;
@@ -1802,16 +1802,16 @@ static void
transl2_l3l2(struct PStack *st, int pr, void *arg)
{
switch (pr) {
case (DL_DATA | REQUEST):
case (DL_UNIT_DATA | REQUEST):
st->l2.l2l1(st, PH_DATA | REQUEST, arg);
break;
case (DL_ESTABLISH | REQUEST):
st->l2.l2l1(st, PH_ACTIVATE | REQUEST, NULL);
break;
case (DL_RELEASE | REQUEST):
st->l2.l2l1(st, PH_DEACTIVATE | REQUEST, NULL);
break;
case (DL_DATA | REQUEST):
case (DL_UNIT_DATA | REQUEST):
st->l2.l2l1(st, PH_DATA | REQUEST, arg);
break;
case (DL_ESTABLISH | REQUEST):
st->l2.l2l1(st, PH_ACTIVATE | REQUEST, NULL);
break;
case (DL_RELEASE | REQUEST):
st->l2.l2l1(st, PH_DEACTIVATE | REQUEST, NULL);
break;
}
}

Visa fil

@@ -23,4 +23,3 @@
#define RSP 1
#define LC_FLUSH_WAIT 1

Visa fil

@@ -3,7 +3,7 @@
* Author Karsten Keil
* based on the teles driver from Jan den Ouden
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -27,12 +27,12 @@ static struct Fsm l3fsm;
enum {
ST_L3_LC_REL,
ST_L3_LC_ESTAB_WAIT,
ST_L3_LC_REL_DELAY,
ST_L3_LC_REL_DELAY,
ST_L3_LC_REL_WAIT,
ST_L3_LC_ESTAB,
};
#define L3_STATE_COUNT (ST_L3_LC_ESTAB+1)
#define L3_STATE_COUNT (ST_L3_LC_ESTAB + 1)
static char *strL3State[] =
{
@@ -53,7 +53,7 @@ enum {
EV_TIMEOUT,
};
#define L3_EVENT_COUNT (EV_TIMEOUT+1)
#define L3_EVENT_COUNT (EV_TIMEOUT + 1)
static char *strL3Event[] =
{
@@ -67,7 +67,7 @@ static char *strL3Event[] =
};
static __printf(2, 3) void
l3m_debug(struct FsmInst *fi, char *fmt, ...)
l3m_debug(struct FsmInst *fi, char *fmt, ...)
{
va_list args;
struct PStack *st = fi->userdata;
@@ -78,7 +78,7 @@ l3m_debug(struct FsmInst *fi, char *fmt, ...)
}
u_char *
findie(u_char * p, int size, u_char ie, int wanted_set)
findie(u_char *p, int size, u_char ie, int wanted_set)
{
int l, codeset, maincodeset;
u_char *pend = p + size;
@@ -102,14 +102,14 @@ findie(u_char * p, int size, u_char ie, int wanted_set)
else {
if (codeset == wanted_set) {
if (*p == ie)
{ /* improved length check (Werner Cornelius) */
if ((pend - p) < 2)
return(NULL);
if (*(p+1) > (pend - (p+2)))
return(NULL);
return (p);
}
{ /* improved length check (Werner Cornelius) */
if ((pend - p) < 2)
return (NULL);
if (*(p + 1) > (pend - (p + 2)))
return (NULL);
return (p);
}
if (*p > ie)
return (NULL);
}
@@ -123,16 +123,16 @@ findie(u_char * p, int size, u_char ie, int wanted_set)
}
int
getcallref(u_char * p)
getcallref(u_char *p)
{
int l, cr = 0;
p++; /* prot discr */
if (*p & 0xfe) /* wrong callref BRI only 1 octet*/
return(-2);
return (-2);
l = 0xf & *p++; /* callref length */
if (!l) /* dummy CallRef */
return(-1);
return (-1);
cr = *p++;
return (cr);
}
@@ -153,7 +153,7 @@ void
newl3state(struct l3_process *pc, int state)
{
if (pc->debug & L3_DEB_STATE)
l3_debug(pc->st, "newstate cr %d %d --> %d",
l3_debug(pc->st, "newstate cr %d %d --> %d",
pc->callref & 0x7F,
pc->state, state);
pc->state = state;
@@ -228,8 +228,8 @@ no_l3_proto(struct PStack *st, int pr, void *arg)
static int
no_l3_proto_spec(struct PStack *st, isdn_ctrl *ic)
{
printk(KERN_WARNING "HiSax: no specific protocol handler for proto %lu\n",ic->arg & 0xFF);
return(-1);
printk(KERN_WARNING "HiSax: no specific protocol handler for proto %lu\n", ic->arg & 0xFF);
return (-1);
}
struct l3_process
@@ -287,7 +287,7 @@ release_l3_process(struct l3_process *p)
if (pp)
pp->next = np->next;
else if (!(p->st->l3.proc = np->next) &&
!test_bit(FLG_PTP, &p->st->l2.flag)) {
!test_bit(FLG_PTP, &p->st->l2.flag)) {
if (p->debug)
l3_debug(p->st, "release_l3_process: last process");
if (skb_queue_empty(&p->st->l3.squeue)) {
@@ -301,7 +301,7 @@ release_l3_process(struct l3_process *p)
if (p->debug)
l3_debug(p->st, "release_l3_process: not release link");
}
}
}
kfree(p);
return;
}
@@ -340,42 +340,42 @@ setstack_l3dc(struct PStack *st, struct Channel *chanp)
st->l3.l3m.userdata = st;
st->l3.l3m.userint = 0;
st->l3.l3m.printdebug = l3m_debug;
FsmInitTimer(&st->l3.l3m, &st->l3.l3m_timer);
FsmInitTimer(&st->l3.l3m, &st->l3.l3m_timer);
strcpy(st->l3.debug_id, "L3DC ");
st->lli.l4l3_proto = no_l3_proto_spec;
#ifdef CONFIG_HISAX_EURO
#ifdef CONFIG_HISAX_EURO
if (st->protocol == ISDN_PTYPE_EURO) {
setstack_dss1(st);
} else
#endif
#ifdef CONFIG_HISAX_NI1
if (st->protocol == ISDN_PTYPE_NI1) {
setstack_ni1(st);
} else
#ifdef CONFIG_HISAX_NI1
if (st->protocol == ISDN_PTYPE_NI1) {
setstack_ni1(st);
} else
#endif
#ifdef CONFIG_HISAX_1TR6
if (st->protocol == ISDN_PTYPE_1TR6) {
setstack_1tr6(st);
} else
#ifdef CONFIG_HISAX_1TR6
if (st->protocol == ISDN_PTYPE_1TR6) {
setstack_1tr6(st);
} else
#endif
if (st->protocol == ISDN_PTYPE_LEASED) {
st->lli.l4l3 = no_l3_proto;
st->l2.l2l3 = no_l3_proto;
st->l3.l3ml3 = no_l3_proto;
printk(KERN_INFO "HiSax: Leased line mode\n");
} else {
st->lli.l4l3 = no_l3_proto;
st->l2.l2l3 = no_l3_proto;
st->l3.l3ml3 = no_l3_proto;
sprintf(tmp, "protocol %s not supported",
(st->protocol == ISDN_PTYPE_1TR6) ? "1tr6" :
(st->protocol == ISDN_PTYPE_EURO) ? "euro" :
(st->protocol == ISDN_PTYPE_NI1) ? "ni1" :
"unknown");
printk(KERN_WARNING "HiSax: %s\n", tmp);
st->protocol = -1;
}
if (st->protocol == ISDN_PTYPE_LEASED) {
st->lli.l4l3 = no_l3_proto;
st->l2.l2l3 = no_l3_proto;
st->l3.l3ml3 = no_l3_proto;
printk(KERN_INFO "HiSax: Leased line mode\n");
} else {
st->lli.l4l3 = no_l3_proto;
st->l2.l2l3 = no_l3_proto;
st->l3.l3ml3 = no_l3_proto;
sprintf(tmp, "protocol %s not supported",
(st->protocol == ISDN_PTYPE_1TR6) ? "1tr6" :
(st->protocol == ISDN_PTYPE_EURO) ? "euro" :
(st->protocol == ISDN_PTYPE_NI1) ? "ni1" :
"unknown");
printk(KERN_WARNING "HiSax: %s\n", tmp);
st->protocol = -1;
}
}
static void
@@ -469,22 +469,22 @@ lc_connected(struct FsmInst *fi, int event, void *arg)
static void
lc_start_delay(struct FsmInst *fi, int event, void *arg)
{
struct PStack *st = fi->userdata;
struct PStack *st = fi->userdata;
FsmChangeState(fi, ST_L3_LC_REL_DELAY);
FsmAddTimer(&st->l3.l3m_timer, DREL_TIMER_VALUE, EV_TIMEOUT, NULL, 50);
FsmChangeState(fi, ST_L3_LC_REL_DELAY);
FsmAddTimer(&st->l3.l3m_timer, DREL_TIMER_VALUE, EV_TIMEOUT, NULL, 50);
}
static void
lc_start_delay_check(struct FsmInst *fi, int event, void *arg)
/* 20/09/00 - GE timer not user for NI-1 as layer 2 should stay up */
{
struct PStack *st = fi->userdata;
struct PStack *st = fi->userdata;
FsmChangeState(fi, ST_L3_LC_REL_DELAY);
/* 19/09/00 - GE timer not user for NI-1 */
if (st->protocol != ISDN_PTYPE_NI1)
FsmAddTimer(&st->l3.l3m_timer, DREL_TIMER_VALUE, EV_TIMEOUT, NULL, 50);
FsmChangeState(fi, ST_L3_LC_REL_DELAY);
/* 19/09/00 - GE timer not user for NI-1 */
if (st->protocol != ISDN_PTYPE_NI1)
FsmAddTimer(&st->l3.l3m_timer, DREL_TIMER_VALUE, EV_TIMEOUT, NULL, 50);
}
static void
@@ -536,9 +536,9 @@ static struct FsmNode L3FnList[] __initdata =
{ST_L3_LC_ESTAB_WAIT, EV_RELEASE_IND, lc_release_ind},
{ST_L3_LC_ESTAB, EV_RELEASE_IND, lc_release_ind},
{ST_L3_LC_ESTAB, EV_RELEASE_REQ, lc_start_delay_check},
{ST_L3_LC_REL_DELAY, EV_RELEASE_IND, lc_release_ind},
{ST_L3_LC_REL_DELAY, EV_ESTABLISH_REQ, lc_connected},
{ST_L3_LC_REL_DELAY, EV_TIMEOUT, lc_release_req},
{ST_L3_LC_REL_DELAY, EV_RELEASE_IND, lc_release_ind},
{ST_L3_LC_REL_DELAY, EV_ESTABLISH_REQ, lc_connected},
{ST_L3_LC_REL_DELAY, EV_TIMEOUT, lc_release_req},
{ST_L3_LC_REL_WAIT, EV_RELEASE_CNF, lc_release_cnf},
{ST_L3_LC_REL_WAIT, EV_ESTABLISH_REQ, lc_activate},
};
@@ -548,34 +548,34 @@ void
l3_msg(struct PStack *st, int pr, void *arg)
{
switch (pr) {
case (DL_DATA | REQUEST):
if (st->l3.l3m.state == ST_L3_LC_ESTAB) {
st->l3.l3l2(st, pr, arg);
} else {
struct sk_buff *skb = arg;
case (DL_DATA | REQUEST):
if (st->l3.l3m.state == ST_L3_LC_ESTAB) {
st->l3.l3l2(st, pr, arg);
} else {
struct sk_buff *skb = arg;
skb_queue_tail(&st->l3.squeue, skb);
FsmEvent(&st->l3.l3m, EV_ESTABLISH_REQ, NULL);
}
break;
case (DL_ESTABLISH | REQUEST):
skb_queue_tail(&st->l3.squeue, skb);
FsmEvent(&st->l3.l3m, EV_ESTABLISH_REQ, NULL);
break;
case (DL_ESTABLISH | CONFIRM):
FsmEvent(&st->l3.l3m, EV_ESTABLISH_CNF, NULL);
break;
case (DL_ESTABLISH | INDICATION):
FsmEvent(&st->l3.l3m, EV_ESTABLISH_IND, NULL);
break;
case (DL_RELEASE | INDICATION):
FsmEvent(&st->l3.l3m, EV_RELEASE_IND, NULL);
break;
case (DL_RELEASE | CONFIRM):
FsmEvent(&st->l3.l3m, EV_RELEASE_CNF, NULL);
break;
case (DL_RELEASE | REQUEST):
FsmEvent(&st->l3.l3m, EV_RELEASE_REQ, NULL);
break;
}
break;
case (DL_ESTABLISH | REQUEST):
FsmEvent(&st->l3.l3m, EV_ESTABLISH_REQ, NULL);
break;
case (DL_ESTABLISH | CONFIRM):
FsmEvent(&st->l3.l3m, EV_ESTABLISH_CNF, NULL);
break;
case (DL_ESTABLISH | INDICATION):
FsmEvent(&st->l3.l3m, EV_ESTABLISH_IND, NULL);
break;
case (DL_RELEASE | INDICATION):
FsmEvent(&st->l3.l3m, EV_RELEASE_IND, NULL);
break;
case (DL_RELEASE | CONFIRM):
FsmEvent(&st->l3.l3m, EV_RELEASE_CNF, NULL);
break;
case (DL_RELEASE | REQUEST):
FsmEvent(&st->l3.l3m, EV_RELEASE_REQ, NULL);
break;
}
}

Visa fil

@@ -5,7 +5,7 @@
*
*/
#define SBIT(state) (1<<state)
#define SBIT(state) (1 << state)
#define ALL_STATES 0x03ffffff
#define PROTO_DIS_EURO 0x08
@@ -40,4 +40,3 @@ void l3_msg(struct PStack *st, int pr, void *arg);
void setstack_dss1(struct PStack *st);
void setstack_ni1(struct PStack *st);
void setstack_1tr6(struct PStack *st);

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -19,7 +19,7 @@
static const char *ISurf_revision = "$Revision: 1.12.2.4 $";
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
#define ISURF_ISAR_RESET 1
@@ -46,7 +46,7 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
register int i;
for (i = 0; i < size; i++)
@@ -54,11 +54,11 @@ ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
register int i;
for (i = 0; i < size; i++){
writeb(data[i], cs->hw.isurf.isac);mb();
for (i = 0; i < size; i++) {
writeb(data[i], cs->hw.isurf.isac); mb();
}
}
@@ -67,17 +67,17 @@ WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
* mode = 1 access with IRQ off
* mode = 2 access with IRQ off and using last offset
*/
static u_char
ReadISAR(struct IsdnCardState *cs, int mode, u_char offset)
{
return(readb(cs->hw.isurf.isar + offset));
{
return (readb(cs->hw.isurf.isar + offset));
}
static void
WriteISAR(struct IsdnCardState *cs, int mode, u_char offset, u_char value)
{
writeb(value, cs->hw.isurf.isar + offset);mb();
writeb(value, cs->hw.isurf.isar + offset); mb();
}
static irqreturn_t
@@ -90,11 +90,11 @@ isurf_interrupt(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
val = readb(cs->hw.isurf.isar + ISAR_IRQBIT);
Start_ISAR:
Start_ISAR:
if (val & ISAR_IRQSTA)
isar_int_main(cs);
val = readb(cs->hw.isurf.isac + ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readb(cs->hw.isurf.isar + ISAR_IRQBIT);
@@ -113,8 +113,8 @@ isurf_interrupt(int intno, void *dev_id)
printk(KERN_WARNING "ISurf IRQ LOOP\n");
writeb(0, cs->hw.isurf.isar + ISAR_IRQBIT); mb();
writeb(0xFF, cs->hw.isurf.isac + ISAC_MASK);mb();
writeb(0, cs->hw.isurf.isac + ISAC_MASK);mb();
writeb(0xFF, cs->hw.isurf.isac + ISAC_MASK); mb();
writeb(0, cs->hw.isurf.isac + ISAC_MASK); mb();
writeb(ISAR_IRQMSK, cs->hw.isurf.isar + ISAR_IRQBIT); mb();
spin_unlock_irqrestore(&cs->lock, flags);
return IRQ_HANDLED;
@@ -145,31 +145,31 @@ ISurf_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_isurf(cs, ISURF_RESET);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_isurf(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
reset_isurf(cs, ISURF_RESET);
clear_pending_isac_ints(cs);
writeb(0, cs->hw.isurf.isar+ISAR_IRQBIT);mb();
initisac(cs);
initisar(cs);
/* Reenable ISAC IRQ */
cs->writeisac(cs, ISAC_MASK, 0);
/* RESET Receiver and Transmitter */
cs->writeisac(cs, ISAC_CMDR, 0x41);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_isurf(cs, ISURF_RESET);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_isurf(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
reset_isurf(cs, ISURF_RESET);
clear_pending_isac_ints(cs);
writeb(0, cs->hw.isurf.isar + ISAR_IRQBIT); mb();
initisac(cs);
initisar(cs);
/* Reenable ISAC IRQ */
cs->writeisac(cs, ISAC_MASK, 0);
/* RESET Receiver and Transmitter */
cs->writeisac(cs, ISAC_CMDR, 0x41);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
static int
@@ -182,15 +182,15 @@ isurf_auxcmd(struct IsdnCardState *cs, isdn_ctrl *ic) {
spin_lock_irqsave(&cs->lock, flags);
if (!ret) {
reset_isurf(cs, ISURF_ISAR_EA | ISURF_ISAC_RESET |
ISURF_ARCOFI_RESET);
ISURF_ARCOFI_RESET);
initisac(cs);
cs->writeisac(cs, ISAC_MASK, 0);
cs->writeisac(cs, ISAC_CMDR, 0x41);
}
spin_unlock_irqrestore(&cs->lock, flags);
return(ret);
return (ret);
}
return(isar_auxcmd(cs, ic));
return (isar_auxcmd(cs, ic));
}
#ifdef __ISAPNP__
@@ -206,9 +206,9 @@ setup_isurf(struct IsdnCard *card)
strcpy(tmp, ISurf_revision);
printk(KERN_INFO "HiSax: ISurf driver Rev. %s\n", HiSax_getrev(tmp));
if (cs->typ != ISDN_CTYPE_ISURF)
return(0);
if (cs->typ != ISDN_CTYPE_ISURF)
return (0);
if (card->para[1] && card->para[2]) {
cs->hw.isurf.reset = card->para[1];
cs->hw.isurf.phymem = card->para[2];
@@ -221,11 +221,11 @@ setup_isurf(struct IsdnCard *card)
cs->subtyp = 0;
if ((pnp_c = pnp_find_card(
ISAPNP_VENDOR('S', 'I', 'E'),
ISAPNP_FUNCTION(0x0010), pnp_c))) {
ISAPNP_VENDOR('S', 'I', 'E'),
ISAPNP_FUNCTION(0x0010), pnp_c))) {
if (!(pnp_d = pnp_find_dev(pnp_c,
ISAPNP_VENDOR('S', 'I', 'E'),
ISAPNP_FUNCTION(0x0010), pnp_d))) {
ISAPNP_VENDOR('S', 'I', 'E'),
ISAPNP_FUNCTION(0x0010), pnp_d))) {
printk(KERN_ERR "ISurfPnP: PnP error card found, no device\n");
return (0);
}
@@ -236,17 +236,17 @@ setup_isurf(struct IsdnCard *card)
cs->irq = pnp_irq(pnp_d, 0);
if (!cs->irq || !cs->hw.isurf.reset || !cs->hw.isurf.phymem) {
printk(KERN_ERR "ISurfPnP:some resources are missing %d/%x/%lx\n",
cs->irq, cs->hw.isurf.reset, cs->hw.isurf.phymem);
cs->irq, cs->hw.isurf.reset, cs->hw.isurf.phymem);
pnp_disable_dev(pnp_d);
return(0);
return (0);
}
} else {
printk(KERN_INFO "ISurfPnP: no ISAPnP card found\n");
return(0);
return (0);
}
} else {
printk(KERN_INFO "ISurfPnP: no ISAPnP bus found\n");
return(0);
return (0);
}
#else
printk(KERN_WARNING "HiSax: Siemens I-Surf port/mem not set\n");
@@ -255,15 +255,15 @@ setup_isurf(struct IsdnCard *card)
}
if (!request_region(cs->hw.isurf.reset, 1, "isurf isdn")) {
printk(KERN_WARNING
"HiSax: Siemens I-Surf config port %x already in use\n",
cs->hw.isurf.reset);
return (0);
"HiSax: Siemens I-Surf config port %x already in use\n",
cs->hw.isurf.reset);
return (0);
}
if (!request_region(cs->hw.isurf.phymem, ISURF_IOMEM_SIZE, "isurf iomem")) {
printk(KERN_WARNING "HiSax: Siemens I-Surf memory region "
"%lx-%lx already in use\n",
cs->hw.isurf.phymem,
cs->hw.isurf.phymem + ISURF_IOMEM_SIZE);
"%lx-%lx already in use\n",
cs->hw.isurf.phymem,
cs->hw.isurf.phymem + ISURF_IOMEM_SIZE);
release_region(cs->hw.isurf.reset, 1);
return (0);
}
@@ -293,7 +293,7 @@ setup_isurf(struct IsdnCard *card)
ver = ISARVersion(cs, "ISurf:");
if (ver < 0) {
printk(KERN_WARNING
"ISurf: wrong ISAR version (ret = %d)\n", ver);
"ISurf: wrong ISAR version (ret = %d)\n", ver);
release_io_isurf(cs);
return (0);
}

Visa fil

@@ -7,7 +7,7 @@
* Copyright by Klaus-Peter Nischke, ITK AG
* <klaus@nischke.do.eunet.de>
* by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -26,7 +26,7 @@
static const char *ix1_revision = "$Revision: 2.12.2.4 $";
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
#define SPECIAL_PORT_OFFSET 3
@@ -49,7 +49,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
}
static inline void
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
insb(adr, data, size);
@@ -64,7 +64,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
}
static inline void
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
outsb(adr, data, size);
@@ -85,13 +85,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size);
}
@@ -110,16 +110,16 @@ WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
cs->hw.ix1.hscx, offset + (hscx ? 0x40 : 0), value);
}
#define READHSCX(cs, nr, reg) readreg(cs->hw.ix1.hscx_ale, \
cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ix1.hscx_ale, \
cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCX(cs, nr, reg) readreg(cs->hw.ix1.hscx_ale, \
cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ix1.hscx_ale, \
cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ix1.hscx_ale, \
cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ix1.hscx_ale, \
cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ix1.hscx_ale, \
cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ix1.hscx_ale, \
cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt)
#include "hscx_irq.c"
@@ -132,11 +132,11 @@ ix1micro_interrupt(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);
Start_HSCX:
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);
@@ -188,33 +188,33 @@ ix1_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
ix1_reset(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_ix1micro(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
ix1_reset(cs);
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
ix1_reset(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_ix1micro(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
ix1_reset(cs);
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
#ifdef __ISAPNP__
static struct isapnp_device_id itk_ids[] __devinitdata = {
{ ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x25),
ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x25),
ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x25),
(unsigned long) "ITK micro 2" },
{ ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x29),
ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x29),
ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x29),
(unsigned long) "ITK micro 2." },
{ 0, }
};
@@ -238,30 +238,30 @@ setup_ix1micro(struct IsdnCard *card)
#ifdef __ISAPNP__
if (!card->para[1] && isapnp_present()) {
struct pnp_dev *pnp_d;
while(ipid->card_vendor) {
while (ipid->card_vendor) {
if ((pnp_c = pnp_find_card(ipid->card_vendor,
ipid->card_device, pnp_c))) {
ipid->card_device, pnp_c))) {
pnp_d = NULL;
if ((pnp_d = pnp_find_dev(pnp_c,
ipid->vendor, ipid->function, pnp_d))) {
ipid->vendor, ipid->function, pnp_d))) {
int err;
printk(KERN_INFO "HiSax: %s detected\n",
(char *)ipid->driver_data);
(char *)ipid->driver_data);
pnp_disable_dev(pnp_d);
err = pnp_activate_dev(pnp_d);
if (err<0) {
if (err < 0) {
printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
__func__, err);
return(0);
__func__, err);
return (0);
}
card->para[1] = pnp_port_start(pnp_d, 0);
card->para[0] = pnp_irq(pnp_d, 0);
if (!card->para[0] || !card->para[1]) {
printk(KERN_ERR "ITK PnP:some resources are missing %ld/%lx\n",
card->para[0], card->para[1]);
card->para[0], card->para[1]);
pnp_disable_dev(pnp_d);
return(0);
return (0);
}
break;
} else {
@@ -270,10 +270,10 @@ setup_ix1micro(struct IsdnCard *card)
}
ipid++;
pnp_c = NULL;
}
}
if (!ipid->card_vendor) {
printk(KERN_INFO "ITK PnP: no ISAPnP card found\n");
return(0);
return (0);
}
}
#endif
@@ -287,15 +287,15 @@ setup_ix1micro(struct IsdnCard *card)
if (cs->hw.ix1.cfg_reg) {
if (!request_region(cs->hw.ix1.cfg_reg, 4, "ix1micro cfg")) {
printk(KERN_WARNING
"HiSax: ITK ix1-micro Rev.2 config port "
"%x-%x already in use\n",
"HiSax: ITK ix1-micro Rev.2 config port "
"%x-%x already in use\n",
cs->hw.ix1.cfg_reg,
cs->hw.ix1.cfg_reg + 4);
return (0);
}
}
printk(KERN_INFO "HiSax: ITK ix1-micro Rev.2 config irq:%d io:0x%X\n",
cs->irq, cs->hw.ix1.cfg_reg);
cs->irq, cs->hw.ix1.cfg_reg);
setup_isac(cs);
cs->readisac = &ReadISAC;
cs->writeisac = &WriteISAC;
@@ -309,7 +309,7 @@ setup_ix1micro(struct IsdnCard *card)
ISACVersion(cs, "ix1-Micro:");
if (HscxVersion(cs, "ix1-Micro:")) {
printk(KERN_WARNING
"ix1-Micro: wrong HSCX versions check IO address\n");
"ix1-Micro: wrong HSCX versions check IO address\n");
release_io_ix1micro(cs);
return (0);
}

Visa fil

@@ -4,7 +4,7 @@
*
* Author Roland Klabunde
* Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -23,53 +23,53 @@
int
JadeVersion(struct IsdnCardState *cs, char *s)
{
int ver;
int to = 50;
cs->BC_Write_Reg(cs, -1, 0x50, 0x19);
while (to) {
udelay(1);
int ver;
int to = 50;
cs->BC_Write_Reg(cs, -1, 0x50, 0x19);
while (to) {
udelay(1);
ver = cs->BC_Read_Reg(cs, -1, 0x60);
to--;
if (ver)
break;
if (!to) {
printk(KERN_INFO "%s JADE version not obtainable\n", s);
return (0);
}
}
/* Wait for the JADE */
udelay(10);
/* Read version */
ver = cs->BC_Read_Reg(cs, -1, 0x60);
to--;
if (ver)
break;
if (!to) {
printk(KERN_INFO "%s JADE version not obtainable\n", s);
return (0);
}
}
/* Wait for the JADE */
udelay(10);
/* Read version */
ver = cs->BC_Read_Reg(cs, -1, 0x60);
printk(KERN_INFO "%s JADE version: %d\n", s, ver);
return (1);
printk(KERN_INFO "%s JADE version: %d\n", s, ver);
return (1);
}
/* Write to indirect accessible jade register set */
static void
jade_write_indirect(struct IsdnCardState *cs, u_char reg, u_char value)
{
int to = 50;
u_char ret;
int to = 50;
u_char ret;
/* Write the data */
cs->BC_Write_Reg(cs, -1, COMM_JADE+1, value);
/* Say JADE we wanna write indirect reg 'reg' */
cs->BC_Write_Reg(cs, -1, COMM_JADE, reg);
to = 50;
/* Wait for RDY goes high */
while (to) {
udelay(1);
ret = cs->BC_Read_Reg(cs, -1, COMM_JADE);
to--;
if (ret & 1)
/* Got acknowledge */
break;
if (!to) {
printk(KERN_INFO "Can not see ready bit from JADE DSP (reg=0x%X, value=0x%X)\n", reg, value);
return;
/* Write the data */
cs->BC_Write_Reg(cs, -1, COMM_JADE + 1, value);
/* Say JADE we wanna write indirect reg 'reg' */
cs->BC_Write_Reg(cs, -1, COMM_JADE, reg);
to = 50;
/* Wait for RDY goes high */
while (to) {
udelay(1);
ret = cs->BC_Read_Reg(cs, -1, COMM_JADE);
to--;
if (ret & 1)
/* Got acknowledge */
break;
if (!to) {
printk(KERN_INFO "Can not see ready bit from JADE DSP (reg=0x%X, value=0x%X)\n", reg, value);
return;
}
}
}
}
@@ -77,67 +77,67 @@ jade_write_indirect(struct IsdnCardState *cs, u_char reg, u_char value)
static void
modejade(struct BCState *bcs, int mode, int bc)
{
struct IsdnCardState *cs = bcs->cs;
int jade = bcs->hw.hscx.hscx;
struct IsdnCardState *cs = bcs->cs;
int jade = bcs->hw.hscx.hscx;
if (cs->debug & L1_DEB_HSCX) {
char tmp[40];
sprintf(tmp, "jade %c mode %d ichan %d",
'A' + jade, mode, bc);
debugl1(cs, tmp);
}
bcs->mode = mode;
bcs->channel = bc;
cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (mode == L1_MODE_TRANS ? jadeMODE_TMO:0x00));
cs->BC_Write_Reg(cs, jade, jade_HDLC_CCR0, (jadeCCR0_PU|jadeCCR0_ITF));
cs->BC_Write_Reg(cs, jade, jade_HDLC_CCR1, 0x00);
if (cs->debug & L1_DEB_HSCX) {
char tmp[40];
sprintf(tmp, "jade %c mode %d ichan %d",
'A' + jade, mode, bc);
debugl1(cs, tmp);
}
bcs->mode = mode;
bcs->channel = bc;
jade_write_indirect(cs, jade_HDLC1SERRXPATH, 0x08);
jade_write_indirect(cs, jade_HDLC2SERRXPATH, 0x08);
jade_write_indirect(cs, jade_HDLC1SERTXPATH, 0x00);
jade_write_indirect(cs, jade_HDLC2SERTXPATH, 0x00);
cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (mode == L1_MODE_TRANS ? jadeMODE_TMO : 0x00));
cs->BC_Write_Reg(cs, jade, jade_HDLC_CCR0, (jadeCCR0_PU | jadeCCR0_ITF));
cs->BC_Write_Reg(cs, jade, jade_HDLC_CCR1, 0x00);
cs->BC_Write_Reg(cs, jade, jade_HDLC_XCCR, 0x07);
cs->BC_Write_Reg(cs, jade, jade_HDLC_RCCR, 0x07);
jade_write_indirect(cs, jade_HDLC1SERRXPATH, 0x08);
jade_write_indirect(cs, jade_HDLC2SERRXPATH, 0x08);
jade_write_indirect(cs, jade_HDLC1SERTXPATH, 0x00);
jade_write_indirect(cs, jade_HDLC2SERTXPATH, 0x00);
if (bc == 0) {
cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAX, 0x00);
cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAR, 0x00);
} else {
cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAX, 0x04);
cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAR, 0x04);
}
switch (mode) {
cs->BC_Write_Reg(cs, jade, jade_HDLC_XCCR, 0x07);
cs->BC_Write_Reg(cs, jade, jade_HDLC_RCCR, 0x07);
if (bc == 0) {
cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAX, 0x00);
cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAR, 0x00);
} else {
cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAX, 0x04);
cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAR, 0x04);
}
switch (mode) {
case (L1_MODE_NULL):
cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, jadeMODE_TMO);
break;
case (L1_MODE_TRANS):
cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (jadeMODE_TMO|jadeMODE_RAC|jadeMODE_XAC));
cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (jadeMODE_TMO | jadeMODE_RAC | jadeMODE_XAC));
break;
case (L1_MODE_HDLC):
cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (jadeMODE_RAC|jadeMODE_XAC));
cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (jadeMODE_RAC | jadeMODE_XAC));
break;
}
if (mode) {
cs->BC_Write_Reg(cs, jade, jade_HDLC_RCMD, (jadeRCMD_RRES|jadeRCMD_RMC));
cs->BC_Write_Reg(cs, jade, jade_HDLC_XCMD, jadeXCMD_XRES);
/* Unmask ints */
cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0xF8);
}
else
/* Mask ints */
cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0x00);
}
if (mode) {
cs->BC_Write_Reg(cs, jade, jade_HDLC_RCMD, (jadeRCMD_RRES | jadeRCMD_RMC));
cs->BC_Write_Reg(cs, jade, jade_HDLC_XCMD, jadeXCMD_XRES);
/* Unmask ints */
cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0xF8);
}
else
/* Mask ints */
cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0x00);
}
static void
jade_l2l1(struct PStack *st, int pr, void *arg)
{
struct BCState *bcs = st->l1.bcs;
struct sk_buff *skb = arg;
u_long flags;
struct BCState *bcs = st->l1.bcs;
struct sk_buff *skb = arg;
u_long flags;
switch (pr) {
switch (pr) {
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
@@ -164,10 +164,10 @@ jade_l2l1(struct PStack *st, int pr, void *arg)
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
@@ -187,26 +187,26 @@ jade_l2l1(struct PStack *st, int pr, void *arg)
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
}
}
}
static void
close_jadestate(struct BCState *bcs)
{
modejade(bcs, 0, bcs->channel);
if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) {
kfree(bcs->hw.hscx.rcvbuf);
bcs->hw.hscx.rcvbuf = NULL;
kfree(bcs->blog);
bcs->blog = NULL;
skb_queue_purge(&bcs->rqueue);
skb_queue_purge(&bcs->squeue);
if (bcs->tx_skb) {
dev_kfree_skb_any(bcs->tx_skb);
bcs->tx_skb = NULL;
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
modejade(bcs, 0, bcs->channel);
if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) {
kfree(bcs->hw.hscx.rcvbuf);
bcs->hw.hscx.rcvbuf = NULL;
kfree(bcs->blog);
bcs->blog = NULL;
skb_queue_purge(&bcs->rqueue);
skb_queue_purge(&bcs->squeue);
if (bcs->tx_skb) {
dev_kfree_skb_any(bcs->tx_skb);
bcs->tx_skb = NULL;
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
}
}
}
}
static int
@@ -221,7 +221,7 @@ open_jadestate(struct IsdnCardState *cs, struct BCState *bcs)
}
if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) {
printk(KERN_WARNING
"HiSax: No memory for bcs->blog\n");
"HiSax: No memory for bcs->blog\n");
test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
kfree(bcs->hw.hscx.rcvbuf);
bcs->hw.hscx.rcvbuf = NULL;
@@ -303,12 +303,11 @@ initjade(struct IsdnCardState *cs)
cs->BC_Write_Reg(cs, 0, jade_HDLC_IMR, 0x00);
cs->BC_Write_Reg(cs, 1, jade_HDLC_IMR, 0x00);
/* Setup host access to hdlc controller */
jade_write_indirect(cs, jade_HDLCCNTRACCESS, (jadeINDIRECT_HAH1|jadeINDIRECT_HAH2));
jade_write_indirect(cs, jade_HDLCCNTRACCESS, (jadeINDIRECT_HAH1 | jadeINDIRECT_HAH2));
/* Unmask HDLC int (don't forget DSP int later on)*/
cs->BC_Write_Reg(cs, -1,jade_INT, (jadeINT_HDLC1|jadeINT_HDLC2));
cs->BC_Write_Reg(cs, -1, jade_INT, (jadeINT_HDLC1 | jadeINT_HDLC2));
/* once again TRANSPARENT */
/* once again TRANSPARENT */
modejade(cs->bcs, 0, 0);
modejade(cs->bcs + 1, 0, 0);
}

Visa fil

@@ -4,7 +4,7 @@
*
* Author Roland Klabunde
* Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -16,111 +16,111 @@
/* Special registers for access to indirect accessible JADE regs */
#define DIRECT_IO_JADE 0x0000 /* Jade direct io access area */
#define COMM_JADE 0x0040 /* Jade communication area */
#define COMM_JADE 0x0040 /* Jade communication area */
/********************************************************************/
/* JADE-HDLC registers */
/* JADE-HDLC registers */
/********************************************************************/
#define jade_HDLC_RFIFO 0x00 /* R */
#define jade_HDLC_XFIFO 0x00 /* W */
#define jade_HDLC_RFIFO 0x00 /* R */
#define jade_HDLC_XFIFO 0x00 /* W */
#define jade_HDLC_STAR 0x20 /* R */
#define jadeSTAR_XDOV 0x80
#define jadeSTAR_XFW 0x40 /* Does not work*/
#define jadeSTAR_XCEC 0x20
#define jadeSTAR_RCEC 0x10
#define jadeSTAR_BSY 0x08
#define jadeSTAR_RNA 0x04
#define jadeSTAR_STR 0x02
#define jadeSTAR_STX 0x01
#define jade_HDLC_STAR 0x20 /* R */
#define jadeSTAR_XDOV 0x80
#define jadeSTAR_XFW 0x40 /* Does not work*/
#define jadeSTAR_XCEC 0x20
#define jadeSTAR_RCEC 0x10
#define jadeSTAR_BSY 0x08
#define jadeSTAR_RNA 0x04
#define jadeSTAR_STR 0x02
#define jadeSTAR_STX 0x01
#define jade_HDLC_XCMD 0x20 /* W */
#define jadeXCMD_XF 0x80
#define jadeXCMD_XME 0x40
#define jadeXCMD_XRES 0x20
#define jadeXCMD_STX 0x01
#define jade_HDLC_XCMD 0x20 /* W */
#define jadeXCMD_XF 0x80
#define jadeXCMD_XME 0x40
#define jadeXCMD_XRES 0x20
#define jadeXCMD_STX 0x01
#define jade_HDLC_RSTA 0x21 /* R */
#define jadeRSTA_VFR 0x80
#define jadeRSTA_RDO 0x40
#define jadeRSTA_CRC 0x20
#define jadeRSTA_RAB 0x10
#define jadeRSTA_MASK 0xF0
#define jade_HDLC_RSTA 0x21 /* R */
#define jadeRSTA_VFR 0x80
#define jadeRSTA_RDO 0x40
#define jadeRSTA_CRC 0x20
#define jadeRSTA_RAB 0x10
#define jadeRSTA_MASK 0xF0
#define jade_HDLC_MODE 0x22 /* RW*/
#define jadeMODE_TMO 0x80
#define jadeMODE_RAC 0x40
#define jadeMODE_XAC 0x20
#define jadeMODE_TLP 0x10
#define jadeMODE_ERFS 0x02
#define jadeMODE_ETFS 0x01
#define jadeMODE_TMO 0x80
#define jadeMODE_RAC 0x40
#define jadeMODE_XAC 0x20
#define jadeMODE_TLP 0x10
#define jadeMODE_ERFS 0x02
#define jadeMODE_ETFS 0x01
#define jade_HDLC_RBCH 0x24 /* R */
#define jade_HDLC_RBCL 0x25 /* R */
#define jade_HDLC_RCMD 0x25 /* W */
#define jadeRCMD_RMC 0x80
#define jadeRCMD_RRES 0x40
#define jadeRCMD_RMD 0x20
#define jadeRCMD_STR 0x02
#define jade_HDLC_RBCL 0x25 /* R */
#define jade_HDLC_RCMD 0x25 /* W */
#define jadeRCMD_RMC 0x80
#define jadeRCMD_RRES 0x40
#define jadeRCMD_RMD 0x20
#define jadeRCMD_STR 0x02
#define jade_HDLC_CCR0 0x26 /* RW*/
#define jadeCCR0_PU 0x80
#define jadeCCR0_ITF 0x40
#define jadeCCR0_C32 0x20
#define jadeCCR0_CRL 0x10
#define jadeCCR0_RCRC 0x08
#define jadeCCR0_XCRC 0x04
#define jadeCCR0_RMSB 0x02
#define jadeCCR0_XMSB 0x01
#define jadeCCR0_PU 0x80
#define jadeCCR0_ITF 0x40
#define jadeCCR0_C32 0x20
#define jadeCCR0_CRL 0x10
#define jadeCCR0_RCRC 0x08
#define jadeCCR0_XCRC 0x04
#define jadeCCR0_RMSB 0x02
#define jadeCCR0_XMSB 0x01
#define jade_HDLC_CCR1 0x27 /* RW*/
#define jadeCCR1_RCS0 0x80
#define jadeCCR1_RCONT 0x40
#define jadeCCR1_RFDIS 0x20
#define jadeCCR1_XCS0 0x10
#define jadeCCR1_XCONT 0x08
#define jadeCCR1_XFDIS 0x04
#define jadeCCR1_RCS0 0x80
#define jadeCCR1_RCONT 0x40
#define jadeCCR1_RFDIS 0x20
#define jadeCCR1_XCS0 0x10
#define jadeCCR1_XCONT 0x08
#define jadeCCR1_XFDIS 0x04
#define jade_HDLC_TSAR 0x28 /* RW*/
#define jade_HDLC_TSAX 0x29 /* RW*/
#define jade_HDLC_RCCR 0x2A /* RW*/
#define jade_HDLC_XCCR 0x2B /* RW*/
#define jade_HDLC_ISR 0x2C /* R */
#define jade_HDLC_IMR 0x2C /* W */
#define jadeISR_RME 0x80
#define jadeISR_RPF 0x40
#define jadeISR_RFO 0x20
#define jadeISR_XPR 0x10
#define jadeISR_XDU 0x08
#define jadeISR_ALLS 0x04
#define jade_HDLC_ISR 0x2C /* R */
#define jade_HDLC_IMR 0x2C /* W */
#define jadeISR_RME 0x80
#define jadeISR_RPF 0x40
#define jadeISR_RFO 0x20
#define jadeISR_XPR 0x10
#define jadeISR_XDU 0x08
#define jadeISR_ALLS 0x04
#define jade_INT 0x75
#define jadeINT_HDLC1 0x02
#define jadeINT_HDLC2 0x01
#define jadeINT_DSP 0x04
#define jade_INTR 0x70
#define jade_INT 0x75
#define jadeINT_HDLC1 0x02
#define jadeINT_HDLC2 0x01
#define jadeINT_DSP 0x04
#define jade_INTR 0x70
/********************************************************************/
/* Indirect accessible JADE registers of common interest */
/* Indirect accessible JADE registers of common interest */
/********************************************************************/
#define jade_CHIPVERSIONNR 0x00 /* Does not work*/
#define jade_HDLCCNTRACCESS 0x10
#define jadeINDIRECT_HAH1 0x02
#define jadeINDIRECT_HAH2 0x01
#define jade_HDLCCNTRACCESS 0x10
#define jadeINDIRECT_HAH1 0x02
#define jadeINDIRECT_HAH2 0x01
#define jade_HDLC1SERRXPATH 0x1D
#define jade_HDLC1SERTXPATH 0x1E
#define jade_HDLC2SERRXPATH 0x1F
#define jade_HDLC2SERTXPATH 0x20
#define jadeINDIRECT_SLIN1 0x10
#define jadeINDIRECT_SLIN0 0x08
#define jadeINDIRECT_LMOD1 0x04
#define jadeINDIRECT_LMOD0 0x02
#define jadeINDIRECT_HHR 0x01
#define jadeINDIRECT_HHX 0x01
#define jadeINDIRECT_SLIN1 0x10
#define jadeINDIRECT_SLIN0 0x08
#define jadeINDIRECT_LMOD1 0x04
#define jadeINDIRECT_LMOD0 0x02
#define jadeINDIRECT_HHR 0x01
#define jadeINDIRECT_HHX 0x01
#define jade_RXAUDIOCH1CFG 0x11
#define jade_RXAUDIOCH2CFG 0x14

Visa fil

@@ -4,7 +4,7 @@
*
* Author Roland Klabunde
* Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -13,21 +13,21 @@
static inline void
waitforCEC(struct IsdnCardState *cs, int jade, int reg)
{
int to = 50;
int mask = (reg == jade_HDLC_XCMD ? jadeSTAR_XCEC : jadeSTAR_RCEC);
while ((READJADE(cs, jade, jade_HDLC_STAR) & mask) && to) {
udelay(1);
to--;
}
if (!to)
printk(KERN_WARNING "HiSax: waitforCEC (jade) timeout\n");
int to = 50;
int mask = (reg == jade_HDLC_XCMD ? jadeSTAR_XCEC : jadeSTAR_RCEC);
while ((READJADE(cs, jade, jade_HDLC_STAR) & mask) && to) {
udelay(1);
to--;
}
if (!to)
printk(KERN_WARNING "HiSax: waitforCEC (jade) timeout\n");
}
static inline void
waitforXFW(struct IsdnCardState *cs, int jade)
{
/* Does not work on older jade versions, don't care */
/* Does not work on older jade versions, don't care */
}
static inline void
@@ -98,7 +98,7 @@ jade_fill_fifo(struct BCState *bcs)
bcs->tx_cnt -= count;
bcs->hw.hscx.count += count;
WRITEJADEFIFO(cs, bcs->hw.hscx.hscx, ptr, count);
WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_XCMD, more ? jadeXCMD_XF : (jadeXCMD_XF|jadeXCMD_XME));
WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_XCMD, more ? jadeXCMD_XF : (jadeXCMD_XF | jadeXCMD_XME));
if (cs->debug & L1_DEB_HSCX_FIFO) {
char *t = bcs->blog;
@@ -119,7 +119,7 @@ jade_interrupt(struct IsdnCardState *cs, u_char val, u_char jade)
int fifo_size = 32;
int count;
int i_jade = (int) jade; /* To satisfy the compiler */
if (!test_bit(BC_FLG_INIT, &bcs->Flag))
return;
@@ -128,13 +128,13 @@ jade_interrupt(struct IsdnCardState *cs, u_char val, u_char jade)
if ((r & 0xf0) != 0xa0) {
if (!(r & 0x80))
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "JADE %s invalid frame", (jade ? "B":"A"));
debugl1(cs, "JADE %s invalid frame", (jade ? "B" : "A"));
if ((r & 0x40) && bcs->mode)
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "JADE %c RDO mode=%d", 'A'+jade, bcs->mode);
debugl1(cs, "JADE %c RDO mode=%d", 'A' + jade, bcs->mode);
if (!(r & 0x20))
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "JADE %c CRC error", 'A'+jade);
debugl1(cs, "JADE %c CRC error", 'A' + jade);
WriteJADECMDR(cs, jade, jade_HDLC_RCMD, jadeRCMD_RMC);
} else {
count = READJADE(cs, i_jade, jade_HDLC_RBCL) & 0x1F;
@@ -145,7 +145,7 @@ jade_interrupt(struct IsdnCardState *cs, u_char val, u_char jade)
if (cs->debug & L1_DEB_HSCX_FIFO)
debugl1(cs, "HX Frame %d", count);
if (!(skb = dev_alloc_skb(count)))
printk(KERN_WARNING "JADE %s receive out of memory\n", (jade ? "B":"A"));
printk(KERN_WARNING "JADE %s receive out of memory\n", (jade ? "B" : "A"));
else {
memcpy(skb_put(skb, count), bcs->hw.hscx.rcvbuf, count);
skb_queue_tail(&bcs->rqueue, skb);
@@ -175,8 +175,8 @@ jade_interrupt(struct IsdnCardState *cs, u_char val, u_char jade)
jade_fill_fifo(bcs);
return;
} else {
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
u_long flags;
spin_lock_irqsave(&bcs->aclock, flags);
bcs->ackcnt += bcs->hw.hscx.count;
@@ -204,7 +204,7 @@ jade_int_main(struct IsdnCardState *cs, u_char val, int jade)
{
struct BCState *bcs;
bcs = cs->bcs + jade;
if (val & jadeISR_RFO) {
/* handled with RDO */
val &= ~jadeISR_RFO;
@@ -216,21 +216,21 @@ jade_int_main(struct IsdnCardState *cs, u_char val, int jade)
jade_fill_fifo(bcs);
else {
/* Here we lost an TX interrupt, so
* restart transmitting the whole frame.
* restart transmitting the whole frame.
*/
if (bcs->tx_skb) {
skb_push(bcs->tx_skb, bcs->hw.hscx.count);
skb_push(bcs->tx_skb, bcs->hw.hscx.count);
bcs->tx_cnt += bcs->hw.hscx.count;
bcs->hw.hscx.count = 0;
}
WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_XCMD, jadeXCMD_XRES);
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "JADE %c EXIR %x Lost TX", 'A'+jade, val);
debugl1(cs, "JADE %c EXIR %x Lost TX", 'A' + jade, val);
}
}
if (val & (jadeISR_RME|jadeISR_RPF|jadeISR_XPR)) {
if (val & (jadeISR_RME | jadeISR_RPF | jadeISR_XPR)) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "JADE %c interrupt %x", 'A'+jade, val);
debugl1(cs, "JADE %c interrupt %x", 'A' + jade, val);
jade_interrupt(cs, val, jade);
}
}

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -21,10 +21,10 @@
extern char *HiSax_getrev(const char *revision);
static const char *l3_1tr6_revision = "$Revision: 2.15.2.3 $";
#define MsgHead(ptr, cref, mty, dis) \
*ptr++ = dis; \
*ptr++ = 0x1; \
*ptr++ = cref ^ 0x80; \
#define MsgHead(ptr, cref, mty, dis) \
*ptr++ = dis; \
*ptr++ = 0x1; \
*ptr++ = cref ^ 0x80; \
*ptr++ = mty
static void
@@ -83,23 +83,23 @@ l3_1tr6_setup_req(struct l3_process *pc, u_char pr, void *arg)
pc->para.spv = 0;
if (!isdigit(*teln)) {
switch (0x5f & *teln) {
case 'S':
pc->para.spv = 1;
break;
case 'C':
channel = 0x08;
case 'P':
channel |= 0x80;
teln++;
if (*teln == '1')
channel |= 0x01;
else
channel |= 0x02;
break;
default:
if (pc->st->l3.debug & L3_DEB_WARN)
l3_debug(pc->st, "Wrong MSN Code");
break;
case 'S':
pc->para.spv = 1;
break;
case 'C':
channel = 0x08;
case 'P':
channel |= 0x80;
teln++;
if (*teln == '1')
channel |= 0x01;
else
channel |= 0x02;
break;
default:
if (pc->st->l3.debug & L3_DEB_WARN)
l3_debug(pc->st, "Wrong MSN Code");
break;
}
teln++;
}
@@ -176,7 +176,7 @@ l3_1tr6_setup(struct l3_process *pc, u_char pr, void *arg)
return;
}
if ((pc->para.bchannel = p[2] & 0x3))
bcfound++;
bcfound++;
} else {
l3_1tr6_error(pc, "missing setup chanID", skb);
return;
@@ -525,15 +525,15 @@ l3_1tr6_disconnect_req(struct l3_process *pc, u_char pr, void *arg)
cause = pc->para.cause;
/* Map DSS1 causes */
switch (cause & 0x7f) {
case 0x10:
clen = 0;
break;
case 0x11:
cause = CAUSE_UserBusy;
break;
case 0x15:
cause = CAUSE_CallRejected;
break;
case 0x10:
clen = 0;
break;
case 0x11:
cause = CAUSE_UserBusy;
break;
case 0x15:
cause = CAUSE_CallRejected;
break;
}
StopAllL3Timer(pc);
MsgHead(p, pc->callref, MT_N1_DISC, PROTO_DIS_N1);
@@ -588,12 +588,12 @@ l3_1tr6_t305(struct l3_process *pc, u_char pr, void *arg)
cause = pc->para.cause;
/* Map DSS1 causes */
switch (cause & 0x7f) {
case 0x10:
clen = 0;
break;
case 0x15:
cause = CAUSE_CallRejected;
break;
case 0x10:
clen = 0;
break;
case 0x15:
cause = CAUSE_CallRejected;
break;
}
MsgHead(p, pc->callref, MT_N1_REL, PROTO_DIS_N1);
*p++ = WE0_cause;
@@ -647,19 +647,19 @@ l3_1tr6_t308_2(struct l3_process *pc, u_char pr, void *arg)
static void
l3_1tr6_dl_reset(struct l3_process *pc, u_char pr, void *arg)
{
pc->para.cause = CAUSE_LocalProcErr;
l3_1tr6_disconnect_req(pc, pr, NULL);
pc->st->l3.l3l4(pc->st, CC_SETUP_ERR, pc);
pc->para.cause = CAUSE_LocalProcErr;
l3_1tr6_disconnect_req(pc, pr, NULL);
pc->st->l3.l3l4(pc->st, CC_SETUP_ERR, pc);
}
static void
l3_1tr6_dl_release(struct l3_process *pc, u_char pr, void *arg)
{
newl3state(pc, 0);
pc->para.cause = 0x1b; /* Destination out of order */
pc->para.loc = 0;
pc->st->l3.l3l4(pc->st, CC_RELEASE | INDICATION, pc);
release_l3_process(pc);
newl3state(pc, 0);
pc->para.cause = 0x1b; /* Destination out of order */
pc->para.loc = 0;
pc->st->l3.l3l4(pc->st, CC_RELEASE | INDICATION, pc);
release_l3_process(pc);
}
/* *INDENT-OFF* */
@@ -667,9 +667,9 @@ static struct stateentry downstl[] =
{
{SBIT(0),
CC_SETUP | REQUEST, l3_1tr6_setup_req},
{SBIT(1) | SBIT(2) | SBIT(3) | SBIT(4) | SBIT(6) | SBIT(7) | SBIT(8) |
SBIT(10),
CC_DISCONNECT | REQUEST, l3_1tr6_disconnect_req},
{SBIT(1) | SBIT(2) | SBIT(3) | SBIT(4) | SBIT(6) | SBIT(7) | SBIT(8) |
SBIT(10),
CC_DISCONNECT | REQUEST, l3_1tr6_disconnect_req},
{SBIT(12),
CC_RELEASE | REQUEST, l3_1tr6_release_req},
{SBIT(6),
@@ -732,12 +732,12 @@ static struct stateentry datastln1[] =
static struct stateentry manstatelist[] =
{
{SBIT(2),
DL_ESTABLISH | INDICATION, l3_1tr6_dl_reset},
{ALL_STATES,
DL_RELEASE | INDICATION, l3_1tr6_dl_release},
{SBIT(2),
DL_ESTABLISH | INDICATION, l3_1tr6_dl_reset},
{ALL_STATES,
DL_RELEASE | INDICATION, l3_1tr6_dl_release},
};
/* *INDENT-ON* */
static void
@@ -749,16 +749,16 @@ up1tr6(struct PStack *st, int pr, void *arg)
char tmp[80];
switch (pr) {
case (DL_DATA | INDICATION):
case (DL_UNIT_DATA | INDICATION):
break;
case (DL_ESTABLISH | CONFIRM):
case (DL_ESTABLISH | INDICATION):
case (DL_RELEASE | INDICATION):
case (DL_RELEASE | CONFIRM):
l3_msg(st, pr, arg);
return;
break;
case (DL_DATA | INDICATION):
case (DL_UNIT_DATA | INDICATION):
break;
case (DL_ESTABLISH | CONFIRM):
case (DL_ESTABLISH | INDICATION):
case (DL_RELEASE | INDICATION):
case (DL_RELEASE | CONFIRM):
l3_msg(st, pr, arg);
return;
break;
}
if (skb->len < 4) {
if (st->l3.debug & L3_DEB_PROTERR) {
@@ -792,12 +792,12 @@ up1tr6(struct PStack *st, int pr, void *arg)
dev_kfree_skb(skb);
if (st->l3.debug & L3_DEB_STATE) {
sprintf(tmp, "up1tr6%s N0 mt %x unhandled",
(pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", mt);
(pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", mt);
l3_debug(st, tmp);
}
} else if (skb->data[0] == PROTO_DIS_N1) {
if (!(proc = getl3proc(st, cr))) {
if (mt == MT_N1_SETUP) {
if (mt == MT_N1_SETUP) {
if (cr < 128) {
if (!(proc = new_l3_process(st, cr))) {
if (st->l3.debug & L3_DEB_PROTERR) {
@@ -812,10 +812,10 @@ up1tr6(struct PStack *st, int pr, void *arg)
return;
}
} else if ((mt == MT_N1_REL) || (mt == MT_N1_REL_ACK) ||
(mt == MT_N1_CANC_ACK) || (mt == MT_N1_CANC_REJ) ||
(mt == MT_N1_REG_ACK) || (mt == MT_N1_REG_REJ) ||
(mt == MT_N1_SUSP_ACK) || (mt == MT_N1_RES_REJ) ||
(mt == MT_N1_INFO)) {
(mt == MT_N1_CANC_ACK) || (mt == MT_N1_CANC_REJ) ||
(mt == MT_N1_REG_ACK) || (mt == MT_N1_REG_REJ) ||
(mt == MT_N1_SUSP_ACK) || (mt == MT_N1_RES_REJ) ||
(mt == MT_N1_INFO)) {
dev_kfree_skb(skb);
return;
} else {
@@ -838,7 +838,7 @@ up1tr6(struct PStack *st, int pr, void *arg)
dev_kfree_skb(skb);
if (st->l3.debug & L3_DEB_STATE) {
sprintf(tmp, "up1tr6%sstate %d mt %x unhandled",
(pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ",
(pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ",
proc->state, mt);
l3_debug(st, tmp);
}
@@ -846,7 +846,7 @@ up1tr6(struct PStack *st, int pr, void *arg)
} else {
if (st->l3.debug & L3_DEB_STATE) {
sprintf(tmp, "up1tr6%sstate %d mt %x",
(pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ",
(pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ",
proc->state, mt);
l3_debug(st, tmp);
}
@@ -863,7 +863,7 @@ down1tr6(struct PStack *st, int pr, void *arg)
struct Channel *chan;
char tmp[80];
if ((DL_ESTABLISH | REQUEST)== pr) {
if ((DL_ESTABLISH | REQUEST) == pr) {
l3_msg(st, pr, NULL);
return;
} else if ((CC_SETUP | REQUEST) == pr) {
@@ -905,31 +905,31 @@ down1tr6(struct PStack *st, int pr, void *arg)
static void
man1tr6(struct PStack *st, int pr, void *arg)
{
int i;
struct l3_process *proc = arg;
if (!proc) {
printk(KERN_ERR "HiSax man1tr6 without proc pr=%04x\n", pr);
return;
}
for (i = 0; i < ARRAY_SIZE(manstatelist); i++)
if ((pr == manstatelist[i].primitive) &&
((1 << proc->state) & manstatelist[i].state))
break;
if (i == ARRAY_SIZE(manstatelist)) {
if (st->l3.debug & L3_DEB_STATE) {
l3_debug(st, "cr %d man1tr6 state %d prim %d unhandled",
proc->callref & 0x7f, proc->state, pr);
}
} else {
if (st->l3.debug & L3_DEB_STATE) {
l3_debug(st, "cr %d man1tr6 state %d prim %d",
proc->callref & 0x7f, proc->state, pr);
}
manstatelist[i].rout(proc, pr, arg);
}
int i;
struct l3_process *proc = arg;
if (!proc) {
printk(KERN_ERR "HiSax man1tr6 without proc pr=%04x\n", pr);
return;
}
for (i = 0; i < ARRAY_SIZE(manstatelist); i++)
if ((pr == manstatelist[i].primitive) &&
((1 << proc->state) & manstatelist[i].state))
break;
if (i == ARRAY_SIZE(manstatelist)) {
if (st->l3.debug & L3_DEB_STATE) {
l3_debug(st, "cr %d man1tr6 state %d prim %d unhandled",
proc->callref & 0x7f, proc->state, pr);
}
} else {
if (st->l3.debug & L3_DEB_STATE) {
l3_debug(st, "cr %d man1tr6 state %d prim %d",
proc->callref & 0x7f, proc->state, pr);
}
manstatelist[i].rout(proc, pr, arg);
}
}
void
setstack_1tr6(struct PStack *st)
{

Filskillnaden har hållits tillbaka eftersom den är för stor Load Diff

Visa fil

@@ -107,18 +107,18 @@
/* l3dss1 specific data in l3 process */
typedef struct
{ unsigned char invoke_id; /* used invoke id in remote ops, 0 = not active */
ulong ll_id; /* remebered ll id */
u8 remote_operation; /* handled remote operation, 0 = not active */
int proc; /* rememered procedure */
ulong remote_result; /* result of remote operation for statcallb */
char uus1_data[35]; /* data send during alerting or disconnect */
} dss1_proc_priv;
{ unsigned char invoke_id; /* used invoke id in remote ops, 0 = not active */
ulong ll_id; /* remebered ll id */
u8 remote_operation; /* handled remote operation, 0 = not active */
int proc; /* rememered procedure */
ulong remote_result; /* result of remote operation for statcallb */
char uus1_data[35]; /* data send during alerting or disconnect */
} dss1_proc_priv;
/* l3dss1 specific data in protocol stack */
typedef struct
{ unsigned char last_invoke_id; /* last used value for invoking */
unsigned char invoke_used[32]; /* 256 bits for 256 values */
} dss1_stk_priv;
{ unsigned char last_invoke_id; /* last used value for invoking */
unsigned char invoke_used[32]; /* 256 bits for 256 values */
} dss1_stk_priv;
#endif /* only l3dss1_process */

Filskillnaden har hållits tillbaka eftersom den är för stor Load Diff

Visa fil

@@ -4,13 +4,13 @@
*
* Author Matt Henderson & Guy Ellis
* Copyright by Traverse Technologies Pty Ltd, www.travers.com.au
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
* 2000.6.6 Initial implementation of routines for US NI1
* Layer 3 protocol based on the EURO/DSS1 D-channel protocol
* driver written by Karsten Keil et al. Thanks also for the
* 2000.6.6 Initial implementation of routines for US NI1
* Layer 3 protocol based on the EURO/DSS1 D-channel protocol
* driver written by Karsten Keil et al. Thanks also for the
* code provided by Ragnar Paulson.
*
*/
@@ -119,18 +119,18 @@
/* l3ni1 specific data in l3 process */
typedef struct
{ unsigned char invoke_id; /* used invoke id in remote ops, 0 = not active */
ulong ll_id; /* remebered ll id */
u8 remote_operation; /* handled remote operation, 0 = not active */
int proc; /* rememered procedure */
ulong remote_result; /* result of remote operation for statcallb */
char uus1_data[35]; /* data send during alerting or disconnect */
} ni1_proc_priv;
{ unsigned char invoke_id; /* used invoke id in remote ops, 0 = not active */
ulong ll_id; /* remebered ll id */
u8 remote_operation; /* handled remote operation, 0 = not active */
int proc; /* rememered procedure */
ulong remote_result; /* result of remote operation for statcallb */
char uus1_data[35]; /* data send during alerting or disconnect */
} ni1_proc_priv;
/* l3dni1 specific data in protocol stack */
typedef struct
{ unsigned char last_invoke_id; /* last used value for invoking */
unsigned char invoke_used[32]; /* 256 bits for 256 values */
} ni1_stk_priv;
{ unsigned char last_invoke_id; /* last used value for invoking */
unsigned char invoke_used[32]; /* 256 bits for 256 values */
} ni1_stk_priv;
#endif /* only l3dni1_process */

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -16,12 +16,12 @@ static void
error_handling_dchan(struct PStack *st, int Error)
{
switch (Error) {
case 'C':
case 'D':
case 'G':
case 'H':
st->l2.l2tei(st, MDL_ERROR | REQUEST, NULL);
break;
case 'C':
case 'D':
case 'G':
case 'H':
st->l2.l2tei(st, MDL_ERROR | REQUEST, NULL);
break;
}
}
@@ -31,15 +31,15 @@ hisax_manager(struct PStack *st, int pr, void *arg)
long Code;
switch (pr) {
case (MDL_ERROR | INDICATION):
Code = (long) arg;
HiSax_putstatus(st->l1.hardware, "manager: MDL_ERROR",
" %c %s", (char)Code,
case (MDL_ERROR | INDICATION):
Code = (long) arg;
HiSax_putstatus(st->l1.hardware, "manager: MDL_ERROR",
" %c %s", (char)Code,
test_bit(FLG_LAPD, &st->l2.flag) ?
"D-channel" : "B-channel");
if (test_bit(FLG_LAPD, &st->l2.flag))
error_handling_dchan(st, Code);
break;
if (test_bit(FLG_LAPD, &st->l2.flag))
error_handling_dchan(st, Code);
break;
}
}

Visa fil

@@ -4,7 +4,7 @@
*
* Author Stephan von Krawczynski
* Copyright by Stephan von Krawczynski <skraw@ithnet.com>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -18,7 +18,7 @@
static const char *mic_revision = "$Revision: 1.12.2.4 $";
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
#define MIC_ISAC 2
@@ -39,7 +39,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
}
static inline void
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
insb(adr, data, size);
@@ -54,7 +54,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
}
static inline void
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
outsb(adr, data, size);
@@ -75,13 +75,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.mic.adr, cs->hw.mic.isac, 0, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.mic.adr, cs->hw.mic.isac, 0, data, size);
}
@@ -104,16 +104,16 @@ WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
* fast interrupt HSCX stuff goes here
*/
#define READHSCX(cs, nr, reg) readreg(cs->hw.mic.adr, \
cs->hw.mic.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.mic.adr, \
cs->hw.mic.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCX(cs, nr, reg) readreg(cs->hw.mic.adr, \
cs->hw.mic.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.mic.adr, \
cs->hw.mic.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.mic.adr, \
cs->hw.mic.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.mic.adr, \
cs->hw.mic.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.mic.adr, \
cs->hw.mic.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.mic.adr, \
cs->hw.mic.hscx, (nr ? 0x40 : 0), ptr, cnt)
#include "hscx_irq.c"
@@ -126,11 +126,11 @@ mic_interrupt(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40);
Start_HSCX:
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40);
@@ -170,21 +170,21 @@ mic_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
return(0);
case CARD_RELEASE:
release_io_mic(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscx(cs); /* /RTSA := ISAC RST */
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
return (0);
case CARD_RELEASE:
release_io_mic(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscx(cs); /* /RTSA := ISAC RST */
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
int __devinit
@@ -214,7 +214,7 @@ setup_mic(struct IsdnCard *card)
return (0);
}
printk(KERN_INFO "mic: defined at 0x%x IRQ %d\n",
cs->hw.mic.cfg_reg, cs->irq);
cs->hw.mic.cfg_reg, cs->irq);
setup_isac(cs);
cs->readisac = &ReadISAC;
cs->writeisac = &WriteISAC;
@@ -228,7 +228,7 @@ setup_mic(struct IsdnCard *card)
ISACVersion(cs, "mic:");
if (HscxVersion(cs, "mic:")) {
printk(KERN_WARNING
"mic: wrong HSCX versions check IO address\n");
"mic: wrong HSCX versions check IO address\n");
release_io_mic(cs);
return (0);
}

Filskillnaden har hållits tillbaka eftersom den är för stor Load Diff

Visa fil

@@ -6,13 +6,13 @@
* Copyright by Karsten Keil <keil@isdn4linux.de>
* by Matt Henderson,
* Traverse Technologies P/L www.traverse.com.au
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
*/
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
#define NETJET_CTRL 0x00
@@ -67,4 +67,3 @@ void netjet_fill_dma(struct BCState *bcs);
void netjet_interrupt(int intno, void *dev_id);
void inittiger(struct IsdnCardState *cs);
void release_io_netjet(struct IsdnCardState *cs);

Visa fil

@@ -5,10 +5,10 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
*
* Thanks to Dr. Neuhaus and SAGEM for information
*
*/
@@ -23,7 +23,7 @@
static const char *niccy_revision = "$Revision: 1.21.2.4 $";
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
#define ISAC_PCI_DATA 0
@@ -53,21 +53,21 @@ static inline u_char readreg(unsigned int ale, unsigned int adr, u_char off)
}
static inline void readfifo(unsigned int ale, unsigned int adr, u_char off,
u_char *data, int size)
u_char *data, int size)
{
byteout(ale, off);
insb(adr, data, size);
}
static inline void writereg(unsigned int ale, unsigned int adr, u_char off,
u_char data)
u_char data)
{
byteout(ale, off);
byteout(adr, data);
}
static inline void writefifo(unsigned int ale, unsigned int adr, u_char off,
u_char *data, int size)
u_char *data, int size)
{
byteout(ale, off);
outsb(adr, data, size);
@@ -85,12 +85,12 @@ static void WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, offset, value);
}
static void ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
static void ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size);
}
static void WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
static void WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size);
}
@@ -98,26 +98,26 @@ static void WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
static u_char ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
{
return readreg(cs->hw.niccy.hscx_ale,
cs->hw.niccy.hscx, offset + (hscx ? 0x40 : 0));
cs->hw.niccy.hscx, offset + (hscx ? 0x40 : 0));
}
static void WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset,
u_char value)
u_char value)
{
writereg(cs->hw.niccy.hscx_ale,
cs->hw.niccy.hscx, offset + (hscx ? 0x40 : 0), value);
}
#define READHSCX(cs, nr, reg) readreg(cs->hw.niccy.hscx_ale, \
cs->hw.niccy.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.niccy.hscx_ale, \
cs->hw.niccy.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCX(cs, nr, reg) readreg(cs->hw.niccy.hscx_ale, \
cs->hw.niccy.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.niccy.hscx_ale, \
cs->hw.niccy.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.niccy.hscx_ale, \
cs->hw.niccy.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.niccy.hscx_ale, \
cs->hw.niccy.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.niccy.hscx_ale, \
cs->hw.niccy.hscx, (nr ? 0x40 : 0), ptr, cnt)
cs->hw.niccy.hscx, (nr ? 0x40 : 0), ptr, cnt)
#include "hscx_irq.c"
@@ -138,7 +138,7 @@ static irqreturn_t niccy_interrupt(int intno, void *dev_id)
outl(ival, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG);
}
val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx,
HSCX_ISTA + 0x40);
HSCX_ISTA + 0x40);
Start_HSCX:
if (val)
hscx_int_main(cs, val);
@@ -147,7 +147,7 @@ Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx,
HSCX_ISTA + 0x40);
HSCX_ISTA + 0x40);
if (val) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "HSCX IntStat after IntRoutine");
@@ -165,7 +165,7 @@ Start_ISAC:
writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0xFF);
writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0);
writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK, 0);
writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK + 0x40,0);
writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK + 0x40, 0);
spin_unlock_irqrestore(&cs->lock, flags);
return IRQ_HANDLED;
}
@@ -241,32 +241,32 @@ int __devinit setup_niccy(struct IsdnCard *card)
int err;
pnp_c = pnp_find_card(ISAPNP_VENDOR('S', 'D', 'A'),
ISAPNP_FUNCTION(0x0150), pnp_c);
ISAPNP_FUNCTION(0x0150), pnp_c);
if (pnp_c) {
pnp_d = pnp_find_dev(pnp_c,
ISAPNP_VENDOR('S', 'D', 'A'),
ISAPNP_FUNCTION(0x0150), pnp_d);
ISAPNP_VENDOR('S', 'D', 'A'),
ISAPNP_FUNCTION(0x0150), pnp_d);
if (!pnp_d) {
printk(KERN_ERR "NiccyPnP: PnP error card "
"found, no device\n");
"found, no device\n");
return 0;
}
pnp_disable_dev(pnp_d);
err = pnp_activate_dev(pnp_d);
if (err < 0) {
printk(KERN_WARNING "%s: pnp_activate_dev "
"ret(%d)\n", __func__, err);
"ret(%d)\n", __func__, err);
return 0;
}
card->para[1] = pnp_port_start(pnp_d, 0);
card->para[2] = pnp_port_start(pnp_d, 1);
card->para[0] = pnp_irq(pnp_d, 0);
if (!card->para[0] || !card->para[1] ||
!card->para[2]) {
!card->para[2]) {
printk(KERN_ERR "NiccyPnP:some resources are "
"missing %ld/%lx/%lx\n",
card->para[0], card->para[1],
card->para[2]);
"missing %ld/%lx/%lx\n",
card->para[0], card->para[1],
card->para[2]);
pnp_disable_dev(pnp_d);
return 0;
}
@@ -284,15 +284,15 @@ int __devinit setup_niccy(struct IsdnCard *card)
cs->irq = card->para[0];
if (!request_region(cs->hw.niccy.isac, 2, "niccy data")) {
printk(KERN_WARNING "HiSax: NICCY data port %x-%x "
"already in use\n",
cs->hw.niccy.isac, cs->hw.niccy.isac + 1);
"already in use\n",
cs->hw.niccy.isac, cs->hw.niccy.isac + 1);
return 0;
}
if (!request_region(cs->hw.niccy.isac_ale, 2, "niccy addr")) {
printk(KERN_WARNING "HiSax: NICCY address port %x-%x "
"already in use\n",
cs->hw.niccy.isac_ale,
cs->hw.niccy.isac_ale + 1);
"already in use\n",
cs->hw.niccy.isac_ale,
cs->hw.niccy.isac_ale + 1);
release_region(cs->hw.niccy.isac, 2);
return 0;
}
@@ -303,8 +303,8 @@ int __devinit setup_niccy(struct IsdnCard *card)
u_int pci_ioaddr;
cs->subtyp = 0;
if ((niccy_dev = hisax_find_pci_device(PCI_VENDOR_ID_SATSAGEM,
PCI_DEVICE_ID_SATSAGEM_NICCY,
niccy_dev))) {
PCI_DEVICE_ID_SATSAGEM_NICCY,
niccy_dev))) {
if (pci_enable_device(niccy_dev))
return 0;
/* get IRQ */
@@ -357,8 +357,8 @@ int __devinit setup_niccy(struct IsdnCard *card)
#endif /* CONFIG_PCI */
}
printk(KERN_INFO "HiSax: NICCY %s config irq:%d data:0x%X ale:0x%X\n",
(cs->subtyp == 1) ? "PnP" : "PCI",
cs->irq, cs->hw.niccy.isac, cs->hw.niccy.isac_ale);
(cs->subtyp == 1) ? "PnP" : "PCI",
cs->irq, cs->hw.niccy.isac, cs->hw.niccy.isac_ale);
setup_isac(cs);
cs->readisac = &ReadISAC;
cs->writeisac = &WriteISAC;
@@ -372,7 +372,7 @@ int __devinit setup_niccy(struct IsdnCard *card)
ISACVersion(cs, "Niccy:");
if (HscxVersion(cs, "Niccy:")) {
printk(KERN_WARNING "Niccy: wrong HSCX versions check IO "
"address\n");
"address\n");
release_io_niccy(cs);
return 0;
}

Visa fil

@@ -18,7 +18,7 @@ static const char *NETjet_S_revision = "$Revision: 2.13.2.4 $";
static u_char dummyrr(struct IsdnCardState *cs, int chan, u_char off)
{
return(5);
return (5);
}
static void dummywr(struct IsdnCardState *cs, int chan, u_char off, u_char value)
@@ -46,48 +46,48 @@ netjet_s_interrupt(int intno, void *dev_id)
s1val = 1;
} else
s1val = 0;
/*
/*
* read/write stat0 is better, because lower IRQ rate
* Note the IRQ is on for 125 us if a condition match
* thats long on modern CPU and so the IRQ is reentered
* all the time.
*/
s0val = bytein(cs->hw.njet.base + NETJET_IRQSTAT0);
if ((s0val | s1val)==0) { // shared IRQ
if ((s0val | s1val) == 0) { // shared IRQ
spin_unlock_irqrestore(&cs->lock, flags);
return IRQ_NONE;
}
}
if (s0val)
byteout(cs->hw.njet.base + NETJET_IRQSTAT0, s0val);
/* start new code 13/07/00 GE */
/* set bits in sval to indicate which page is free */
if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
/* the 2nd write page is free */
s0val = 0x08;
else /* the 1st write page is free */
s0val = 0x04;
s0val = 0x04;
if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
/* the 2nd read page is free */
s0val |= 0x02;
else /* the 1st read page is free */
s0val |= 0x01;
s0val |= 0x01;
if (s0val != cs->hw.njet.last_is0) /* we have a DMA interrupt */
{
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
printk(KERN_WARNING "nj LOCK_ATOMIC s0val %x->%x\n",
cs->hw.njet.last_is0, s0val);
cs->hw.njet.last_is0, s0val);
spin_unlock_irqrestore(&cs->lock, flags);
return IRQ_HANDLED;
}
cs->hw.njet.irqstat0 = s0val;
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
/* we have a read dma int */
read_tiger(cs);
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
(cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
(cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
/* we have a write dma int */
write_tiger(cs);
/* end new code 13/07/00 GE */
@@ -124,28 +124,28 @@ NETjet_S_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_netjet_s(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_netjet(cs);
return(0);
case CARD_INIT:
reset_netjet_s(cs);
inittiger(cs);
spin_lock_irqsave(&cs->lock, flags);
clear_pending_isac_ints(cs);
initisac(cs);
/* Reenable all IRQ */
cs->writeisac(cs, ISAC_MASK, 0);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_netjet_s(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_netjet(cs);
return (0);
case CARD_INIT:
reset_netjet_s(cs);
inittiger(cs);
spin_lock_irqsave(&cs->lock, flags);
clear_pending_isac_ints(cs);
initisac(cs);
/* Reenable all IRQ */
cs->writeisac(cs, ISAC_MASK, 0);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
static int __devinit njs_pci_probe(struct pci_dev *dev_netjet,
@@ -154,17 +154,17 @@ static int __devinit njs_pci_probe(struct pci_dev *dev_netjet,
u32 cfg;
if (pci_enable_device(dev_netjet))
return(0);
return (0);
pci_set_master(dev_netjet);
cs->irq = dev_netjet->irq;
if (!cs->irq) {
printk(KERN_WARNING "NETjet-S: No IRQ for PCI card found\n");
return(0);
return (0);
}
cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
if (!cs->hw.njet.base) {
printk(KERN_WARNING "NETjet-S: No IO-Adr for PCI card found\n");
return(0);
return (0);
}
/* the TJ300 and TJ320 must be detected, the IRQ handling is different
* unfortunately the chips use the same device ID, but the TJ320 has
@@ -177,14 +177,14 @@ static int __devinit njs_pci_probe(struct pci_dev *dev_netjet,
cs->subtyp = 0; /* TJ300 */
/* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG www.formula-n.com */
if ((dev_netjet->subsystem_vendor == 0x55) &&
(dev_netjet->subsystem_device == 0x02)) {
(dev_netjet->subsystem_device == 0x02)) {
printk(KERN_WARNING "Netjet: You tried to load this driver with an incompatible TigerJet-card\n");
printk(KERN_WARNING "Use type=41 for Formula-n enter:now ISDN PCI and compatible\n");
return(0);
return (0);
}
/* end new code */
return(1);
return (1);
}
static int __devinit njs_cs_init(struct IsdnCard *card,
@@ -209,18 +209,18 @@ static int __devinit njs_cs_init(struct IsdnCard *card,
byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
switch ( ( ( NETjet_ReadIC( cs, ISAC_RBCH ) >> 5 ) & 3 ) )
switch (((NETjet_ReadIC(cs, ISAC_RBCH) >> 5) & 3))
{
case 0 :
return 1; /* end loop */
case 0:
return 1; /* end loop */
case 3 :
printk( KERN_WARNING "NETjet-S: NETspider-U PCI card found\n" );
return -1; /* continue looping */
case 3:
printk(KERN_WARNING "NETjet-S: NETspider-U PCI card found\n");
return -1; /* continue looping */
default :
printk( KERN_WARNING "NETjet-S: No PCI card found\n" );
return 0; /* end loop & function */
default:
printk(KERN_WARNING "NETjet-S: No PCI card found\n");
return 0; /* end loop & function */
}
return 1; /* end loop */
}
@@ -231,8 +231,8 @@ static int __devinit njs_cs_init_rest(struct IsdnCard *card,
const int bytecnt = 256;
printk(KERN_INFO
"NETjet-S: %s card configured at %#lx IRQ %d\n",
cs->subtyp ? "TJ320" : "TJ300", cs->hw.njet.base, cs->irq);
"NETjet-S: %s card configured at %#lx IRQ %d\n",
cs->subtyp ? "TJ320" : "TJ300", cs->hw.njet.base, cs->irq);
if (!request_region(cs->hw.njet.base, bytecnt, "netjet-s isdn")) {
printk(KERN_WARNING
"HiSax: NETjet-S config port %#lx-%#lx already in use\n",
@@ -271,24 +271,24 @@ setup_netjet_s(struct IsdnCard *card)
strcpy(tmp, NETjet_S_revision);
printk(KERN_INFO "HiSax: Traverse Tech. NETjet-S driver Rev. %s\n", HiSax_getrev(tmp));
if (cs->typ != ISDN_CTYPE_NETJET_S)
return(0);
return (0);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
for ( ;; )
for (;;)
{
if ((dev_netjet = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET,
PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
ret = njs_pci_probe(dev_netjet, cs);
if (!ret)
return(0);
return (0);
} else {
printk(KERN_WARNING "NETjet-S: No PCI card found\n");
return(0);
return (0);
}
ret = njs_cs_init(card, cs);
if (!ret)
return(0);
return (0);
if (ret > 0)
break;
/* otherwise, ret < 0, continue looping */

Visa fil

@@ -1,4 +1,4 @@
/* $Id: nj_u.c,v 2.14.2.3 2004/01/13 14:31:26 keil Exp $
/* $Id: nj_u.c,v 2.14.2.3 2004/01/13 14:31:26 keil Exp $
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
@@ -18,7 +18,7 @@ static const char *NETjet_U_revision = "$Revision: 2.14.2.3 $";
static u_char dummyrr(struct IsdnCardState *cs, int chan, u_char off)
{
return(5);
return (5);
}
static void dummywr(struct IsdnCardState *cs, int chan, u_char off, u_char value)
@@ -34,7 +34,7 @@ netjet_u_interrupt(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
if (!((sval = bytein(cs->hw.njet.base + NETJET_IRQSTAT1)) &
NETJET_ISACIRQ)) {
NETJET_ISACIRQ)) {
val = NETjet_ReadIC(cs, ICC_ISTA);
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "tiger: i1 %x %x", sval, val);
@@ -47,17 +47,17 @@ netjet_u_interrupt(int intno, void *dev_id)
/* start new code 13/07/00 GE */
/* set bits in sval to indicate which page is free */
if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
/* the 2nd write page is free */
sval = 0x08;
else /* the 1st write page is free */
sval = 0x04;
sval = 0x04;
if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
/* the 2nd read page is free */
sval = sval | 0x02;
else /* the 1st read page is free */
sval = sval | 0x01;
sval = sval | 0x01;
if (sval != cs->hw.njet.last_is0) /* we have a DMA interrupt */
{
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
@@ -65,12 +65,12 @@ netjet_u_interrupt(int intno, void *dev_id)
return IRQ_HANDLED;
}
cs->hw.njet.irqstat0 = sval;
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
/* we have a read dma int */
read_tiger(cs);
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
(cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
(cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
/* we have a write dma int */
write_tiger(cs);
/* end new code 13/07/00 GE */
@@ -104,45 +104,45 @@ NETjet_U_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_netjet_u(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_netjet(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inittiger(cs);
reset_netjet_u(cs);
clear_pending_icc_ints(cs);
initicc(cs);
/* Reenable all IRQ */
cs->writeisac(cs, ICC_MASK, 0);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_netjet_u(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_netjet(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inittiger(cs);
reset_netjet_u(cs);
clear_pending_icc_ints(cs);
initicc(cs);
/* Reenable all IRQ */
cs->writeisac(cs, ICC_MASK, 0);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
static int __devinit nju_pci_probe(struct pci_dev *dev_netjet,
struct IsdnCardState *cs)
{
if (pci_enable_device(dev_netjet))
return(0);
return (0);
pci_set_master(dev_netjet);
cs->irq = dev_netjet->irq;
if (!cs->irq) {
printk(KERN_WARNING "NETspider-U: No IRQ for PCI card found\n");
return(0);
return (0);
}
cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
if (!cs->hw.njet.base) {
printk(KERN_WARNING "NETspider-U: No IO-Adr for PCI card found\n");
return(0);
return (0);
}
return (1);
@@ -171,18 +171,18 @@ static int __devinit nju_cs_init(struct IsdnCard *card,
byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
switch ( ( ( NETjet_ReadIC( cs, ICC_RBCH ) >> 5 ) & 3 ) )
switch (((NETjet_ReadIC(cs, ICC_RBCH) >> 5) & 3))
{
case 3 :
return 1; /* end loop */
case 3:
return 1; /* end loop */
case 0 :
printk( KERN_WARNING "NETspider-U: NETjet-S PCI card found\n" );
return -1; /* continue looping */
case 0:
printk(KERN_WARNING "NETspider-U: NETjet-S PCI card found\n");
return -1; /* continue looping */
default :
printk( KERN_WARNING "NETspider-U: No PCI card found\n" );
return 0; /* end loop & function */
default:
printk(KERN_WARNING "NETspider-U: No PCI card found\n");
return 0; /* end loop & function */
}
return 1; /* end loop */
}
@@ -193,8 +193,8 @@ static int __devinit nju_cs_init_rest(struct IsdnCard *card,
const int bytecnt = 256;
printk(KERN_INFO
"NETspider-U: PCI card configured at %#lx IRQ %d\n",
cs->hw.njet.base, cs->irq);
"NETspider-U: PCI card configured at %#lx IRQ %d\n",
cs->hw.njet.base, cs->irq);
if (!request_region(cs->hw.njet.base, bytecnt, "netspider-u isdn")) {
printk(KERN_WARNING
"HiSax: NETspider-U config port %#lx-%#lx "
@@ -235,19 +235,19 @@ setup_netjet_u(struct IsdnCard *card)
strcpy(tmp, NETjet_U_revision);
printk(KERN_INFO "HiSax: Traverse Tech. NETspider-U driver Rev. %s\n", HiSax_getrev(tmp));
if (cs->typ != ISDN_CTYPE_NETJET_U)
return(0);
return (0);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
for ( ;; )
for (;;)
{
if ((dev_netjet = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET,
PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
ret = nju_pci_probe(dev_netjet, cs);
if (!ret)
return(0);
return (0);
} else {
printk(KERN_WARNING "NETspider-U: No PCI card found\n");
return(0);
return (0);
}
ret = nju_cs_init(card, cs);

Visa fil

@@ -21,7 +21,7 @@
#include "l3_1tr6.h"
void
iecpy(u_char * dest, u_char * iestart, int ieoffset)
iecpy(u_char *dest, u_char *iestart, int ieoffset)
{
u_char *p;
int l;
@@ -215,7 +215,7 @@ prbits(char *dest, u_char b, int start, int len)
static
u_char *
skipext(u_char * p)
skipext(u_char *p)
{
while (!(*p++ & 0x80));
return (p);
@@ -442,7 +442,7 @@ struct CauseValue {
static
int
prcause(char *dest, u_char * p)
prcause(char *dest, u_char *p)
{
u_char *end;
char *dp = dest;
@@ -519,7 +519,7 @@ struct MessageType cause_1tr6[] =
static int cause_1tr6_len = ARRAY_SIZE(cause_1tr6);
static int
prcause_1tr6(char *dest, u_char * p)
prcause_1tr6(char *dest, u_char *p)
{
char *dp = dest;
int i, cause;
@@ -554,7 +554,7 @@ prcause_1tr6(char *dest, u_char * p)
}
static int
prchident(char *dest, u_char * p)
prchident(char *dest, u_char *p)
{
char *dp = dest;
@@ -566,7 +566,7 @@ prchident(char *dest, u_char * p)
}
static int
prcalled(char *dest, u_char * p)
prcalled(char *dest, u_char *p)
{
int l;
char *dp = dest;
@@ -583,7 +583,7 @@ prcalled(char *dest, u_char * p)
return (dp - dest);
}
static int
prcalling(char *dest, u_char * p)
prcalling(char *dest, u_char *p)
{
int l;
char *dp = dest;
@@ -610,7 +610,7 @@ prcalling(char *dest, u_char * p)
static
int
prbearer(char *dest, u_char * p)
prbearer(char *dest, u_char *p)
{
char *dp = dest, ch;
@@ -658,7 +658,7 @@ prbearer(char *dest, u_char * p)
static
int
prbearer_ni1(char *dest, u_char * p)
prbearer_ni1(char *dest, u_char *p)
{
char *dp = dest;
u_char len;
@@ -668,46 +668,46 @@ prbearer_ni1(char *dest, u_char * p)
dp += sprintf(dp, " octet 3 ");
dp += prbits(dp, *p, 8, 8);
switch (*p++) {
case 0x80:
dp += sprintf(dp, " Speech");
break;
case 0x88:
dp += sprintf(dp, " Unrestricted digital information");
break;
case 0x90:
dp += sprintf(dp, " 3.1 kHz audio");
break;
default:
dp += sprintf(dp, " Unknown information-transfer capability");
case 0x80:
dp += sprintf(dp, " Speech");
break;
case 0x88:
dp += sprintf(dp, " Unrestricted digital information");
break;
case 0x90:
dp += sprintf(dp, " 3.1 kHz audio");
break;
default:
dp += sprintf(dp, " Unknown information-transfer capability");
}
*dp++ = '\n';
dp += sprintf(dp, " octet 4 ");
dp += prbits(dp, *p, 8, 8);
switch (*p++) {
case 0x90:
dp += sprintf(dp, " 64 kbps, circuit mode");
break;
case 0xc0:
dp += sprintf(dp, " Packet mode");
break;
default:
dp += sprintf(dp, " Unknown transfer mode");
case 0x90:
dp += sprintf(dp, " 64 kbps, circuit mode");
break;
case 0xc0:
dp += sprintf(dp, " Packet mode");
break;
default:
dp += sprintf(dp, " Unknown transfer mode");
}
*dp++ = '\n';
if (len > 2) {
dp += sprintf(dp, " octet 5 ");
dp += prbits(dp, *p, 8, 8);
switch (*p++) {
case 0x21:
dp += sprintf(dp, " Rate adaption\n");
dp += sprintf(dp, " octet 5a ");
dp += prbits(dp, *p, 8, 8);
break;
case 0xa2:
dp += sprintf(dp, " u-law");
break;
default:
dp += sprintf(dp, " Unknown UI layer 1 protocol");
case 0x21:
dp += sprintf(dp, " Rate adaption\n");
dp += sprintf(dp, " octet 5a ");
dp += prbits(dp, *p, 8, 8);
break;
case 0xa2:
dp += sprintf(dp, " u-law");
break;
default:
dp += sprintf(dp, " Unknown UI layer 1 protocol");
}
*dp++ = '\n';
}
@@ -715,7 +715,7 @@ prbearer_ni1(char *dest, u_char * p)
}
static int
general(char *dest, u_char * p)
general(char *dest, u_char *p)
{
char *dp = dest;
char ch = ' ';
@@ -742,7 +742,7 @@ general(char *dest, u_char * p)
}
static int
general_ni1(char *dest, u_char * p)
general_ni1(char *dest, u_char *p)
{
char *dp = dest;
char ch = ' ';
@@ -769,7 +769,7 @@ general_ni1(char *dest, u_char * p)
}
static int
prcharge(char *dest, u_char * p)
prcharge(char *dest, u_char *p)
{
char *dp = dest;
int l;
@@ -786,7 +786,7 @@ prcharge(char *dest, u_char * p)
return (dp - dest);
}
static int
prtext(char *dest, u_char * p)
prtext(char *dest, u_char *p)
{
char *dp = dest;
int l;
@@ -802,7 +802,7 @@ prtext(char *dest, u_char * p)
}
static int
prfeatureind(char *dest, u_char * p)
prfeatureind(char *dest, u_char *p)
{
char *dp = dest;
@@ -817,21 +817,21 @@ prfeatureind(char *dest, u_char * p)
}
dp += sprintf(dp, " Status: ");
switch (*p) {
case 0:
dp += sprintf(dp, "Idle");
break;
case 1:
dp += sprintf(dp, "Active");
break;
case 2:
dp += sprintf(dp, "Prompt");
break;
case 3:
dp += sprintf(dp, "Pending");
break;
default:
dp += sprintf(dp, "(Reserved)");
break;
case 0:
dp += sprintf(dp, "Idle");
break;
case 1:
dp += sprintf(dp, "Active");
break;
case 2:
dp += sprintf(dp, "Prompt");
break;
case 3:
dp += sprintf(dp, "Pending");
break;
default:
dp += sprintf(dp, "(Reserved)");
break;
}
*dp++ = '\n';
return (dp - dest);
@@ -868,7 +868,7 @@ struct DTag { /* Display tags */
#define DTAGSIZE ARRAY_SIZE(dtaglist)
static int
disptext_ni1(char *dest, u_char * p)
disptext_ni1(char *dest, u_char *p)
{
char *dp = dest;
int l, tag, len, i;
@@ -902,12 +902,12 @@ disptext_ni1(char *dest, u_char * p)
*dp++ = *p++;
}
dp += sprintf(dp, "\n");
}
}
}
return (dp - dest);
}
static int
display(char *dest, u_char * p)
display(char *dest, u_char *p)
{
char *dp = dest;
char ch = ' ';
@@ -936,7 +936,7 @@ display(char *dest, u_char * p)
}
static int
prfacility(char *dest, u_char * p)
prfacility(char *dest, u_char *p)
{
char *dp = dest;
int l, l2;
@@ -1148,7 +1148,7 @@ static struct InformationElement we_6[] =
#define WE_6_LEN ARRAY_SIZE(we_6)
int
QuickHex(char *txt, u_char * p, int cnt)
QuickHex(char *txt, u_char *p, int cnt)
{
register int i;
register char *t = txt;
@@ -1163,7 +1163,7 @@ QuickHex(char *txt, u_char * p, int cnt)
}
void
LogFrame(struct IsdnCardState *cs, u_char * buf, int size)
LogFrame(struct IsdnCardState *cs, u_char *buf, int size)
{
char *dp;
@@ -1206,7 +1206,7 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
buf = skb->data;
dp += sprintf(dp, "frame %s ", dir ? "network->user" : "user->network");
size = skb->len;
if (tei == GROUP_TEI) {
if (sapi == CTRL_SAPI) { /* sapi 0 */
if (ftyp == 3) {
@@ -1291,28 +1291,28 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
/* Is it a single octet information element? */
if (*buf & 0x80) {
switch ((*buf >> 4) & 7) {
case 1:
dp += sprintf(dp, " Shift %x\n", *buf & 0xf);
cs_old = cset;
cset = *buf & 7;
cs_fest = *buf & 8;
break;
case 3:
dp += sprintf(dp, " Congestion level %x\n", *buf & 0xf);
break;
case 2:
if (*buf == 0xa0) {
dp += sprintf(dp, " More data\n");
break;
}
if (*buf == 0xa1) {
dp += sprintf(dp, " Sending complete\n");
}
break;
/* fall through */
default:
dp += sprintf(dp, " Reserved %x\n", *buf);
case 1:
dp += sprintf(dp, " Shift %x\n", *buf & 0xf);
cs_old = cset;
cset = *buf & 7;
cs_fest = *buf & 8;
break;
case 3:
dp += sprintf(dp, " Congestion level %x\n", *buf & 0xf);
break;
case 2:
if (*buf == 0xa0) {
dp += sprintf(dp, " More data\n");
break;
}
if (*buf == 0xa1) {
dp += sprintf(dp, " Sending complete\n");
}
break;
/* fall through */
default:
dp += sprintf(dp, " Reserved %x\n", *buf);
break;
}
buf++;
continue;
@@ -1366,11 +1366,11 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
/* display message type if it exists */
if (i == MTSIZE)
dp += sprintf(dp, "callref %d %s size %d unknown message type %x!\n",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
size, mt);
else
dp += sprintf(dp, "callref %d %s size %d message type %s\n",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
size, mtlist[i].descr);
/* display each information element */
@@ -1378,15 +1378,15 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
/* Is it a single octet information element? */
if (*buf & 0x80) {
switch ((*buf >> 4) & 7) {
case 1:
dp += sprintf(dp, " Shift %x\n", *buf & 0xf);
cs_old = cset;
cset = *buf & 7;
cs_fest = *buf & 8;
break;
default:
dp += sprintf(dp, " Unknown single-octet IE %x\n", *buf);
break;
case 1:
dp += sprintf(dp, " Shift %x\n", *buf & 0xf);
cs_old = cset;
cset = *buf & 7;
cs_fest = *buf & 8;
break;
default:
dp += sprintf(dp, " Unknown single-octet IE %x\n", *buf);
break;
}
buf++;
continue;
@@ -1452,11 +1452,11 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
/* display message type if it exists */
if (i == MTSIZE)
dp += sprintf(dp, "callref %d %s size %d unknown message type %x!\n",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
size, mt);
else
dp += sprintf(dp, "callref %d %s size %d message type %s\n",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
size, mtlist[i].descr);
/* display each information element */
@@ -1464,28 +1464,28 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
/* Is it a single octet information element? */
if (*buf & 0x80) {
switch ((*buf >> 4) & 7) {
case 1:
dp += sprintf(dp, " Shift %x\n", *buf & 0xf);
break;
case 3:
dp += sprintf(dp, " Congestion level %x\n", *buf & 0xf);
break;
case 5:
dp += sprintf(dp, " Repeat indicator %x\n", *buf & 0xf);
break;
case 2:
if (*buf == 0xa0) {
dp += sprintf(dp, " More data\n");
break;
}
if (*buf == 0xa1) {
dp += sprintf(dp, " Sending complete\n");
}
break;
/* fall through */
default:
dp += sprintf(dp, " Reserved %x\n", *buf);
case 1:
dp += sprintf(dp, " Shift %x\n", *buf & 0xf);
break;
case 3:
dp += sprintf(dp, " Congestion level %x\n", *buf & 0xf);
break;
case 5:
dp += sprintf(dp, " Repeat indicator %x\n", *buf & 0xf);
break;
case 2:
if (*buf == 0xa0) {
dp += sprintf(dp, " More data\n");
break;
}
if (*buf == 0xa1) {
dp += sprintf(dp, " Sending complete\n");
}
break;
/* fall through */
default:
dp += sprintf(dp, " Reserved %x\n", *buf);
break;
}
buf++;
continue;

Visa fil

@@ -20,73 +20,73 @@ static const char *s0box_revision = "$Revision: 2.6.2.4 $";
static inline void
writereg(unsigned int padr, signed int addr, u_char off, u_char val) {
outb_p(0x1c,padr+2);
outb_p(0x14,padr+2);
outb_p((addr+off)&0x7f,padr);
outb_p(0x16,padr+2);
outb_p(val,padr);
outb_p(0x17,padr+2);
outb_p(0x14,padr+2);
outb_p(0x1c,padr+2);
outb_p(0x1c, padr + 2);
outb_p(0x14, padr + 2);
outb_p((addr + off) & 0x7f, padr);
outb_p(0x16, padr + 2);
outb_p(val, padr);
outb_p(0x17, padr + 2);
outb_p(0x14, padr + 2);
outb_p(0x1c, padr + 2);
}
static u_char nibtab[] = { 1, 9, 5, 0xd, 3, 0xb, 7, 0xf,
0, 0, 0, 0, 0, 0, 0, 0,
0, 8, 4, 0xc, 2, 0xa, 6, 0xe } ;
0, 0, 0, 0, 0, 0, 0, 0,
0, 8, 4, 0xc, 2, 0xa, 6, 0xe };
static inline u_char
readreg(unsigned int padr, signed int addr, u_char off) {
register u_char n1, n2;
outb_p(0x1c,padr+2);
outb_p(0x14,padr+2);
outb_p((addr+off)|0x80,padr);
outb_p(0x16,padr+2);
outb_p(0x17,padr+2);
n1 = (inb_p(padr+1) >> 3) & 0x17;
outb_p(0x16,padr+2);
n2 = (inb_p(padr+1) >> 3) & 0x17;
outb_p(0x14,padr+2);
outb_p(0x1c,padr+2);
outb_p(0x1c, padr + 2);
outb_p(0x14, padr + 2);
outb_p((addr + off) | 0x80, padr);
outb_p(0x16, padr + 2);
outb_p(0x17, padr + 2);
n1 = (inb_p(padr + 1) >> 3) & 0x17;
outb_p(0x16, padr + 2);
n2 = (inb_p(padr + 1) >> 3) & 0x17;
outb_p(0x14, padr + 2);
outb_p(0x1c, padr + 2);
return nibtab[n1] | (nibtab[n2] << 4);
}
static inline void
read_fifo(unsigned int padr, signed int adr, u_char * data, int size)
read_fifo(unsigned int padr, signed int adr, u_char *data, int size)
{
int i;
register u_char n1, n2;
outb_p(0x1c, padr+2);
outb_p(0x14, padr+2);
outb_p(adr|0x80, padr);
outb_p(0x16, padr+2);
for (i=0; i<size; i++) {
outb_p(0x17, padr+2);
n1 = (inb_p(padr+1) >> 3) & 0x17;
outb_p(0x16,padr+2);
n2 = (inb_p(padr+1) >> 3) & 0x17;
*(data++)=nibtab[n1] | (nibtab[n2] << 4);
outb_p(0x1c, padr + 2);
outb_p(0x14, padr + 2);
outb_p(adr | 0x80, padr);
outb_p(0x16, padr + 2);
for (i = 0; i < size; i++) {
outb_p(0x17, padr + 2);
n1 = (inb_p(padr + 1) >> 3) & 0x17;
outb_p(0x16, padr + 2);
n2 = (inb_p(padr + 1) >> 3) & 0x17;
*(data++) = nibtab[n1] | (nibtab[n2] << 4);
}
outb_p(0x14,padr+2);
outb_p(0x1c,padr+2);
outb_p(0x14, padr + 2);
outb_p(0x1c, padr + 2);
return;
}
static inline void
write_fifo(unsigned int padr, signed int adr, u_char * data, int size)
write_fifo(unsigned int padr, signed int adr, u_char *data, int size)
{
int i;
outb_p(0x1c, padr+2);
outb_p(0x14, padr+2);
outb_p(adr&0x7f, padr);
for (i=0; i<size; i++) {
outb_p(0x16, padr+2);
outb_p(0x1c, padr + 2);
outb_p(0x14, padr + 2);
outb_p(adr & 0x7f, padr);
for (i = 0; i < size; i++) {
outb_p(0x16, padr + 2);
outb_p(*(data++), padr);
outb_p(0x17, padr+2);
outb_p(0x17, padr + 2);
}
outb_p(0x14,padr+2);
outb_p(0x1c,padr+2);
outb_p(0x14, padr + 2);
outb_p(0x1c, padr + 2);
return;
}
@@ -105,13 +105,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
read_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.isacfifo, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
write_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.isacfifo, data, size);
}
@@ -150,11 +150,11 @@ s0box_interrupt(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[1], HSCX_ISTA);
Start_HSCX:
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val)
isac_interrupt(cs, val);
count++;
@@ -194,20 +194,20 @@ S0Box_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
break;
case CARD_RELEASE:
release_io_s0box(cs);
break;
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case CARD_TEST:
break;
case CARD_RESET:
break;
case CARD_RELEASE:
release_io_s0box(cs);
break;
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case CARD_TEST:
break;
}
return(0);
return (0);
}
int __devinit
@@ -229,17 +229,17 @@ setup_s0box(struct IsdnCard *card)
cs->hw.teles3.hscxfifo[0] = cs->hw.teles3.hscx[0] + 0x3e;
cs->hw.teles3.hscxfifo[1] = cs->hw.teles3.hscx[1] + 0x3e;
cs->irq = card->para[0];
if (!request_region(cs->hw.teles3.cfg_reg,8, "S0Box parallel I/O")) {
if (!request_region(cs->hw.teles3.cfg_reg, 8, "S0Box parallel I/O")) {
printk(KERN_WARNING "HiSax: S0Box ports %x-%x already in use\n",
cs->hw.teles3.cfg_reg,
cs->hw.teles3.cfg_reg + 7);
cs->hw.teles3.cfg_reg,
cs->hw.teles3.cfg_reg + 7);
return 0;
}
printk(KERN_INFO "HiSax: S0Box config irq:%d isac:0x%x cfg:0x%x\n",
cs->irq,
cs->hw.teles3.isac, cs->hw.teles3.cfg_reg);
cs->irq,
cs->hw.teles3.isac, cs->hw.teles3.cfg_reg);
printk(KERN_INFO "HiSax: hscx A:0x%x hscx B:0x%x\n",
cs->hw.teles3.hscx[0], cs->hw.teles3.hscx[1]);
cs->hw.teles3.hscx[0], cs->hw.teles3.hscx[1]);
setup_isac(cs);
cs->readisac = &ReadISAC;
cs->writeisac = &WriteISAC;

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -20,7 +20,7 @@
static char *saphir_rev = "$Revision: 1.10.2.4 $";
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
#define ISAC_DATA 0
@@ -41,7 +41,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
}
static inline void
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
insb(adr, data, size);
@@ -56,7 +56,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
}
static inline void
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
outsb(adr, data, size);
@@ -77,13 +77,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.saphir.ale, cs->hw.saphir.isac, 0, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.saphir.ale, cs->hw.saphir.isac, 0, data, size);
}
@@ -92,26 +92,26 @@ static u_char
ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
{
return (readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx,
offset + (hscx ? 0x40 : 0)));
offset + (hscx ? 0x40 : 0)));
}
static void
WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
{
writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx,
offset + (hscx ? 0x40 : 0), value);
offset + (hscx ? 0x40 : 0), value);
}
#define READHSCX(cs, nr, reg) readreg(cs->hw.saphir.ale, \
cs->hw.saphir.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.saphir.ale, \
cs->hw.saphir.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCX(cs, nr, reg) readreg(cs->hw.saphir.ale, \
cs->hw.saphir.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.saphir.ale, \
cs->hw.saphir.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.saphir.ale, \
cs->hw.saphir.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.saphir.ale, \
cs->hw.saphir.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.saphir.ale, \
cs->hw.saphir.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.saphir.ale, \
cs->hw.saphir.hscx, (nr ? 0x40 : 0), ptr, cnt)
#include "hscx_irq.c"
@@ -124,11 +124,11 @@ saphir_interrupt(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
val = readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_ISTA + 0x40);
Start_HSCX:
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs->hw.saphir.ale, cs->hw.saphir.isac, ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_ISTA + 0x40);
@@ -144,8 +144,8 @@ saphir_interrupt(int intno, void *dev_id)
goto Start_ISAC;
}
/* Watchdog */
if (cs->hw.saphir.timer.function)
mod_timer(&cs->hw.saphir.timer, jiffies+1*HZ);
if (cs->hw.saphir.timer.function)
mod_timer(&cs->hw.saphir.timer, jiffies + 1 * HZ);
else
printk(KERN_WARNING "saphir: Spurious timer!\n");
writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_MASK, 0xFF);
@@ -164,10 +164,10 @@ SaphirWatchDog(struct IsdnCardState *cs)
u_long flags;
spin_lock_irqsave(&cs->lock, flags);
/* 5 sec WatchDog, so read at least every 4 sec */
/* 5 sec WatchDog, so read at least every 4 sec */
cs->readisac(cs, ISAC_RBCH);
spin_unlock_irqrestore(&cs->lock, flags);
mod_timer(&cs->hw.saphir.timer, jiffies+1*HZ);
mod_timer(&cs->hw.saphir.timer, jiffies + 1 * HZ);
}
static void
@@ -185,24 +185,24 @@ saphir_reset(struct IsdnCardState *cs)
{
u_char irq_val;
switch(cs->irq) {
case 5: irq_val = 0;
break;
case 3: irq_val = 1;
break;
case 11:
irq_val = 2;
break;
case 12:
irq_val = 3;
break;
case 15:
irq_val = 4;
break;
default:
printk(KERN_WARNING "HiSax: saphir wrong IRQ %d\n",
cs->irq);
return (1);
switch (cs->irq) {
case 5: irq_val = 0;
break;
case 3: irq_val = 1;
break;
case 11:
irq_val = 2;
break;
case 12:
irq_val = 3;
break;
case 15:
irq_val = 4;
break;
default:
printk(KERN_WARNING "HiSax: saphir wrong IRQ %d\n",
cs->irq);
return (1);
}
byteout(cs->hw.saphir.cfg_reg + IRQ_REG, irq_val);
byteout(cs->hw.saphir.cfg_reg + RESET_REG, 1);
@@ -220,23 +220,23 @@ saphir_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
saphir_reset(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_saphir(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
saphir_reset(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_saphir(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
@@ -259,9 +259,9 @@ setup_saphir(struct IsdnCard *card)
cs->irq = card->para[0];
if (!request_region(cs->hw.saphir.cfg_reg, 6, "saphir")) {
printk(KERN_WARNING
"HiSax: HST Saphir config port %x-%x already in use\n",
cs->hw.saphir.cfg_reg,
cs->hw.saphir.cfg_reg + 5);
"HiSax: HST Saphir config port %x-%x already in use\n",
cs->hw.saphir.cfg_reg,
cs->hw.saphir.cfg_reg + 5);
return (0);
}
@@ -272,7 +272,7 @@ setup_saphir(struct IsdnCard *card)
cs->hw.saphir.timer.function = (void *) SaphirWatchDog;
cs->hw.saphir.timer.data = (long) cs;
init_timer(&cs->hw.saphir.timer);
cs->hw.saphir.timer.expires = jiffies + 4*HZ;
cs->hw.saphir.timer.expires = jiffies + 4 * HZ;
add_timer(&cs->hw.saphir.timer);
if (saphir_reset(cs)) {
release_io_saphir(cs);
@@ -290,7 +290,7 @@ setup_saphir(struct IsdnCard *card)
ISACVersion(cs, "saphir:");
if (HscxVersion(cs, "saphir:")) {
printk(KERN_WARNING
"saphir: wrong HSCX versions check IO address\n");
"saphir: wrong HSCX versions check IO address\n");
release_io_saphir(cs);
return (0);
}

Visa fil

@@ -9,7 +9,7 @@
*
* Author Marcus Niemann
* Copyright by Marcus Niemann <niemann@www-bib.fh-bielefeld.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -30,13 +30,13 @@
* ISDN PC/104 IPAC DIP-SWITCH
* Speed Star2 IPAC CARDMGR
* Speed PCI IPAC PCI PNP
* Speed Fax+ ISAC_ISAR PCI PNP Full analog support
* Speed Fax+ ISAC_ISAR PCI PNP Full analog support
*
* Important:
* For the sedlbauer speed fax+ to work properly you have to download
* the firmware onto the card.
* For example: hisaxctrl <DriverID> 9 ISAR.BIN
*/
*/
#include <linux/init.h>
#include "hisax.h"
@@ -51,9 +51,9 @@
static const char *Sedlbauer_revision = "$Revision: 1.34.2.6 $";
static const char *Sedlbauer_Types[] =
{"None", "speed card/win", "speed star", "speed fax+",
"speed win II / ISDN PC/104", "speed star II", "speed pci",
"speed fax+ pyramid", "speed fax+ pci", "HST Saphir III"};
{"None", "speed card/win", "speed star", "speed fax+",
"speed win II / ISDN PC/104", "speed star II", "speed pci",
"speed fax+ pyramid", "speed fax+ pci", "HST Saphir III"};
#define PCI_SUBVENDOR_SPEEDFAX_PYRAMID 0x51
#define PCI_SUBVENDOR_HST_SAPHIR3 0x52
@@ -62,11 +62,11 @@ static const char *Sedlbauer_Types[] =
#define PCI_SUB_ID_SEDLBAUER 0x01
#define SEDL_SPEED_CARD_WIN 1
#define SEDL_SPEED_STAR 2
#define SEDL_SPEED_STAR 2
#define SEDL_SPEED_FAX 3
#define SEDL_SPEED_WIN2_PC104 4
#define SEDL_SPEED_STAR2 5
#define SEDL_SPEED_PCI 6
#define SEDL_SPEED_WIN2_PC104 4
#define SEDL_SPEED_STAR2 5
#define SEDL_SPEED_PCI 6
#define SEDL_SPEEDFAX_PYRAMID 7
#define SEDL_SPEEDFAX_PCI 8
#define HST_SAPHIR3 9
@@ -80,7 +80,7 @@ static const char *Sedlbauer_Types[] =
#define SEDL_BUS_PCI 2
#define SEDL_BUS_PCMCIA 3
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
#define SEDL_HSCX_ISA_RESET_ON 0
@@ -127,7 +127,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
}
static inline void
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
insb(adr, data, size);
@@ -142,7 +142,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
}
static inline void
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
byteout(ale, off);
outsb(adr, data, size);
@@ -163,13 +163,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0, data, size);
}
@@ -177,23 +177,23 @@ WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
static u_char
ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset)
{
return (readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset|0x80));
return (readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset | 0x80));
}
static void
WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value)
{
writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset|0x80, value);
writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset | 0x80, value);
}
static void
ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
{
readfifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0x80, data, size);
}
static void
WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
{
writefifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0x80, data, size);
}
@@ -220,12 +220,12 @@ WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
static u_char
ReadISAR(struct IsdnCardState *cs, int mode, u_char offset)
{
{
if (mode == 0)
return (readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, offset));
else if (mode == 1)
byteout(cs->hw.sedl.adr, offset);
return(bytein(cs->hw.sedl.hscx));
return (bytein(cs->hw.sedl.hscx));
}
static void
@@ -244,16 +244,16 @@ WriteISAR(struct IsdnCardState *cs, int mode, u_char offset, u_char value)
* fast interrupt HSCX stuff goes here
*/
#define READHSCX(cs, nr, reg) readreg(cs->hw.sedl.adr, \
cs->hw.sedl.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.sedl.adr, \
cs->hw.sedl.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCX(cs, nr, reg) readreg(cs->hw.sedl.adr, \
cs->hw.sedl.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.sedl.adr, \
cs->hw.sedl.hscx, reg + (nr ? 0x40 : 0), data)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.sedl.adr, \
cs->hw.sedl.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.sedl.adr, \
cs->hw.sedl.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.sedl.adr, \
cs->hw.sedl.hscx, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.sedl.adr, \
cs->hw.sedl.hscx, (nr ? 0x40 : 0), ptr, cnt)
#include "hscx_irq.c"
@@ -274,11 +274,11 @@ sedlbauer_interrupt(int intno, void *dev_id)
}
val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, HSCX_ISTA + 0x40);
Start_HSCX:
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, HSCX_ISTA + 0x40);
@@ -360,11 +360,11 @@ sedlbauer_interrupt_isar(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, ISAR_IRQBIT);
Start_ISAR:
Start_ISAR:
if (val & ISAR_IRQSTA)
isar_int_main(cs);
val = readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, ISAR_IRQBIT);
@@ -411,7 +411,7 @@ reset_sedlbauer(struct IsdnCardState *cs)
printk(KERN_INFO "Sedlbauer: resetting card\n");
if (!((cs->hw.sedl.bus == SEDL_BUS_PCMCIA) &&
(cs->hw.sedl.chip == SEDL_CHIP_ISAC_HSCX))) {
(cs->hw.sedl.chip == SEDL_CHIP_ISAC_HSCX))) {
if (cs->hw.sedl.chip == SEDL_CHIP_IPAC) {
writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, IPAC_POTA2, 0x20);
mdelay(2);
@@ -423,12 +423,12 @@ reset_sedlbauer(struct IsdnCardState *cs)
writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, IPAC_MASK, 0xc0);
writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, IPAC_PCFG, 0x12);
} else if ((cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) &&
(cs->hw.sedl.bus == SEDL_BUS_PCI)) {
byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_on);
(cs->hw.sedl.bus == SEDL_BUS_PCI)) {
byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_on);
mdelay(2);
byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_off);
byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_off);
mdelay(10);
} else {
} else {
byteout(cs->hw.sedl.reset_on, SEDL_RESET); /* Reset On */
mdelay(2);
byteout(cs->hw.sedl.reset_off, 0); /* Reset Off */
@@ -443,86 +443,86 @@ Sedl_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_sedlbauer(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
if (cs->hw.sedl.bus == SEDL_BUS_PCI)
/* disable all IRQ */
byteout(cs->hw.sedl.cfg_reg + 5, 0);
if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) {
spin_lock_irqsave(&cs->lock, flags);
writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx,
ISAR_IRQBIT, 0);
writereg(cs->hw.sedl.adr, cs->hw.sedl.isac,
ISAC_MASK, 0xFF);
reset_sedlbauer(cs);
writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx,
ISAR_IRQBIT, 0);
writereg(cs->hw.sedl.adr, cs->hw.sedl.isac,
ISAC_MASK, 0xFF);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
if (cs->hw.sedl.bus == SEDL_BUS_PCI)
/* disable all IRQ */
byteout(cs->hw.sedl.cfg_reg+ 5, 0);
if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) {
spin_lock_irqsave(&cs->lock, flags);
writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx,
ISAR_IRQBIT, 0);
writereg(cs->hw.sedl.adr, cs->hw.sedl.isac,
ISAC_MASK, 0xFF);
reset_sedlbauer(cs);
writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx,
ISAR_IRQBIT, 0);
writereg(cs->hw.sedl.adr, cs->hw.sedl.isac,
ISAC_MASK, 0xFF);
spin_unlock_irqrestore(&cs->lock, flags);
}
release_io_sedlbauer(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
if (cs->hw.sedl.bus == SEDL_BUS_PCI)
/* enable all IRQ */
byteout(cs->hw.sedl.cfg_reg+ 5, 0x02);
reset_sedlbauer(cs);
if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) {
clear_pending_isac_ints(cs);
writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx,
ISAR_IRQBIT, 0);
initisac(cs);
initisar(cs);
/* Reenable all IRQ */
cs->writeisac(cs, ISAC_MASK, 0);
/* RESET Receiver and Transmitter */
cs->writeisac(cs, ISAC_CMDR, 0x41);
} else {
inithscxisac(cs, 3);
}
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case MDL_INFO_CONN:
if (cs->subtyp != SEDL_SPEEDFAX_PYRAMID)
return(0);
spin_lock_irqsave(&cs->lock, flags);
if ((long) arg)
cs->hw.sedl.reset_off &= ~SEDL_ISAR_PCI_LED2;
else
cs->hw.sedl.reset_off &= ~SEDL_ISAR_PCI_LED1;
byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_off);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case MDL_INFO_REL:
if (cs->subtyp != SEDL_SPEEDFAX_PYRAMID)
return(0);
spin_lock_irqsave(&cs->lock, flags);
if ((long) arg)
cs->hw.sedl.reset_off |= SEDL_ISAR_PCI_LED2;
else
cs->hw.sedl.reset_off |= SEDL_ISAR_PCI_LED1;
byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_off);
spin_unlock_irqrestore(&cs->lock, flags);
break;
}
release_io_sedlbauer(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
if (cs->hw.sedl.bus == SEDL_BUS_PCI)
/* enable all IRQ */
byteout(cs->hw.sedl.cfg_reg + 5, 0x02);
reset_sedlbauer(cs);
if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) {
clear_pending_isac_ints(cs);
writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx,
ISAR_IRQBIT, 0);
initisac(cs);
initisar(cs);
/* Reenable all IRQ */
cs->writeisac(cs, ISAC_MASK, 0);
/* RESET Receiver and Transmitter */
cs->writeisac(cs, ISAC_CMDR, 0x41);
} else {
inithscxisac(cs, 3);
}
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
case MDL_INFO_CONN:
if (cs->subtyp != SEDL_SPEEDFAX_PYRAMID)
return (0);
spin_lock_irqsave(&cs->lock, flags);
if ((long) arg)
cs->hw.sedl.reset_off &= ~SEDL_ISAR_PCI_LED2;
else
cs->hw.sedl.reset_off &= ~SEDL_ISAR_PCI_LED1;
byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_off);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case MDL_INFO_REL:
if (cs->subtyp != SEDL_SPEEDFAX_PYRAMID)
return (0);
spin_lock_irqsave(&cs->lock, flags);
if ((long) arg)
cs->hw.sedl.reset_off |= SEDL_ISAR_PCI_LED2;
else
cs->hw.sedl.reset_off |= SEDL_ISAR_PCI_LED1;
byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_off);
spin_unlock_irqrestore(&cs->lock, flags);
break;
}
return(0);
return (0);
}
#ifdef __ISAPNP__
static struct isapnp_device_id sedl_ids[] __devinitdata = {
{ ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x01),
ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x01),
ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x01),
(unsigned long) "Speed win" },
{ ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x02),
ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x02),
ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x02),
(unsigned long) "Speed Fax+" },
{ 0, }
};
@@ -539,31 +539,31 @@ setup_sedlbauer_isapnp(struct IsdnCard *card, int *bytecnt)
if (!isapnp_present())
return -1;
while(ipid->card_vendor) {
while (ipid->card_vendor) {
if ((pnp_c = pnp_find_card(ipid->card_vendor,
ipid->card_device, pnp_c))) {
ipid->card_device, pnp_c))) {
pnp_d = NULL;
if ((pnp_d = pnp_find_dev(pnp_c,
ipid->vendor, ipid->function, pnp_d))) {
ipid->vendor, ipid->function, pnp_d))) {
int err;
printk(KERN_INFO "HiSax: %s detected\n",
(char *)ipid->driver_data);
(char *)ipid->driver_data);
pnp_disable_dev(pnp_d);
err = pnp_activate_dev(pnp_d);
if (err<0) {
if (err < 0) {
printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
__func__, err);
return(0);
__func__, err);
return (0);
}
card->para[1] = pnp_port_start(pnp_d, 0);
card->para[0] = pnp_irq(pnp_d, 0);
if (!card->para[0] || !card->para[1]) {
printk(KERN_ERR "Sedlbauer PnP:some resources are missing %ld/%lx\n",
card->para[0], card->para[1]);
card->para[0], card->para[1]);
pnp_disable_dev(pnp_d);
return(0);
return (0);
}
cs->hw.sedl.cfg_reg = card->para[1];
cs->irq = card->para[0];
@@ -579,12 +579,12 @@ setup_sedlbauer_isapnp(struct IsdnCard *card, int *bytecnt)
return (1);
} else {
printk(KERN_ERR "Sedlbauer PnP: PnP error card found, no device\n");
return(0);
return (0);
}
}
ipid++;
pnp_c = NULL;
}
}
printk(KERN_INFO "Sedlbauer PnP: no ISAPnP card found\n");
return -1;
@@ -608,30 +608,30 @@ setup_sedlbauer_pci(struct IsdnCard *card)
u16 sub_vendor_id, sub_id;
if ((dev_sedl = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET,
PCI_DEVICE_ID_TIGERJET_100, dev_sedl))) {
PCI_DEVICE_ID_TIGERJET_100, dev_sedl))) {
if (pci_enable_device(dev_sedl))
return(0);
return (0);
cs->irq = dev_sedl->irq;
if (!cs->irq) {
printk(KERN_WARNING "Sedlbauer: No IRQ for PCI card found\n");
return(0);
return (0);
}
cs->hw.sedl.cfg_reg = pci_resource_start(dev_sedl, 0);
} else {
printk(KERN_WARNING "Sedlbauer: No PCI card found\n");
return(0);
return (0);
}
cs->irq_flags |= IRQF_SHARED;
cs->hw.sedl.bus = SEDL_BUS_PCI;
sub_vendor_id = dev_sedl->subsystem_vendor;
sub_id = dev_sedl->subsystem_device;
printk(KERN_INFO "Sedlbauer: PCI subvendor:%x subid %x\n",
sub_vendor_id, sub_id);
sub_vendor_id, sub_id);
printk(KERN_INFO "Sedlbauer: PCI base adr %#x\n",
cs->hw.sedl.cfg_reg);
cs->hw.sedl.cfg_reg);
if (sub_id != PCI_SUB_ID_SEDLBAUER) {
printk(KERN_ERR "Sedlbauer: unknown sub id %#x\n", sub_id);
return(0);
return (0);
}
if (sub_vendor_id == PCI_SUBVENDOR_SPEEDFAX_PYRAMID) {
cs->hw.sedl.chip = SEDL_CHIP_ISAC_ISAR;
@@ -647,19 +647,19 @@ setup_sedlbauer_pci(struct IsdnCard *card)
cs->subtyp = SEDL_SPEED_PCI;
} else {
printk(KERN_ERR "Sedlbauer: unknown sub vendor id %#x\n",
sub_vendor_id);
return(0);
sub_vendor_id);
return (0);
}
cs->hw.sedl.reset_on = SEDL_ISAR_PCI_ISAR_RESET_ON;
cs->hw.sedl.reset_off = SEDL_ISAR_PCI_ISAR_RESET_OFF;
byteout(cs->hw.sedl.cfg_reg, 0xff);
byteout(cs->hw.sedl.cfg_reg, 0x00);
byteout(cs->hw.sedl.cfg_reg+ 2, 0xdd);
byteout(cs->hw.sedl.cfg_reg+ 5, 0); /* disable all IRQ */
byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_on);
byteout(cs->hw.sedl.cfg_reg + 2, 0xdd);
byteout(cs->hw.sedl.cfg_reg + 5, 0); /* disable all IRQ */
byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_on);
mdelay(2);
byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_off);
byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_off);
mdelay(10);
return (1);
@@ -684,20 +684,20 @@ setup_sedlbauer(struct IsdnCard *card)
strcpy(tmp, Sedlbauer_revision);
printk(KERN_INFO "HiSax: Sedlbauer driver Rev. %s\n", HiSax_getrev(tmp));
if (cs->typ == ISDN_CTYPE_SEDLBAUER) {
cs->subtyp = SEDL_SPEED_CARD_WIN;
if (cs->typ == ISDN_CTYPE_SEDLBAUER) {
cs->subtyp = SEDL_SPEED_CARD_WIN;
cs->hw.sedl.bus = SEDL_BUS_ISA;
cs->hw.sedl.chip = SEDL_CHIP_TEST;
} else if (cs->typ == ISDN_CTYPE_SEDLBAUER_PCMCIA) {
cs->subtyp = SEDL_SPEED_STAR;
} else if (cs->typ == ISDN_CTYPE_SEDLBAUER_PCMCIA) {
cs->subtyp = SEDL_SPEED_STAR;
cs->hw.sedl.bus = SEDL_BUS_PCMCIA;
cs->hw.sedl.chip = SEDL_CHIP_TEST;
} else if (cs->typ == ISDN_CTYPE_SEDLBAUER_FAX) {
cs->subtyp = SEDL_SPEED_FAX;
} else if (cs->typ == ISDN_CTYPE_SEDLBAUER_FAX) {
cs->subtyp = SEDL_SPEED_FAX;
cs->hw.sedl.bus = SEDL_BUS_ISA;
cs->hw.sedl.chip = SEDL_CHIP_ISAC_ISAR;
} else
} else
return (0);
bytecnt = 8;
@@ -720,22 +720,22 @@ setup_sedlbauer(struct IsdnCard *card)
return (0);
bytecnt = 256;
}
}
ready:
ready:
/* In case of the sedlbauer pcmcia card, this region is in use,
* reserved for us by the card manager. So we do not check it
* here, it would fail.
*/
if (cs->hw.sedl.bus != SEDL_BUS_PCMCIA &&
!request_region(cs->hw.sedl.cfg_reg, bytecnt, "sedlbauer isdn")) {
!request_region(cs->hw.sedl.cfg_reg, bytecnt, "sedlbauer isdn")) {
printk(KERN_WARNING
"HiSax: %s config port %x-%x already in use\n",
CardType[card->typ],
cs->hw.sedl.cfg_reg,
cs->hw.sedl.cfg_reg + bytecnt);
return (0);
"HiSax: %s config port %x-%x already in use\n",
CardType[card->typ],
cs->hw.sedl.cfg_reg,
cs->hw.sedl.cfg_reg + bytecnt);
return (0);
}
printk(KERN_INFO
@@ -753,12 +753,12 @@ ready:
* testing ISA and PCMCIA Cards for IPAC, default is ISAC
* do not test for PCI card, because ports are different
* and PCI card uses only IPAC (for the moment)
*/
*/
if (cs->hw.sedl.bus != SEDL_BUS_PCI) {
val = readreg(cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_ADR,
cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_IPAC, IPAC_ID);
cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_IPAC, IPAC_ID);
printk(KERN_DEBUG "Sedlbauer: testing IPAC version %x\n", val);
if ((val == 1) || (val == 2)) {
if ((val == 1) || (val == 2)) {
/* IPAC */
cs->subtyp = SEDL_SPEED_WIN2_PC104;
if (cs->hw.sedl.bus == SEDL_BUS_PCMCIA) {
@@ -777,16 +777,16 @@ ready:
* hw.sedl.chip is now properly set
*/
printk(KERN_INFO "Sedlbauer: %s detected\n",
Sedlbauer_Types[cs->subtyp]);
Sedlbauer_Types[cs->subtyp]);
setup_isac(cs);
if (cs->hw.sedl.chip == SEDL_CHIP_IPAC) {
if (cs->hw.sedl.bus == SEDL_BUS_PCI) {
cs->hw.sedl.adr = cs->hw.sedl.cfg_reg + SEDL_IPAC_PCI_ADR;
cs->hw.sedl.adr = cs->hw.sedl.cfg_reg + SEDL_IPAC_PCI_ADR;
cs->hw.sedl.isac = cs->hw.sedl.cfg_reg + SEDL_IPAC_PCI_IPAC;
cs->hw.sedl.hscx = cs->hw.sedl.cfg_reg + SEDL_IPAC_PCI_IPAC;
} else {
cs->hw.sedl.adr = cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_ADR;
cs->hw.sedl.adr = cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_ADR;
cs->hw.sedl.isac = cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_IPAC;
cs->hw.sedl.hscx = cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_IPAC;
}
@@ -807,22 +807,22 @@ ready:
if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) {
if (cs->hw.sedl.bus == SEDL_BUS_PCI) {
cs->hw.sedl.adr = cs->hw.sedl.cfg_reg +
SEDL_ISAR_PCI_ADR;
SEDL_ISAR_PCI_ADR;
cs->hw.sedl.isac = cs->hw.sedl.cfg_reg +
SEDL_ISAR_PCI_ISAC;
SEDL_ISAR_PCI_ISAC;
cs->hw.sedl.hscx = cs->hw.sedl.cfg_reg +
SEDL_ISAR_PCI_ISAR;
SEDL_ISAR_PCI_ISAR;
} else {
cs->hw.sedl.adr = cs->hw.sedl.cfg_reg +
SEDL_ISAR_ISA_ADR;
SEDL_ISAR_ISA_ADR;
cs->hw.sedl.isac = cs->hw.sedl.cfg_reg +
SEDL_ISAR_ISA_ISAC;
SEDL_ISAR_ISA_ISAC;
cs->hw.sedl.hscx = cs->hw.sedl.cfg_reg +
SEDL_ISAR_ISA_ISAR;
SEDL_ISAR_ISA_ISAR;
cs->hw.sedl.reset_on = cs->hw.sedl.cfg_reg +
SEDL_ISAR_ISA_ISAR_RESET_ON;
SEDL_ISAR_ISA_ISAR_RESET_ON;
cs->hw.sedl.reset_off = cs->hw.sedl.cfg_reg +
SEDL_ISAR_ISA_ISAR_RESET_OFF;
SEDL_ISAR_ISA_ISAR_RESET_OFF;
}
cs->bcs[0].hw.isar.reg = &cs->hw.sedl.isar;
cs->bcs[1].hw.isar.reg = &cs->hw.sedl.isar;
@@ -838,7 +838,7 @@ ready:
ver = ISARVersion(cs, "Sedlbauer:");
if (ver < 0)
printk(KERN_WARNING
"Sedlbauer: wrong ISAR version (ret = %d)\n", ver);
"Sedlbauer: wrong ISAR version (ret = %d)\n", ver);
else
break;
reset_sedlbauer(cs);
@@ -865,10 +865,10 @@ ready:
}
cs->irq_func = &sedlbauer_interrupt;
ISACVersion(cs, "Sedlbauer:");
if (HscxVersion(cs, "Sedlbauer:")) {
printk(KERN_WARNING
"Sedlbauer: wrong HSCX versions check IO address\n");
"Sedlbauer: wrong HSCX versions check IO address\n");
release_io_sedlbauer(cs);
return (0);
}

Visa fil

@@ -1,39 +1,39 @@
/*======================================================================
A Sedlbauer PCMCIA client driver
A Sedlbauer PCMCIA client driver
This driver is for the Sedlbauer Speed Star and Speed Star II,
which are ISDN PCMCIA Cards.
The contents of this file are subject to the Mozilla Public
License Version 1.1 (the "License"); you may not use this file
except in compliance with the License. You may obtain a copy of
the License at http://www.mozilla.org/MPL/
This driver is for the Sedlbauer Speed Star and Speed Star II,
which are ISDN PCMCIA Cards.
Software distributed under the License is distributed on an "AS
IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
implied. See the License for the specific language governing
rights and limitations under the License.
The contents of this file are subject to the Mozilla Public
License Version 1.1 (the "License"); you may not use this file
except in compliance with the License. You may obtain a copy of
the License at http://www.mozilla.org/MPL/
The initial developer of the original code is David A. Hinds
<dahinds@users.sourceforge.net>. Portions created by David A. Hinds
are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
Software distributed under the License is distributed on an "AS
IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
implied. See the License for the specific language governing
rights and limitations under the License.
Modifications from dummy_cs.c are Copyright (C) 1999-2001 Marcus Niemann
<maniemann@users.sourceforge.net>. All Rights Reserved.
The initial developer of the original code is David A. Hinds
<dahinds@users.sourceforge.net>. Portions created by David A. Hinds
are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
Alternatively, the contents of this file may be used under the
terms of the GNU General Public License version 2 (the "GPL"), in
which case the provisions of the GPL are applicable instead of the
above. If you wish to allow the use of your version of this file
only under the terms of the GPL and not to allow others to use
your version of this file under the MPL, indicate your decision
by deleting the provisions above and replace them with the notice
and other provisions required by the GPL. If you do not delete
the provisions above, a recipient may use your version of this
file under either the MPL or the GPL.
======================================================================*/
Modifications from dummy_cs.c are Copyright (C) 1999-2001 Marcus Niemann
<maniemann@users.sourceforge.net>. All Rights Reserved.
Alternatively, the contents of this file may be used under the
terms of the GNU General Public License version 2 (the "GPL"), in
which case the provisions of the GPL are applicable instead of the
above. If you wish to allow the use of your version of this file
only under the terms of the GPL and not to allow others to use
your version of this file under the MPL, indicate your decision
by deleting the provisions above and replace them with the notice
and other provisions required by the GPL. If you do not delete
the provisions above, a recipient may use your version of this
file under either the MPL or the GPL.
======================================================================*/
#include <linux/kernel.h>
#include <linux/module.h>
@@ -63,32 +63,32 @@ MODULE_LICENSE("Dual MPL/GPL");
static int protocol = 2; /* EURO-ISDN Default */
module_param(protocol, int, 0);
static int sedlbauer_config(struct pcmcia_device *link) __devinit ;
static int sedlbauer_config(struct pcmcia_device *link) __devinit;
static void sedlbauer_release(struct pcmcia_device *link);
static void sedlbauer_detach(struct pcmcia_device *p_dev) __devexit;
typedef struct local_info_t {
struct pcmcia_device *p_dev;
int stop;
int cardnr;
int stop;
int cardnr;
} local_info_t;
static int __devinit sedlbauer_probe(struct pcmcia_device *link)
{
local_info_t *local;
local_info_t *local;
dev_dbg(&link->dev, "sedlbauer_attach()\n");
dev_dbg(&link->dev, "sedlbauer_attach()\n");
/* Allocate space for private device-specific data */
local = kzalloc(sizeof(local_info_t), GFP_KERNEL);
if (!local) return -ENOMEM;
local->cardnr = -1;
/* Allocate space for private device-specific data */
local = kzalloc(sizeof(local_info_t), GFP_KERNEL);
if (!local) return -ENOMEM;
local->cardnr = -1;
local->p_dev = link;
link->priv = local;
local->p_dev = link;
link->priv = local;
return sedlbauer_config(link);
return sedlbauer_config(link);
} /* sedlbauer_attach */
static void __devexit sedlbauer_detach(struct pcmcia_device *link)
@@ -113,58 +113,58 @@ static int sedlbauer_config_check(struct pcmcia_device *p_dev, void *priv_data)
static int __devinit sedlbauer_config(struct pcmcia_device *link)
{
int ret;
IsdnCard_t icard;
int ret;
IsdnCard_t icard;
dev_dbg(&link->dev, "sedlbauer_config(0x%p)\n", link);
dev_dbg(&link->dev, "sedlbauer_config(0x%p)\n", link);
link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_CHECK_VCC |
CONF_AUTO_SET_VPP | CONF_AUTO_AUDIO | CONF_AUTO_SET_IO;
link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_CHECK_VCC |
CONF_AUTO_SET_VPP | CONF_AUTO_AUDIO | CONF_AUTO_SET_IO;
ret = pcmcia_loop_config(link, sedlbauer_config_check, NULL);
if (ret)
goto failed;
ret = pcmcia_loop_config(link, sedlbauer_config_check, NULL);
if (ret)
goto failed;
ret = pcmcia_enable_device(link);
if (ret)
goto failed;
ret = pcmcia_enable_device(link);
if (ret)
goto failed;
icard.para[0] = link->irq;
icard.para[1] = link->resource[0]->start;
icard.protocol = protocol;
icard.typ = ISDN_CTYPE_SEDLBAUER_PCMCIA;
ret = hisax_init_pcmcia(link,
&(((local_info_t *)link->priv)->stop), &icard);
if (ret < 0) {
printk(KERN_ERR "sedlbauer_cs: failed to initialize SEDLBAUER PCMCIA %d with %pR\n",
ret, link->resource[0]);
sedlbauer_release(link);
return -ENODEV;
} else
((local_info_t *)link->priv)->cardnr = ret;
icard.para[0] = link->irq;
icard.para[1] = link->resource[0]->start;
icard.protocol = protocol;
icard.typ = ISDN_CTYPE_SEDLBAUER_PCMCIA;
return 0;
ret = hisax_init_pcmcia(link,
&(((local_info_t *)link->priv)->stop), &icard);
if (ret < 0) {
printk(KERN_ERR "sedlbauer_cs: failed to initialize SEDLBAUER PCMCIA %d with %pR\n",
ret, link->resource[0]);
sedlbauer_release(link);
return -ENODEV;
} else
((local_info_t *)link->priv)->cardnr = ret;
return 0;
failed:
sedlbauer_release(link);
return -ENODEV;
sedlbauer_release(link);
return -ENODEV;
} /* sedlbauer_config */
static void sedlbauer_release(struct pcmcia_device *link)
{
local_info_t *local = link->priv;
dev_dbg(&link->dev, "sedlbauer_release(0x%p)\n", link);
local_info_t *local = link->priv;
dev_dbg(&link->dev, "sedlbauer_release(0x%p)\n", link);
if (local) {
if (local->cardnr >= 0) {
/* no unregister function with hisax */
HiSax_closecard(local->cardnr);
if (local) {
if (local->cardnr >= 0) {
/* no unregister function with hisax */
HiSax_closecard(local->cardnr);
}
}
}
pcmcia_disable_device(link);
pcmcia_disable_device(link);
} /* sedlbauer_release */
static int sedlbauer_suspend(struct pcmcia_device *link)

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -20,7 +20,7 @@
static const char *sportster_revision = "$Revision: 1.16.2.4 $";
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
#define SPORTSTER_ISAC 0xC000
@@ -33,17 +33,17 @@ static const char *sportster_revision = "$Revision: 1.16.2.4 $";
static inline int
calc_off(unsigned int base, unsigned int off)
{
return(base + ((off & 0xfc)<<8) + ((off & 3)<<1));
return (base + ((off & 0xfc) << 8) + ((off & 3) << 1));
}
static inline void
read_fifo(unsigned int adr, u_char * data, int size)
read_fifo(unsigned int adr, u_char *data, int size)
{
insb(adr, data, size);
}
static void
write_fifo(unsigned int adr, u_char * data, int size)
write_fifo(unsigned int adr, u_char *data, int size)
{
outsb(adr, data, size);
}
@@ -63,13 +63,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
read_fifo(cs->hw.spt.isac, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
write_fifo(cs->hw.spt.isac, data, size);
}
@@ -106,11 +106,11 @@ sportster_interrupt(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
val = READHSCX(cs, 1, HSCX_ISTA);
Start_HSCX:
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = ReadISAC(cs, ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = READHSCX(cs, 1, HSCX_ISTA);
@@ -126,7 +126,7 @@ sportster_interrupt(int intno, void *dev_id)
goto Start_ISAC;
}
/* get a new irq impulse if there any pending */
bytein(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ +1);
bytein(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ + 1);
spin_unlock_irqrestore(&cs->lock, flags);
return IRQ_HANDLED;
}
@@ -137,8 +137,8 @@ release_io_sportster(struct IsdnCardState *cs)
int i, adr;
byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, 0);
for (i=0; i<64; i++) {
adr = cs->hw.spt.cfg_reg + i *1024;
for (i = 0; i < 64; i++) {
adr = cs->hw.spt.cfg_reg + i * 1024;
release_region(adr, 8);
}
}
@@ -160,51 +160,51 @@ Sportster_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_sportster(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_sportster(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
reset_sportster(cs);
inithscxisac(cs, 1);
cs->hw.spt.res_irq |= SPORTSTER_INTE; /* IRQ On */
byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq);
inithscxisac(cs, 2);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_sportster(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_sportster(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
reset_sportster(cs);
inithscxisac(cs, 1);
cs->hw.spt.res_irq |= SPORTSTER_INTE; /* IRQ On */
byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq);
inithscxisac(cs, 2);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
static int __devinit
get_io_range(struct IsdnCardState *cs)
{
int i, j, adr;
for (i=0;i<64;i++) {
adr = cs->hw.spt.cfg_reg + i *1024;
for (i = 0; i < 64; i++) {
adr = cs->hw.spt.cfg_reg + i * 1024;
if (!request_region(adr, 8, "sportster")) {
printk(KERN_WARNING "HiSax: USR Sportster config port "
"%x-%x already in use\n",
adr, adr + 8);
"%x-%x already in use\n",
adr, adr + 8);
break;
}
}
}
if (i==64)
return(1);
if (i == 64)
return (1);
else {
for (j=0; j<i; j++) {
adr = cs->hw.spt.cfg_reg + j *1024;
for (j = 0; j < i; j++) {
adr = cs->hw.spt.cfg_reg + j * 1024;
release_region(adr, 8);
}
return(0);
return (0);
}
}
@@ -226,28 +226,28 @@ setup_sportster(struct IsdnCard *card)
cs->hw.spt.isac = cs->hw.spt.cfg_reg + SPORTSTER_ISAC;
cs->hw.spt.hscx[0] = cs->hw.spt.cfg_reg + SPORTSTER_HSCXA;
cs->hw.spt.hscx[1] = cs->hw.spt.cfg_reg + SPORTSTER_HSCXB;
switch(cs->irq) {
case 5: cs->hw.spt.res_irq = 1;
break;
case 7: cs->hw.spt.res_irq = 2;
break;
case 10:cs->hw.spt.res_irq = 3;
break;
case 11:cs->hw.spt.res_irq = 4;
break;
case 12:cs->hw.spt.res_irq = 5;
break;
case 14:cs->hw.spt.res_irq = 6;
break;
case 15:cs->hw.spt.res_irq = 7;
break;
default:release_io_sportster(cs);
printk(KERN_WARNING "Sportster: wrong IRQ\n");
return(0);
switch (cs->irq) {
case 5: cs->hw.spt.res_irq = 1;
break;
case 7: cs->hw.spt.res_irq = 2;
break;
case 10:cs->hw.spt.res_irq = 3;
break;
case 11:cs->hw.spt.res_irq = 4;
break;
case 12:cs->hw.spt.res_irq = 5;
break;
case 14:cs->hw.spt.res_irq = 6;
break;
case 15:cs->hw.spt.res_irq = 7;
break;
default:release_io_sportster(cs);
printk(KERN_WARNING "Sportster: wrong IRQ\n");
return (0);
}
printk(KERN_INFO "HiSax: USR Sportster config irq:%d cfg:0x%X\n",
cs->irq, cs->hw.spt.cfg_reg);
cs->irq, cs->hw.spt.cfg_reg);
setup_isac(cs);
cs->readisac = &ReadISAC;
cs->writeisac = &WriteISAC;

Visa fil

@@ -4,7 +4,7 @@
* Author Frode Isaksen
* Copyright 2001 by Frode Isaksen <fisaksen@bewan.com>
* 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -31,7 +31,7 @@
#define EP_B2_IN 0x05U /* B2 channel in */
#define EP_D_OUT 0x06U /* D channel out */
#define EP_D_IN 0x07U /* D channel in */
// Number of isochronous packets. With 20 packets we get
// 50 interrupts/sec for each endpoint.
@@ -51,7 +51,7 @@
#define B_FLOW_ADJUST 2
// Registers that are written using vendor specific device request
// on endpoint 0.
// on endpoint 0.
#define LBA 0x02 /* S loopback */
#define SET_DEFAULT 0x06 /* Soft reset */
@@ -84,7 +84,7 @@
#define FFMSK_B2 0x50 /* B2 fifo interrupt MASK register */
#define GPIO_DIR 0x52 /* GPIO pins direction registers */
#define GPIO_OUT 0x53 /* GPIO pins output register */
#define GPIO_IN 0x54 /* GPIO pins input register */
#define GPIO_IN 0x54 /* GPIO pins input register */
#define TXCI 0x56 /* CI command to be transmitted */
@@ -124,8 +124,8 @@
#define IN_COUNTER_ZEROED 0x02 /* In down-counter reached 0 */
#define OUT_COUNTER_ZEROED 0x01 /* Out down-counter reached 0 */
#define ANY_REC_INT (IN_OVERRUN+IN_UP+IN_DOWN+IN_COUNTER_ZEROED)
#define ANY_XMIT_INT (OUT_UNDERRUN+OUT_UP+OUT_DOWN+OUT_COUNTER_ZEROED)
#define ANY_REC_INT (IN_OVERRUN + IN_UP + IN_DOWN + IN_COUNTER_ZEROED)
#define ANY_XMIT_INT (OUT_UNDERRUN + OUT_UP + OUT_DOWN + OUT_COUNTER_ZEROED)
// Level 1 commands that are sent using the TXCI device request
@@ -158,7 +158,7 @@ enum {
ST_DOUT_NORMAL,
ST_DOUT_WAIT_FOR_UNDERRUN,
ST_DOUT_WAIT_FOR_NOT_BUSY,
ST_DOUT_WAIT_FOR_NOT_BUSY,
ST_DOUT_WAIT_FOR_STOP,
ST_DOUT_WAIT_FOR_RESET,
};
@@ -188,9 +188,9 @@ enum {
ST_L1_F8,
};
#define L1_STATE_COUNT (ST_L1_F8+1)
#define L1_STATE_COUNT (ST_L1_F8 + 1)
// The first 16 entries match the Level 1 indications that
// The first 16 entries match the Level 1 indications that
// are found at offset 4 (CCIST) in the interrupt packet
enum {
@@ -217,14 +217,14 @@ enum {
#define L1_EVENT_COUNT (EV_TIMER3 + 1)
#define ERR(format, arg...) \
printk(KERN_ERR "%s:%s: " format "\n" , __FILE__, __func__ , ## arg)
#define ERR(format, arg...) \
printk(KERN_ERR "%s:%s: " format "\n" , __FILE__, __func__ , ## arg)
#define WARNING(format, arg...) \
printk(KERN_WARNING "%s:%s: " format "\n" , __FILE__, __func__ , ## arg)
#define WARNING(format, arg...) \
printk(KERN_WARNING "%s:%s: " format "\n" , __FILE__, __func__ , ## arg)
#define INFO(format, arg...) \
printk(KERN_INFO "%s:%s: " format "\n" , __FILE__, __func__ , ## arg)
#define INFO(format, arg...) \
printk(KERN_INFO "%s:%s: " format "\n" , __FILE__, __func__ , ## arg)
#include <linux/isdn/hdlc.h>
#include "fsm.h"
@@ -237,7 +237,7 @@ printk(KERN_INFO "%s:%s: " format "\n" , __FILE__, __func__ , ## arg)
/* Generic FIFO structure */
struct fifo {
u_char r,w,count,size;
u_char r, w, count, size;
spinlock_t lock;
};
@@ -269,7 +269,7 @@ static inline int fifo_add(struct fifo *fifo)
index = -1;
} else {
// Return index where to get the next data to add to the FIFO
index = fifo->w++ & (fifo->size-1);
index = fifo->w++ & (fifo->size - 1);
fifo->count++;
}
spin_unlock_irqrestore(&fifo->lock, flags);
@@ -294,7 +294,7 @@ static inline int fifo_remove(struct fifo *fifo)
index = -1;
} else {
// Return index where to get the next data from the FIFO
index = fifo->r++ & (fifo->size-1);
index = fifo->r++ & (fifo->size - 1);
fifo->count--;
}
spin_unlock_irqrestore(&fifo->lock, flags);
@@ -311,14 +311,14 @@ typedef struct ctrl_msg {
struct usb_ctrlrequest dr;
ctrl_complete_t complete;
void *context;
} ctrl_msg;
} ctrl_msg;
/* FIFO of ctrl messages waiting to be sent */
#define MAX_EP0_MSG 16
struct ctrl_msg_fifo {
struct fifo f;
struct ctrl_msg data[MAX_EP0_MSG];
};
};
#define MAX_DFRAME_LEN_L1 300
#define HSCX_BUFMAX 4096
@@ -330,7 +330,7 @@ struct st5481_ctrl {
};
struct st5481_intr {
// struct evt_fifo evt_fifo;
// struct evt_fifo evt_fifo;
struct urb *urb;
};
@@ -407,21 +407,21 @@ struct st5481_adapter {
* Submit an URB with error reporting. This is a macro so
* the __func__ returns the caller function name.
*/
#define SUBMIT_URB(urb, mem_flags) \
({ \
int status; \
if ((status = usb_submit_urb(urb, mem_flags)) < 0) { \
WARNING("usb_submit_urb failed,status=%d", status); \
} \
status; \
})
#define SUBMIT_URB(urb, mem_flags) \
({ \
int status; \
if ((status = usb_submit_urb(urb, mem_flags)) < 0) { \
WARNING("usb_submit_urb failed,status=%d", status); \
} \
status; \
})
/*
* USB double buffering, return the URB index (0 or 1).
*/
static inline int get_buf_nr(struct urb *urbs[], struct urb *urb)
{
return (urbs[0]==urb ? 0 : 1);
return (urbs[0] == urb ? 0 : 1);
}
/* ---------------------------------------------------------------------- */
@@ -442,17 +442,17 @@ void st5481_d_exit(void);
/* USB */
void st5481_ph_command(struct st5481_adapter *adapter, unsigned int command);
int st5481_setup_isocpipes(struct urb* urb[2], struct usb_device *dev,
int st5481_setup_isocpipes(struct urb *urb[2], struct usb_device *dev,
unsigned int pipe, int num_packets,
int packet_size, int buf_size,
usb_complete_t complete, void *context);
void st5481_release_isocpipes(struct urb* urb[2]);
void st5481_release_isocpipes(struct urb *urb[2]);
void st5481_usb_pipe_reset(struct st5481_adapter *adapter,
u_char pipe, ctrl_complete_t complete, void *context);
u_char pipe, ctrl_complete_t complete, void *context);
void st5481_usb_device_ctrl_msg(struct st5481_adapter *adapter,
u8 request, u16 value,
ctrl_complete_t complete, void *context);
u8 request, u16 value,
ctrl_complete_t complete, void *context);
int st5481_setup_usb(struct st5481_adapter *adapter);
void st5481_release_usb(struct st5481_adapter *adapter);
void st5481_start(struct st5481_adapter *adapter);
@@ -468,18 +468,18 @@ extern int st5481_debug;
#ifdef CONFIG_HISAX_DEBUG
#define DBG_ISO_PACKET(level,urb) \
if (level & __debug_variable) dump_iso_packet(__func__,urb)
#define DBG_ISO_PACKET(level, urb) \
if (level & __debug_variable) dump_iso_packet(__func__, urb)
static void __attribute__((unused))
dump_iso_packet(const char *name, struct urb *urb)
{
int i,j;
int len,ofs;
int i, j;
int len, ofs;
u_char *data;
printk(KERN_DEBUG "%s: packets=%d,errors=%d\n",
name,urb->number_of_packets,urb->error_count);
name, urb->number_of_packets, urb->error_count);
for (i = 0; i < urb->number_of_packets; ++i) {
if (urb->pipe & USB_DIR_IN) {
len = urb->iso_frame_desc[i].actual_length;
@@ -487,11 +487,11 @@ dump_iso_packet(const char *name, struct urb *urb)
len = urb->iso_frame_desc[i].length;
}
ofs = urb->iso_frame_desc[i].offset;
printk(KERN_DEBUG "len=%.2d,ofs=%.3d ",len,ofs);
printk(KERN_DEBUG "len=%.2d,ofs=%.3d ", len, ofs);
if (len) {
data = urb->transfer_buffer+ofs;
for (j=0; j < len; j++) {
printk ("%.2x", data[j]);
data = urb->transfer_buffer + ofs;
for (j = 0; j < len; j++) {
printk("%.2x", data[j]);
}
}
printk("\n");
@@ -513,17 +513,17 @@ static inline const char *ST5481_CMD_string(int evt)
case ST5481_CMD_ARL: return "ARL";
case ST5481_CMD_PDN: return "PDN";
};
sprintf(s,"0x%x",evt);
sprintf(s, "0x%x", evt);
return s;
}
}
#else
#define DBG_ISO_PACKET(level,urb) do {} while (0)
#define DBG_ISO_PACKET(level, urb) do {} while (0)
#endif
#endif
#endif

Visa fil

@@ -4,7 +4,7 @@
* Author Frode Isaksen
* Copyright 2001 by Frode Isaksen <fisaksen@bewan.com>
* 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -27,33 +27,33 @@ static inline void B_L1L2(struct st5481_bcs *bcs, int pr, void *arg)
/*
* Encode and transmit next frame.
*/
static void usb_b_out(struct st5481_bcs *bcs,int buf_nr)
static void usb_b_out(struct st5481_bcs *bcs, int buf_nr)
{
struct st5481_b_out *b_out = &bcs->b_out;
struct st5481_adapter *adapter = bcs->adapter;
struct urb *urb;
unsigned int packet_size,offset;
int len,buf_size,bytes_sent;
unsigned int packet_size, offset;
int len, buf_size, bytes_sent;
int i;
struct sk_buff *skb;
if (test_and_set_bit(buf_nr, &b_out->busy)) {
DBG(4,"ep %d urb %d busy",(bcs->channel+1)*2,buf_nr);
DBG(4, "ep %d urb %d busy", (bcs->channel + 1) * 2, buf_nr);
return;
}
urb = b_out->urb[buf_nr];
// Adjust isoc buffer size according to flow state
if(b_out->flow_event & (OUT_DOWN | OUT_UNDERRUN)) {
buf_size = NUM_ISO_PACKETS_B*SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST;
if (b_out->flow_event & (OUT_DOWN | OUT_UNDERRUN)) {
buf_size = NUM_ISO_PACKETS_B * SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST;
packet_size = SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST;
DBG(4,"B%d,adjust flow,add %d bytes",bcs->channel+1,B_FLOW_ADJUST);
} else if(b_out->flow_event & OUT_UP){
buf_size = NUM_ISO_PACKETS_B*SIZE_ISO_PACKETS_B_OUT - B_FLOW_ADJUST;
DBG(4, "B%d,adjust flow,add %d bytes", bcs->channel + 1, B_FLOW_ADJUST);
} else if (b_out->flow_event & OUT_UP) {
buf_size = NUM_ISO_PACKETS_B * SIZE_ISO_PACKETS_B_OUT - B_FLOW_ADJUST;
packet_size = SIZE_ISO_PACKETS_B_OUT - B_FLOW_ADJUST;
DBG(4,"B%d,adjust flow,remove %d bytes",bcs->channel+1,B_FLOW_ADJUST);
DBG(4, "B%d,adjust flow,remove %d bytes", bcs->channel + 1, B_FLOW_ADJUST);
} else {
buf_size = NUM_ISO_PACKETS_B*SIZE_ISO_PACKETS_B_OUT;
buf_size = NUM_ISO_PACKETS_B * SIZE_ISO_PACKETS_B_OUT;
packet_size = 8;
}
b_out->flow_event = 0;
@@ -62,15 +62,15 @@ static void usb_b_out(struct st5481_bcs *bcs,int buf_nr)
while (len < buf_size) {
if ((skb = b_out->tx_skb)) {
DBG_SKB(0x100, skb);
DBG(4,"B%d,len=%d",bcs->channel+1,skb->len);
if (bcs->mode == L1_MODE_TRANS) {
DBG(4, "B%d,len=%d", bcs->channel + 1, skb->len);
if (bcs->mode == L1_MODE_TRANS) {
bytes_sent = buf_size - len;
if (skb->len < bytes_sent)
bytes_sent = skb->len;
{ /* swap tx bytes to get hearable audio data */
register unsigned char *src = skb->data;
register unsigned char *dest = urb->transfer_buffer+len;
register unsigned char *dest = urb->transfer_buffer + len;
register unsigned int count;
for (count = 0; count < bytes_sent; count++)
*dest++ = bitrev8(*src++);
@@ -79,7 +79,7 @@ static void usb_b_out(struct st5481_bcs *bcs,int buf_nr)
} else {
len += isdnhdlc_encode(&b_out->hdlc_state,
skb->data, skb->len, &bytes_sent,
urb->transfer_buffer+len, buf_size-len);
urb->transfer_buffer + len, buf_size-len);
}
skb_pull(skb, bytes_sent);
@@ -90,21 +90,21 @@ static void usb_b_out(struct st5481_bcs *bcs,int buf_nr)
B_L1L2(bcs, PH_DATA | CONFIRM, (void *)(unsigned long) skb->truesize);
dev_kfree_skb_any(skb);
/* if (!(bcs->tx_skb = skb_dequeue(&bcs->sq))) { */
/* st5481B_sched_event(bcs, B_XMTBUFREADY); */
/* } */
/* if (!(bcs->tx_skb = skb_dequeue(&bcs->sq))) { */
/* st5481B_sched_event(bcs, B_XMTBUFREADY); */
/* } */
}
} else {
if (bcs->mode == L1_MODE_TRANS) {
memset(urb->transfer_buffer+len, 0xff, buf_size-len);
memset(urb->transfer_buffer + len, 0xff, buf_size-len);
len = buf_size;
} else {
// Send flags
len += isdnhdlc_encode(&b_out->hdlc_state,
NULL, 0, &bytes_sent,
urb->transfer_buffer+len, buf_size-len);
urb->transfer_buffer + len, buf_size-len);
}
}
}
}
// Prepare the URB
@@ -118,7 +118,7 @@ static void usb_b_out(struct st5481_bcs *bcs,int buf_nr)
urb->number_of_packets = i;
urb->dev = adapter->usb_dev;
DBG_ISO_PACKET(0x200,urb);
DBG_ISO_PACKET(0x200, urb);
SUBMIT_URB(urb, GFP_NOIO);
}
@@ -131,12 +131,12 @@ static void st5481B_start_xfer(void *context)
{
struct st5481_bcs *bcs = context;
DBG(4,"B%d",bcs->channel+1);
DBG(4, "B%d", bcs->channel + 1);
// Start transmitting (flags or data) on B channel
usb_b_out(bcs,0);
usb_b_out(bcs,1);
usb_b_out(bcs, 0);
usb_b_out(bcs, 1);
}
/*
@@ -158,7 +158,7 @@ static void led_blink(struct st5481_adapter *adapter)
} else {
leds &= ~GREEN_LED;
}
st5481_usb_device_ctrl_msg(adapter, GPIO_OUT, leds, NULL, NULL);
}
@@ -168,27 +168,27 @@ static void usb_b_out_complete(struct urb *urb)
struct st5481_b_out *b_out = &bcs->b_out;
struct st5481_adapter *adapter = bcs->adapter;
int buf_nr;
buf_nr = get_buf_nr(b_out->urb, urb);
test_and_clear_bit(buf_nr, &b_out->busy);
if (unlikely(urb->status < 0)) {
switch (urb->status) {
case -ENOENT:
case -ESHUTDOWN:
case -ECONNRESET:
DBG(4,"urb killed status %d", urb->status);
return; // Give up
default:
WARNING("urb status %d",urb->status);
if (b_out->busy == 0) {
st5481_usb_pipe_reset(adapter, (bcs->channel+1)*2 | USB_DIR_OUT, NULL, NULL);
}
break;
case -ENOENT:
case -ESHUTDOWN:
case -ECONNRESET:
DBG(4, "urb killed status %d", urb->status);
return; // Give up
default:
WARNING("urb status %d", urb->status);
if (b_out->busy == 0) {
st5481_usb_pipe_reset(adapter, (bcs->channel + 1) * 2 | USB_DIR_OUT, NULL, NULL);
}
break;
}
}
usb_b_out(bcs,buf_nr);
usb_b_out(bcs, buf_nr);
if (adapter->number_of_leds == 2)
led_blink(adapter);
@@ -202,7 +202,7 @@ static void st5481B_mode(struct st5481_bcs *bcs, int mode)
struct st5481_b_out *b_out = &bcs->b_out;
struct st5481_adapter *adapter = bcs->adapter;
DBG(4,"B%d,mode=%d", bcs->channel + 1, mode);
DBG(4, "B%d,mode=%d", bcs->channel + 1, mode);
if (bcs->mode == mode)
return;
@@ -223,14 +223,14 @@ static void st5481B_mode(struct st5481_bcs *bcs, int mode)
features |= HDLC_56KBIT;
isdnhdlc_out_init(&b_out->hdlc_state, features);
}
st5481_usb_pipe_reset(adapter, (bcs->channel+1)*2, NULL, NULL);
st5481_usb_pipe_reset(adapter, (bcs->channel + 1) * 2, NULL, NULL);
// Enable B channel interrupts
st5481_usb_device_ctrl_msg(adapter, FFMSK_B1+(bcs->channel*2),
OUT_UP+OUT_DOWN+OUT_UNDERRUN, NULL, NULL);
st5481_usb_device_ctrl_msg(adapter, FFMSK_B1 + (bcs->channel * 2),
OUT_UP + OUT_DOWN + OUT_UNDERRUN, NULL, NULL);
// Enable B channel FIFOs
st5481_usb_device_ctrl_msg(adapter, OUT_B1_COUNTER+(bcs->channel*2), 32, st5481B_start_xfer, bcs);
st5481_usb_device_ctrl_msg(adapter, OUT_B1_COUNTER+(bcs->channel * 2), 32, st5481B_start_xfer, bcs);
if (adapter->number_of_leds == 4) {
if (bcs->channel == 0) {
adapter->leds |= B1_LED;
@@ -240,10 +240,10 @@ static void st5481B_mode(struct st5481_bcs *bcs, int mode)
}
} else {
// Disble B channel interrupts
st5481_usb_device_ctrl_msg(adapter, FFMSK_B1+(bcs->channel*2), 0, NULL, NULL);
st5481_usb_device_ctrl_msg(adapter, FFMSK_B1+(bcs->channel * 2), 0, NULL, NULL);
// Disable B channel FIFOs
st5481_usb_device_ctrl_msg(adapter, OUT_B1_COUNTER+(bcs->channel*2), 0, NULL, NULL);
st5481_usb_device_ctrl_msg(adapter, OUT_B1_COUNTER+(bcs->channel * 2), 0, NULL, NULL);
if (adapter->number_of_leds == 4) {
if (bcs->channel == 0) {
@@ -258,7 +258,7 @@ static void st5481B_mode(struct st5481_bcs *bcs, int mode)
dev_kfree_skb_any(b_out->tx_skb);
b_out->tx_skb = NULL;
}
}
}
@@ -268,9 +268,9 @@ static int st5481_setup_b_out(struct st5481_bcs *bcs)
struct usb_interface *intf;
struct usb_host_interface *altsetting = NULL;
struct usb_host_endpoint *endpoint;
struct st5481_b_out *b_out = &bcs->b_out;
struct st5481_b_out *b_out = &bcs->b_out;
DBG(4,"");
DBG(4, "");
intf = usb_ifnum_to_if(dev, 0);
if (intf)
@@ -281,11 +281,11 @@ static int st5481_setup_b_out(struct st5481_bcs *bcs)
// Allocate URBs and buffers for the B channel out
endpoint = &altsetting->endpoint[EP_B1_OUT - 1 + bcs->channel * 2];
DBG(4,"endpoint address=%02x,packet size=%d",
DBG(4, "endpoint address=%02x,packet size=%d",
endpoint->desc.bEndpointAddress, le16_to_cpu(endpoint->desc.wMaxPacketSize));
// Allocate memory for 8000bytes/sec + extra bytes if underrun
return st5481_setup_isocpipes(b_out->urb, dev,
return st5481_setup_isocpipes(b_out->urb, dev,
usb_sndisocpipe(dev, endpoint->desc.bEndpointAddress),
NUM_ISO_PACKETS_B, SIZE_ISO_PACKETS_B_OUT,
NUM_ISO_PACKETS_B * SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST,
@@ -296,7 +296,7 @@ static void st5481_release_b_out(struct st5481_bcs *bcs)
{
struct st5481_b_out *b_out = &bcs->b_out;
DBG(4,"");
DBG(4, "");
st5481_release_isocpipes(b_out->urb);
}
@@ -305,7 +305,7 @@ int st5481_setup_b(struct st5481_bcs *bcs)
{
int retval;
DBG(4,"");
DBG(4, "");
retval = st5481_setup_b_out(bcs);
if (retval)
@@ -324,9 +324,9 @@ int st5481_setup_b(struct st5481_bcs *bcs)
return 0;
err_b_out:
err_b_out:
st5481_release_b_out(bcs);
err:
err:
return retval;
}
@@ -335,7 +335,7 @@ int st5481_setup_b(struct st5481_bcs *bcs)
*/
void st5481_release_b(struct st5481_bcs *bcs)
{
DBG(4,"");
DBG(4, "");
st5481_release_in(&bcs->b_in);
st5481_release_b_out(bcs);
@@ -365,12 +365,12 @@ void st5481_b_l2l1(struct hisax_if *ifc, int pr, void *arg)
break;
case PH_ACTIVATE | REQUEST:
mode = (long) arg;
DBG(4,"B%d,PH_ACTIVATE_REQUEST %ld", bcs->channel + 1, mode);
DBG(4, "B%d,PH_ACTIVATE_REQUEST %ld", bcs->channel + 1, mode);
st5481B_mode(bcs, mode);
B_L1L2(bcs, PH_ACTIVATE | INDICATION, NULL);
break;
case PH_DEACTIVATE | REQUEST:
DBG(4,"B%d,PH_DEACTIVATE_REQUEST", bcs->channel + 1);
DBG(4, "B%d,PH_DEACTIVATE_REQUEST", bcs->channel + 1);
st5481B_mode(bcs, L1_MODE_NULL);
B_L1L2(bcs, PH_DEACTIVATE | INDICATION, NULL);
break;

Visa fil

@@ -4,7 +4,7 @@
* Author Frode Isaksen
* Copyright 2001 by Frode Isaksen <fisaksen@bewan.com>
* 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -32,22 +32,22 @@ static char *strL1State[] =
static char *strL1Event[] =
{
"EV_IND_DP",
"EV_IND_1",
"EV_IND_2",
"EV_IND_3",
"EV_IND_RSY",
"EV_IND_5",
"EV_IND_6",
"EV_IND_7",
"EV_IND_AP",
"EV_IND_9",
"EV_IND_10",
"EV_IND_11",
"EV_IND_DP",
"EV_IND_1",
"EV_IND_2",
"EV_IND_3",
"EV_IND_RSY",
"EV_IND_5",
"EV_IND_6",
"EV_IND_7",
"EV_IND_AP",
"EV_IND_9",
"EV_IND_10",
"EV_IND_11",
"EV_IND_AI8",
"EV_IND_AI10",
"EV_IND_AIL",
"EV_IND_DI",
"EV_IND_DI",
"EV_PH_ACTIVATE_REQ",
"EV_PH_DEACTIVATE_REQ",
"EV_TIMER3",
@@ -67,7 +67,7 @@ l1_go_f3(struct FsmInst *fi, int event, void *arg)
if (fi->state == ST_L1_F7)
ph_disconnect(adapter);
FsmChangeState(fi, ST_L1_F3);
D_L1L2(adapter, PH_DEACTIVATE | INDICATION, NULL);
}
@@ -168,11 +168,11 @@ static struct FsmNode L1FnList[] __initdata =
};
static __printf(2, 3)
void l1m_debug(struct FsmInst *fi, char *fmt, ...)
void l1m_debug(struct FsmInst *fi, char *fmt, ...)
{
va_list args;
char buf[256];
va_start(args, fmt);
vsnprintf(buf, sizeof(buf), fmt, args);
DBG(8, "%s", buf);
@@ -191,54 +191,54 @@ void l1m_debug(struct FsmInst *fi, char *fmt, ...)
L1 FRAME D_OUT_STATE USB D CHANNEL
-------- ----------- --- ---------
FIXME
-> [xx..xx] SHORT_INIT -> [7Exx..xxC1C27EFF]
SHORT_WAIT_DEN <> OUT_D_COUNTER=16
END_OF_SHORT <- DEN_EVENT -> 7Exx
xxxx
xxxx
xxxx
xxxx
xxxx
C1C1
7EFF
WAIT_FOR_RESET_IDLE <- D_UNDERRUN <- (8ms)
IDLE <> Reset pipe
FIXME
-> [xx..xx] SHORT_INIT -> [7Exx..xxC1C27EFF]
SHORT_WAIT_DEN <> OUT_D_COUNTER=16
END_OF_SHORT <- DEN_EVENT -> 7Exx
xxxx
xxxx
xxxx
xxxx
xxxx
C1C1
7EFF
WAIT_FOR_RESET_IDLE <- D_UNDERRUN <- (8ms)
IDLE <> Reset pipe
Transmit long frame (>= 16 bytes of encoded data):
L1 FRAME D_OUT_STATE USB D CHANNEL
-------- ----------- --- ---------
-> [xx...xx] IDLE
WAIT_FOR_STOP <> OUT_D_COUNTER=0
WAIT_FOR_RESET <> Reset pipe
STOP
INIT_LONG_FRAME -> [7Exx..xx]
WAIT_DEN <> OUT_D_COUNTER=16
OUT_NORMAL <- DEN_EVENT -> 7Exx
END_OF_FRAME_BUSY -> [xxxx] xxxx
END_OF_FRAME_NOT_BUSY -> [xxxx] xxxx
-> [xxxx] xxxx
-> [C1C2] xxxx
-> [7EFF] xxxx
xxxx
xxxx
....
xxxx
C1C2
7EFF
<- D_UNDERRUN <- (> 8ms)
WAIT_FOR_STOP <> OUT_D_COUNTER=0
WAIT_FOR_RESET <> Reset pipe
STOP
-> [xx...xx] IDLE
WAIT_FOR_STOP <> OUT_D_COUNTER=0
WAIT_FOR_RESET <> Reset pipe
STOP
INIT_LONG_FRAME -> [7Exx..xx]
WAIT_DEN <> OUT_D_COUNTER=16
OUT_NORMAL <- DEN_EVENT -> 7Exx
END_OF_FRAME_BUSY -> [xxxx] xxxx
END_OF_FRAME_NOT_BUSY -> [xxxx] xxxx
-> [xxxx] xxxx
-> [C1C2] xxxx
-> [7EFF] xxxx
xxxx
xxxx
....
xxxx
C1C2
7EFF
<- D_UNDERRUN <- (> 8ms)
WAIT_FOR_STOP <> OUT_D_COUNTER=0
WAIT_FOR_RESET <> Reset pipe
STOP
*/
*/
static struct Fsm dout_fsm;
@@ -254,7 +254,7 @@ static char *strDoutState[] =
"ST_DOUT_NORMAL",
"ST_DOUT_WAIT_FOR_UNDERRUN",
"ST_DOUT_WAIT_FOR_NOT_BUSY",
"ST_DOUT_WAIT_FOR_NOT_BUSY",
"ST_DOUT_WAIT_FOR_STOP",
"ST_DOUT_WAIT_FOR_RESET",
};
@@ -271,11 +271,11 @@ static char *strDoutEvent[] =
};
static __printf(2, 3)
void dout_debug(struct FsmInst *fi, char *fmt, ...)
void dout_debug(struct FsmInst *fi, char *fmt, ...)
{
va_list args;
char buf[256];
va_start(args, fmt);
vsnprintf(buf, sizeof(buf), fmt, args);
DBG(0x2, "%s", buf);
@@ -313,19 +313,19 @@ static void usb_d_out(struct st5481_adapter *adapter, int buf_nr)
skb = d_out->tx_skb;
buf_size = NUM_ISO_PACKETS_D * SIZE_ISO_PACKETS_D_OUT;
if (skb) {
len = isdnhdlc_encode(&d_out->hdlc_state,
skb->data, skb->len, &bytes_sent,
urb->transfer_buffer, buf_size);
skb_pull(skb,bytes_sent);
skb_pull(skb, bytes_sent);
} else {
// Send flags or idle
len = isdnhdlc_encode(&d_out->hdlc_state,
NULL, 0, &bytes_sent,
urb->transfer_buffer, buf_size);
}
if (len < buf_size) {
FsmChangeState(&d_out->fsm, ST_DOUT_WAIT_FOR_UNDERRUN);
}
@@ -354,15 +354,15 @@ static void usb_d_out(struct st5481_adapter *adapter, int buf_nr)
urb->dev = adapter->usb_dev;
// Need to transmit the next buffer 2ms after the DEN_EVENT
urb->transfer_flags = 0;
urb->start_frame = usb_get_current_frame_number(adapter->usb_dev)+2;
urb->start_frame = usb_get_current_frame_number(adapter->usb_dev) + 2;
DBG_ISO_PACKET(0x20,urb);
DBG_ISO_PACKET(0x20, urb);
if (usb_submit_urb(urb, GFP_KERNEL) < 0) {
// There is another URB queued up
urb->transfer_flags = URB_ISO_ASAP;
SUBMIT_URB(urb, GFP_KERNEL);
}
}
}
static void fifo_reseted(void *context)
@@ -377,7 +377,7 @@ static void usb_d_out_complete(struct urb *urb)
struct st5481_adapter *adapter = urb->context;
struct st5481_d_out *d_out = &adapter->d_out;
long buf_nr;
DBG(2, "");
buf_nr = get_buf_nr(d_out->urb, urb);
@@ -385,17 +385,17 @@ static void usb_d_out_complete(struct urb *urb)
if (unlikely(urb->status < 0)) {
switch (urb->status) {
case -ENOENT:
case -ESHUTDOWN:
case -ECONNRESET:
DBG(1,"urb killed status %d", urb->status);
break;
default:
WARNING("urb status %d",urb->status);
if (d_out->busy == 0) {
st5481_usb_pipe_reset(adapter, EP_D_OUT | USB_DIR_OUT, fifo_reseted, adapter);
}
break;
case -ENOENT:
case -ESHUTDOWN:
case -ECONNRESET:
DBG(1, "urb killed status %d", urb->status);
break;
default:
WARNING("urb status %d", urb->status);
if (d_out->busy == 0) {
st5481_usb_pipe_reset(adapter, EP_D_OUT | USB_DIR_OUT, fifo_reseted, adapter);
}
break;
}
return; // Give up
}
@@ -417,7 +417,7 @@ static void dout_start_xmit(struct FsmInst *fsm, int event, void *arg)
skb = d_out->tx_skb;
DBG(2,"len=%d",skb->len);
DBG(2, "len=%d", skb->len);
isdnhdlc_out_init(&d_out->hdlc_state, HDLC_DCHANNEL | HDLC_BITREVERSE);
@@ -433,7 +433,7 @@ static void dout_start_xmit(struct FsmInst *fsm, int event, void *arg)
urb->transfer_buffer, 16);
skb_pull(skb, bytes_sent);
if(len < 16)
if (len < 16)
FsmChangeState(&d_out->fsm, ST_DOUT_SHORT_INIT);
else
FsmChangeState(&d_out->fsm, ST_DOUT_LONG_INIT);
@@ -455,7 +455,7 @@ static void dout_start_xmit(struct FsmInst *fsm, int event, void *arg)
urb->dev = adapter->usb_dev;
urb->transfer_flags = URB_ISO_ASAP;
DBG_ISO_PACKET(0x20,urb);
DBG_ISO_PACKET(0x20, urb);
SUBMIT_URB(urb, GFP_KERNEL);
}
@@ -480,7 +480,7 @@ static void dout_long_enable_fifo(struct FsmInst *fsm, int event, void *arg)
{
struct st5481_adapter *adapter = fsm->userdata;
struct st5481_d_out *d_out = &adapter->d_out;
st5481_usb_device_ctrl_msg(adapter, OUT_D_COUNTER, 16, NULL, NULL);
FsmChangeState(&d_out->fsm, ST_DOUT_LONG_WAIT_DEN);
}
@@ -619,8 +619,8 @@ static void ph_connect(struct st5481_adapter *adapter)
struct st5481_d_out *d_out = &adapter->d_out;
struct st5481_in *d_in = &adapter->d_in;
DBG(8,"");
DBG(8, "");
FsmChangeState(&d_out->fsm, ST_DOUT_NONE);
// st5481_usb_device_ctrl_msg(adapter, FFMSK_D, OUT_UNDERRUN, NULL, NULL);
@@ -644,7 +644,7 @@ static void ph_connect(struct st5481_adapter *adapter)
*/
static void ph_disconnect(struct st5481_adapter *adapter)
{
DBG(8,"");
DBG(8, "");
st5481_in_mode(&adapter->d_in, L1_MODE_NULL);
@@ -661,7 +661,7 @@ static int st5481_setup_d_out(struct st5481_adapter *adapter)
struct usb_host_endpoint *endpoint;
struct st5481_d_out *d_out = &adapter->d_out;
DBG(2,"");
DBG(2, "");
intf = usb_ifnum_to_if(dev, 0);
if (intf)
@@ -672,10 +672,10 @@ static int st5481_setup_d_out(struct st5481_adapter *adapter)
// Allocate URBs and buffers for the D channel out
endpoint = &altsetting->endpoint[EP_D_OUT-1];
DBG(2,"endpoint address=%02x,packet size=%d",
DBG(2, "endpoint address=%02x,packet size=%d",
endpoint->desc.bEndpointAddress, le16_to_cpu(endpoint->desc.wMaxPacketSize));
return st5481_setup_isocpipes(d_out->urb, dev,
return st5481_setup_isocpipes(d_out->urb, dev,
usb_sndisocpipe(dev, endpoint->desc.bEndpointAddress),
NUM_ISO_PACKETS_D, SIZE_ISO_PACKETS_D_OUT,
NUM_ISO_PACKETS_D * SIZE_ISO_PACKETS_D_OUT,
@@ -686,7 +686,7 @@ static void st5481_release_d_out(struct st5481_adapter *adapter)
{
struct st5481_d_out *d_out = &adapter->d_out;
DBG(2,"");
DBG(2, "");
st5481_release_isocpipes(d_out->urb);
}
@@ -695,7 +695,7 @@ int st5481_setup_d(struct st5481_adapter *adapter)
{
int retval;
DBG(2,"");
DBG(2, "");
retval = st5481_setup_d_out(adapter);
if (retval)
@@ -726,15 +726,15 @@ int st5481_setup_d(struct st5481_adapter *adapter)
return 0;
err_d_out:
err_d_out:
st5481_release_d_out(adapter);
err:
err:
return retval;
}
void st5481_release_d(struct st5481_adapter *adapter)
{
DBG(2,"");
DBG(2, "");
st5481_release_in(&adapter->d_in);
st5481_release_d_out(adapter);
@@ -766,9 +766,9 @@ int __init st5481_d_init(void)
return 0;
err_l1:
err_l1:
FsmFree(&l1fsm);
err:
err:
return retval;
}

Visa fil

@@ -4,13 +4,13 @@
* Author Frode Isaksen
* Copyright 2001 by Frode Isaksen <fisaksen@bewan.com>
* 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
*/
/*
/*
* TODO:
*
* b layer1 delay?
@@ -63,9 +63,9 @@ static int probe_st5481(struct usb_interface *intf,
int retval, i;
printk(KERN_INFO "st541: found adapter VendorId %04x, ProductId %04x, LEDs %d\n",
le16_to_cpu(dev->descriptor.idVendor),
le16_to_cpu(dev->descriptor.idProduct),
number_of_leds);
le16_to_cpu(dev->descriptor.idVendor),
le16_to_cpu(dev->descriptor.idProduct),
number_of_leds);
adapter = kzalloc(sizeof(struct st5481_adapter), GFP_KERNEL);
if (!adapter)
@@ -105,7 +105,7 @@ static int probe_st5481(struct usb_interface *intf,
b_if[i] = &adapter->bcs[i].b_if;
if (hisax_register(&adapter->hisax_d_if, b_if, "st5481_usb",
protocol) != 0)
protocol) != 0)
goto err_b1;
st5481_start(adapter);
@@ -113,15 +113,15 @@ static int probe_st5481(struct usb_interface *intf,
usb_set_intfdata(intf, adapter);
return 0;
err_b1:
err_b1:
st5481_release_b(&adapter->bcs[1]);
err_b:
err_b:
st5481_release_b(&adapter->bcs[0]);
err_d:
err_d:
st5481_release_d(adapter);
err_usb:
err_usb:
st5481_release_usb(adapter);
err:
err:
kfree(adapter);
return -EIO;
}
@@ -134,12 +134,12 @@ static void disconnect_st5481(struct usb_interface *intf)
{
struct st5481_adapter *adapter = usb_get_intfdata(intf);
DBG(1,"");
DBG(1, "");
usb_set_intfdata(intf, NULL);
if (!adapter)
return;
st5481_stop(adapter);
st5481_release_b(&adapter->bcs[1]);
st5481_release_b(&adapter->bcs[0]);
@@ -157,25 +157,25 @@ static void disconnect_st5481(struct usb_interface *intf)
* The last 4 bits in the Product Id is set with 4 pins on the chip.
*/
static struct usb_device_id st5481_ids[] = {
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x0) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x1) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x2) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x3) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x4) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x5) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x6) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x7) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x8) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x9) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xA) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xB) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xC) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xD) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xE) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xF) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x0) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x1) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x2) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x3) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x4) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x5) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x6) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x7) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x8) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x9) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0xA) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0xB) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0xC) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0xD) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0xE) },
{ USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0xF) },
{ }
};
MODULE_DEVICE_TABLE (usb, st5481_ids);
MODULE_DEVICE_TABLE(usb, st5481_ids);
static struct usb_driver st5481_usb_driver = {
.name = "st5481_usb",
@@ -204,9 +204,9 @@ static int __init st5481_usb_init(void)
return 0;
out_d_exit:
out_d_exit:
st5481_d_exit();
out:
out:
return retval;
}

Visa fil

@@ -4,7 +4,7 @@
* Author Frode Isaksen
* Copyright 2001 by Frode Isaksen <fisaksen@bewan.com>
* 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -36,13 +36,13 @@ static void usb_next_ctrl_msg(struct urb *urb,
}
if ((r_index = fifo_remove(&ctrl->msg_fifo.f)) < 0) {
test_and_clear_bit(0,&ctrl->busy);
test_and_clear_bit(0, &ctrl->busy);
return;
}
urb->setup_packet =
}
urb->setup_packet =
(unsigned char *)&ctrl->msg_fifo.data[r_index];
DBG(1,"request=0x%02x,value=0x%04x,index=%x",
DBG(1, "request=0x%02x,value=0x%04x,index=%x",
((struct ctrl_msg *)urb->setup_packet)->dr.bRequest,
((struct ctrl_msg *)urb->setup_packet)->dr.wValue,
((struct ctrl_msg *)urb->setup_packet)->dr.wIndex);
@@ -64,13 +64,13 @@ static void usb_ctrl_msg(struct st5481_adapter *adapter,
struct st5481_ctrl *ctrl = &adapter->ctrl;
int w_index;
struct ctrl_msg *ctrl_msg;
if ((w_index = fifo_add(&ctrl->msg_fifo.f)) < 0) {
WARNING("control msg FIFO full");
return;
}
ctrl_msg = &ctrl->msg_fifo.data[w_index];
ctrl_msg = &ctrl->msg_fifo.data[w_index];
ctrl_msg->dr.bRequestType = requesttype;
ctrl_msg->dr.bRequest = request;
ctrl_msg->dr.wValue = cpu_to_le16p(&value);
@@ -86,11 +86,11 @@ static void usb_ctrl_msg(struct st5481_adapter *adapter,
* Asynchronous endpoint 0 device request.
*/
void st5481_usb_device_ctrl_msg(struct st5481_adapter *adapter,
u8 request, u16 value,
ctrl_complete_t complete, void *context)
u8 request, u16 value,
ctrl_complete_t complete, void *context)
{
usb_ctrl_msg(adapter, request,
USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
usb_ctrl_msg(adapter, request,
USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
value, 0, complete, context);
}
@@ -98,10 +98,10 @@ void st5481_usb_device_ctrl_msg(struct st5481_adapter *adapter,
* Asynchronous pipe reset (async version of usb_clear_halt).
*/
void st5481_usb_pipe_reset(struct st5481_adapter *adapter,
u_char pipe,
ctrl_complete_t complete, void *context)
u_char pipe,
ctrl_complete_t complete, void *context)
{
DBG(1,"pipe=%02x",pipe);
DBG(1, "pipe=%02x", pipe);
usb_ctrl_msg(adapter,
USB_REQ_CLEAR_FEATURE, USB_DIR_OUT | USB_RECIP_ENDPOINT,
@@ -115,7 +115,7 @@ void st5481_usb_pipe_reset(struct st5481_adapter *adapter,
void st5481_ph_command(struct st5481_adapter *adapter, unsigned int command)
{
DBG(8,"command=%s", ST5481_CMD_string(command));
DBG(8, "command=%s", ST5481_CMD_string(command));
st5481_usb_device_ctrl_msg(adapter, TXCI, command, NULL, NULL);
}
@@ -130,33 +130,33 @@ static void usb_ctrl_complete(struct urb *urb)
struct st5481_adapter *adapter = urb->context;
struct st5481_ctrl *ctrl = &adapter->ctrl;
struct ctrl_msg *ctrl_msg;
if (unlikely(urb->status < 0)) {
switch (urb->status) {
case -ENOENT:
case -ESHUTDOWN:
case -ECONNRESET:
DBG(1,"urb killed status %d", urb->status);
return; // Give up
default:
WARNING("urb status %d",urb->status);
break;
case -ENOENT:
case -ESHUTDOWN:
case -ECONNRESET:
DBG(1, "urb killed status %d", urb->status);
return; // Give up
default:
WARNING("urb status %d", urb->status);
break;
}
}
ctrl_msg = (struct ctrl_msg *)urb->setup_packet;
if (ctrl_msg->dr.bRequest == USB_REQ_CLEAR_FEATURE) {
/* Special case handling for pipe reset */
/* Special case handling for pipe reset */
le16_to_cpus(&ctrl_msg->dr.wIndex);
usb_reset_endpoint(adapter->usb_dev, ctrl_msg->dr.wIndex);
}
if (ctrl_msg->complete)
ctrl_msg->complete(ctrl_msg->context);
clear_bit(0, &ctrl->busy);
// Try to send next control message
usb_next_ctrl_msg(urb, adapter);
return;
@@ -181,23 +181,23 @@ static void usb_int_complete(struct urb *urb)
int status;
switch (urb->status) {
case 0:
/* success */
break;
case -ECONNRESET:
case -ENOENT:
case -ESHUTDOWN:
/* this urb is terminated, clean up */
DBG(2, "urb shutting down with status: %d", urb->status);
return;
default:
WARNING("nonzero urb status received: %d", urb->status);
goto exit;
case 0:
/* success */
break;
case -ECONNRESET:
case -ENOENT:
case -ESHUTDOWN:
/* this urb is terminated, clean up */
DBG(2, "urb shutting down with status: %d", urb->status);
return;
default:
WARNING("nonzero urb status received: %d", urb->status);
goto exit;
}
DBG_PACKET(2, data, INT_PKT_SIZE);
if (urb->actual_length == 0) {
goto exit;
}
@@ -214,7 +214,7 @@ static void usb_int_complete(struct urb *urb)
FsmEvent(&adapter->d_out.fsm, EV_DOUT_UNDERRUN, NULL);
if (irqbyte & OUT_DOWN)
;// printk("OUT_DOWN\n");
;// printk("OUT_DOWN\n");
irqbyte = data[MPINT];
if (irqbyte & RXCI_INT)
@@ -226,7 +226,7 @@ static void usb_int_complete(struct urb *urb)
urb->actual_length = 0;
exit:
status = usb_submit_urb (urb, GFP_ATOMIC);
status = usb_submit_urb(urb, GFP_ATOMIC);
if (status)
WARNING("usb_submit_urb failed with result %d", status);
}
@@ -246,11 +246,11 @@ int st5481_setup_usb(struct st5481_adapter *adapter)
int status;
struct urb *urb;
u8 *buf;
DBG(2,"");
if ((status = usb_reset_configuration (dev)) < 0) {
WARNING("reset_configuration failed,status=%d",status);
DBG(2, "");
if ((status = usb_reset_configuration(dev)) < 0) {
WARNING("reset_configuration failed,status=%d", status);
return status;
}
@@ -261,7 +261,7 @@ int st5481_setup_usb(struct st5481_adapter *adapter)
return -ENXIO;
// Check if the config is sane
if ( altsetting->desc.bNumEndpoints != 7 ) {
if (altsetting->desc.bNumEndpoints != 7) {
WARNING("expecting 7 got %d endpoints!", altsetting->desc.bNumEndpoints);
return -EINVAL;
}
@@ -271,8 +271,8 @@ int st5481_setup_usb(struct st5481_adapter *adapter)
altsetting->endpoint[4].desc.wMaxPacketSize = __constant_cpu_to_le16(32);
// Use alternative setting 3 on interface 0 to have 2B+D
if ((status = usb_set_interface (dev, 0, 3)) < 0) {
WARNING("usb_set_interface failed,status=%d",status);
if ((status = usb_set_interface(dev, 0, 3)) < 0) {
WARNING("usb_set_interface failed,status=%d", status);
return status;
}
@@ -282,36 +282,36 @@ int st5481_setup_usb(struct st5481_adapter *adapter)
return -ENOMEM;
}
ctrl->urb = urb;
// Fill the control URB
usb_fill_control_urb (urb, dev,
usb_sndctrlpipe(dev, 0),
NULL, NULL, 0, usb_ctrl_complete, adapter);
// Fill the control URB
usb_fill_control_urb(urb, dev,
usb_sndctrlpipe(dev, 0),
NULL, NULL, 0, usb_ctrl_complete, adapter);
fifo_init(&ctrl->msg_fifo.f, ARRAY_SIZE(ctrl->msg_fifo.data));
// Allocate URBs and buffers for interrupt endpoint
urb = usb_alloc_urb(0, GFP_KERNEL);
if (!urb) {
if (!urb) {
return -ENOMEM;
}
intr->urb = urb;
buf = kmalloc(INT_PKT_SIZE, GFP_KERNEL);
if (!buf) {
return -ENOMEM;
}
endpoint = &altsetting->endpoint[EP_INT-1];
// Fill the interrupt URB
usb_fill_int_urb(urb, dev,
usb_rcvintpipe(dev, endpoint->desc.bEndpointAddress),
buf, INT_PKT_SIZE,
usb_int_complete, adapter,
endpoint->desc.bInterval);
usb_rcvintpipe(dev, endpoint->desc.bEndpointAddress),
buf, INT_PKT_SIZE,
usb_int_complete, adapter,
endpoint->desc.bInterval);
return 0;
}
@@ -324,7 +324,7 @@ void st5481_release_usb(struct st5481_adapter *adapter)
struct st5481_intr *intr = &adapter->intr;
struct st5481_ctrl *ctrl = &adapter->ctrl;
DBG(1,"");
DBG(1, "");
// Stop and free Control and Interrupt URBs
usb_kill_urb(ctrl->urb);
@@ -343,33 +343,33 @@ void st5481_release_usb(struct st5481_adapter *adapter)
*/
void st5481_start(struct st5481_adapter *adapter)
{
static const u8 init_cmd_table[]={
SET_DEFAULT,0,
STT,0,
SDA_MIN,0x0d,
SDA_MAX,0x29,
SDELAY_VALUE,0x14,
GPIO_DIR,0x01,
GPIO_OUT,RED_LED,
static const u8 init_cmd_table[] = {
SET_DEFAULT, 0,
STT, 0,
SDA_MIN, 0x0d,
SDA_MAX, 0x29,
SDELAY_VALUE, 0x14,
GPIO_DIR, 0x01,
GPIO_OUT, RED_LED,
// FFCTRL_OUT_D,4,
// FFCTRH_OUT_D,12,
FFCTRL_OUT_B1,6,
FFCTRH_OUT_B1,20,
FFCTRL_OUT_B2,6,
FFCTRH_OUT_B2,20,
MPMSK,RXCI_INT+DEN_INT+DCOLL_INT,
FFCTRL_OUT_B1, 6,
FFCTRH_OUT_B1, 20,
FFCTRL_OUT_B2, 6,
FFCTRH_OUT_B2, 20,
MPMSK, RXCI_INT + DEN_INT + DCOLL_INT,
0
};
};
struct st5481_intr *intr = &adapter->intr;
int i = 0;
u8 request,value;
u8 request, value;
DBG(8,"");
DBG(8, "");
adapter->leds = RED_LED;
adapter->leds = RED_LED;
// Start receiving on the interrupt endpoint
SUBMIT_URB(intr->urb, GFP_KERNEL);
SUBMIT_URB(intr->urb, GFP_KERNEL);
while ((request = init_cmd_table[i++])) {
value = init_cmd_table[i++];
@@ -383,7 +383,7 @@ void st5481_start(struct st5481_adapter *adapter)
*/
void st5481_stop(struct st5481_adapter *adapter)
{
DBG(8,"");
DBG(8, "");
st5481_usb_device_ctrl_msg(adapter, SET_DEFAULT, 0, NULL, NULL);
}
@@ -394,22 +394,22 @@ void st5481_stop(struct st5481_adapter *adapter)
static void
fill_isoc_urb(struct urb *urb, struct usb_device *dev,
unsigned int pipe, void *buf, int num_packets,
unsigned int pipe, void *buf, int num_packets,
int packet_size, usb_complete_t complete,
void *context)
void *context)
{
int k;
urb->dev=dev;
urb->pipe=pipe;
urb->dev = dev;
urb->pipe = pipe;
urb->interval = 1;
urb->transfer_buffer=buf;
urb->transfer_buffer = buf;
urb->number_of_packets = num_packets;
urb->transfer_buffer_length=num_packets*packet_size;
urb->transfer_buffer_length = num_packets * packet_size;
urb->actual_length = 0;
urb->complete=complete;
urb->context=context;
urb->transfer_flags=URB_ISO_ASAP;
urb->complete = complete;
urb->context = context;
urb->transfer_flags = URB_ISO_ASAP;
for (k = 0; k < num_packets; k++) {
urb->iso_frame_desc[k].offset = packet_size * k;
urb->iso_frame_desc[k].length = packet_size;
@@ -418,10 +418,10 @@ fill_isoc_urb(struct urb *urb, struct usb_device *dev,
}
int
st5481_setup_isocpipes(struct urb* urb[2], struct usb_device *dev,
unsigned int pipe, int num_packets,
int packet_size, int buf_size,
usb_complete_t complete, void *context)
st5481_setup_isocpipes(struct urb *urb[2], struct usb_device *dev,
unsigned int pipe, int num_packets,
int packet_size, int buf_size,
usb_complete_t complete, void *context)
{
int j, retval;
unsigned char *buf;
@@ -436,15 +436,15 @@ st5481_setup_isocpipes(struct urb* urb[2], struct usb_device *dev,
buf = kmalloc(buf_size, GFP_KERNEL);
if (!buf)
goto err;
// Fill the isochronous URB
fill_isoc_urb(urb[j], dev, pipe, buf,
fill_isoc_urb(urb[j], dev, pipe, buf,
num_packets, packet_size, complete,
context);
}
return 0;
err:
err:
for (j = 0; j < 2; j++) {
if (urb[j]) {
kfree(urb[j]->transfer_buffer);
@@ -456,7 +456,7 @@ st5481_setup_isocpipes(struct urb* urb[2], struct usb_device *dev,
return retval;
}
void st5481_release_isocpipes(struct urb* urb[2])
void st5481_release_isocpipes(struct urb *urb[2])
{
int j;
@@ -471,8 +471,8 @@ void st5481_release_isocpipes(struct urb* urb[2])
/*
* Decode frames received on the B/D channel.
* Note that this function will be called continuously
* with 64Kbit/s / 16Kbit/s of data and hence it will be
* called 50 times per second with 20 ISOC descriptors.
* with 64Kbit/s / 16Kbit/s of data and hence it will be
* called 50 times per second with 20 ISOC descriptors.
* Called at interrupt.
*/
static void usb_in_complete(struct urb *urb)
@@ -484,18 +484,18 @@ static void usb_in_complete(struct urb *urb)
if (unlikely(urb->status < 0)) {
switch (urb->status) {
case -ENOENT:
case -ESHUTDOWN:
case -ECONNRESET:
DBG(1,"urb killed status %d", urb->status);
return; // Give up
default:
WARNING("urb status %d",urb->status);
break;
case -ENOENT:
case -ESHUTDOWN:
case -ECONNRESET:
DBG(1, "urb killed status %d", urb->status);
return; // Give up
default:
WARNING("urb status %d", urb->status);
break;
}
}
DBG_ISO_PACKET(0x80,urb);
DBG_ISO_PACKET(0x80, urb);
len = st5481_isoc_flatten(urb);
ptr = urb->transfer_buffer;
@@ -506,14 +506,14 @@ static void usb_in_complete(struct urb *urb)
len = 0;
} else {
status = isdnhdlc_decode(&in->hdlc_state, ptr, len, &count,
in->rcvbuf, in->bufsize);
in->rcvbuf, in->bufsize);
ptr += count;
len -= count;
}
if (status > 0) {
// Good frame received
DBG(4,"count=%d",status);
DBG(4, "count=%d", status);
DBG_PACKET(0x400, in->rcvbuf, status);
if (!(skb = dev_alloc_skb(status))) {
WARNING("receive out of memory\n");
@@ -542,14 +542,14 @@ int st5481_setup_in(struct st5481_in *in)
struct usb_device *dev = in->adapter->usb_dev;
int retval;
DBG(4,"");
DBG(4, "");
in->rcvbuf = kmalloc(in->bufsize, GFP_KERNEL);
retval = -ENOMEM;
if (!in->rcvbuf)
goto err;
retval = st5481_setup_isocpipes(in->urb, dev,
retval = st5481_setup_isocpipes(in->urb, dev,
usb_rcvisocpipe(dev, in->ep),
in->num_packets, in->packet_size,
in->num_packets * in->packet_size,
@@ -558,51 +558,51 @@ int st5481_setup_in(struct st5481_in *in)
goto err_free;
return 0;
err_free:
err_free:
kfree(in->rcvbuf);
err:
err:
return retval;
}
void st5481_release_in(struct st5481_in *in)
{
DBG(2,"");
DBG(2, "");
st5481_release_isocpipes(in->urb);
}
/*
* Make the transfer_buffer contiguous by
* copying from the iso descriptors if necessary.
* copying from the iso descriptors if necessary.
*/
static int st5481_isoc_flatten(struct urb *urb)
{
struct usb_iso_packet_descriptor *pipd,*pend;
unsigned char *src,*dst;
struct usb_iso_packet_descriptor *pipd, *pend;
unsigned char *src, *dst;
unsigned int len;
if (urb->status < 0) {
return urb->status;
}
for (pipd = &urb->iso_frame_desc[0],
pend = &urb->iso_frame_desc[urb->number_of_packets],
dst = urb->transfer_buffer;
pipd < pend;
dst = urb->transfer_buffer;
pipd < pend;
pipd++) {
if (pipd->status < 0) {
return (pipd->status);
}
len = pipd->actual_length;
pipd->actual_length = 0;
src = urb->transfer_buffer+pipd->offset;
src = urb->transfer_buffer + pipd->offset;
if (src != dst) {
// Need to copy since isoc buffers not full
while (len--) {
*dst++ = *src++;
}
}
} else {
// No need to copy, just update destination buffer
dst += len;
@@ -617,7 +617,7 @@ static void st5481_start_rcv(void *context)
struct st5481_in *in = context;
struct st5481_adapter *adapter = in->adapter;
DBG(4,"");
DBG(4, "");
in->urb[0]->dev = adapter->usb_dev;
SUBMIT_URB(in->urb[0], GFP_KERNEL);
@@ -654,4 +654,3 @@ void st5481_in_mode(struct st5481_in *in, int mode)
0, NULL, NULL);
}
}

Visa fil

@@ -3,7 +3,7 @@
* Author Karsten Keil
* based on the teles driver from Jan den Ouden
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -43,7 +43,7 @@ enum {
ST_TEI_IDVERIFY,
};
#define TEI_STATE_COUNT (ST_TEI_IDVERIFY+1)
#define TEI_STATE_COUNT (ST_TEI_IDVERIFY + 1)
static char *strTeiState[] =
{
@@ -62,7 +62,7 @@ enum {
EV_T202,
};
#define TEI_EVENT_COUNT (EV_T202+1)
#define TEI_EVENT_COUNT (EV_T202 + 1)
static char *strTeiEvent[] =
{
@@ -130,14 +130,14 @@ tei_id_request(struct FsmInst *fi, int event, void *arg)
if (st->l2.tei != -1) {
st->ma.tei_m.printdebug(&st->ma.tei_m,
"assign request for already assigned tei %d",
st->l2.tei);
"assign request for already assigned tei %d",
st->l2.tei);
return;
}
st->ma.ri = random_ri();
if (st->ma.debug)
st->ma.tei_m.printdebug(&st->ma.tei_m,
"assign request ri %d", st->ma.ri);
"assign request ri %d", st->ma.ri);
put_tei_msg(st, ID_REQUEST, st->ma.ri, 127);
FsmChangeState(&st->ma.tei_m, ST_TEI_IDREQ);
FsmAddTimer(&st->ma.t202, st->ma.T202, EV_T202, NULL, 1);
@@ -156,11 +156,11 @@ tei_id_assign(struct FsmInst *fi, int event, void *arg)
tei = skb->data[4] >> 1;
if (st->ma.debug)
st->ma.tei_m.printdebug(&st->ma.tei_m,
"identity assign ri %d tei %d", ri, tei);
"identity assign ri %d tei %d", ri, tei);
if ((ost = findtei(st, tei))) { /* same tei is in use */
if (ri != ost->ma.ri) {
st->ma.tei_m.printdebug(&st->ma.tei_m,
"possible duplicate assignment tei %d", tei);
"possible duplicate assignment tei %d", tei);
ost->l2.l2tei(ost, MDL_ERROR | RESPONSE, NULL);
}
} else if (ri == st->ma.ri) {
@@ -183,14 +183,14 @@ tei_id_test_dup(struct FsmInst *fi, int event, void *arg)
tei = skb->data[4] >> 1;
if (st->ma.debug)
st->ma.tei_m.printdebug(&st->ma.tei_m,
"foreign identity assign ri %d tei %d", ri, tei);
"foreign identity assign ri %d tei %d", ri, tei);
if ((ost = findtei(st, tei))) { /* same tei is in use */
if (ri != ost->ma.ri) { /* and it wasn't our request */
st->ma.tei_m.printdebug(&st->ma.tei_m,
"possible duplicate assignment tei %d", tei);
"possible duplicate assignment tei %d", tei);
FsmEvent(&ost->ma.tei_m, EV_VERIFY, NULL);
}
}
}
}
static void
@@ -204,7 +204,7 @@ tei_id_denied(struct FsmInst *fi, int event, void *arg)
tei = skb->data[4] >> 1;
if (st->ma.debug)
st->ma.tei_m.printdebug(&st->ma.tei_m,
"identity denied ri %d tei %d", ri, tei);
"identity denied ri %d tei %d", ri, tei);
}
static void
@@ -217,7 +217,7 @@ tei_id_chk_req(struct FsmInst *fi, int event, void *arg)
tei = skb->data[4] >> 1;
if (st->ma.debug)
st->ma.tei_m.printdebug(&st->ma.tei_m,
"identity check req tei %d", tei);
"identity check req tei %d", tei);
if ((st->l2.tei != -1) && ((tei == GROUP_TEI) || (tei == st->l2.tei))) {
FsmDelTimer(&st->ma.t202, 4);
FsmChangeState(&st->ma.tei_m, ST_TEI_NOP);
@@ -236,7 +236,7 @@ tei_id_remove(struct FsmInst *fi, int event, void *arg)
tei = skb->data[4] >> 1;
if (st->ma.debug)
st->ma.tei_m.printdebug(&st->ma.tei_m,
"identity remove tei %d", tei);
"identity remove tei %d", tei);
if ((st->l2.tei != -1) && ((tei == GROUP_TEI) || (tei == st->l2.tei))) {
FsmDelTimer(&st->ma.t202, 5);
FsmChangeState(&st->ma.tei_m, ST_TEI_NOP);
@@ -253,7 +253,7 @@ tei_id_verify(struct FsmInst *fi, int event, void *arg)
if (st->ma.debug)
st->ma.tei_m.printdebug(&st->ma.tei_m,
"id verify request for tei %d", st->l2.tei);
"id verify request for tei %d", st->l2.tei);
put_tei_msg(st, ID_VERIFY, 0, st->l2.tei);
FsmChangeState(&st->ma.tei_m, ST_TEI_IDVERIFY);
FsmAddTimer(&st->ma.t202, st->ma.T202, EV_T202, NULL, 2);
@@ -270,8 +270,8 @@ tei_id_req_tout(struct FsmInst *fi, int event, void *arg)
st->ma.ri = random_ri();
if (st->ma.debug)
st->ma.tei_m.printdebug(&st->ma.tei_m,
"assign req(%d) ri %d", 4 - st->ma.N202,
st->ma.ri);
"assign req(%d) ri %d", 4 - st->ma.N202,
st->ma.ri);
put_tei_msg(st, ID_REQUEST, st->ma.ri, 127);
FsmAddTimer(&st->ma.t202, st->ma.T202, EV_T202, NULL, 3);
} else {
@@ -292,13 +292,13 @@ tei_id_ver_tout(struct FsmInst *fi, int event, void *arg)
if (--st->ma.N202) {
if (st->ma.debug)
st->ma.tei_m.printdebug(&st->ma.tei_m,
"id verify req(%d) for tei %d",
3 - st->ma.N202, st->l2.tei);
"id verify req(%d) for tei %d",
3 - st->ma.N202, st->l2.tei);
put_tei_msg(st, ID_VERIFY, 0, st->l2.tei);
FsmAddTimer(&st->ma.t202, st->ma.T202, EV_T202, NULL, 4);
} else {
st->ma.tei_m.printdebug(&st->ma.tei_m,
"verify req for tei %d failed", st->l2.tei);
"verify req for tei %d failed", st->l2.tei);
st->l3.l3l2(st, MDL_REMOVE | REQUEST, NULL);
cs = (struct IsdnCardState *) st->l1.hardware;
cs->cardmsg(cs, MDL_REMOVE | REQUEST, NULL);
@@ -320,25 +320,25 @@ tei_l1l2(struct PStack *st, int pr, void *arg)
if (pr == (PH_DATA | INDICATION)) {
if (skb->len < 3) {
st->ma.tei_m.printdebug(&st->ma.tei_m,
"short mgr frame %ld/3", skb->len);
"short mgr frame %ld/3", skb->len);
} else if ((skb->data[0] != ((TEI_SAPI << 2) | 2)) ||
(skb->data[1] != ((GROUP_TEI << 1) | 1))) {
st->ma.tei_m.printdebug(&st->ma.tei_m,
"wrong mgr sapi/tei %x/%x",
skb->data[0], skb->data[1]);
"wrong mgr sapi/tei %x/%x",
skb->data[0], skb->data[1]);
} else if ((skb->data[2] & 0xef) != UI) {
st->ma.tei_m.printdebug(&st->ma.tei_m,
"mgr frame is not ui %x", skb->data[2]);
"mgr frame is not ui %x", skb->data[2]);
} else {
skb_pull(skb, 3);
if (skb->len < 5) {
st->ma.tei_m.printdebug(&st->ma.tei_m,
"short mgr frame %ld/5", skb->len);
"short mgr frame %ld/5", skb->len);
} else if (skb->data[0] != TEI_ENTITY_ID) {
/* wrong management entity identifier, ignore */
st->ma.tei_m.printdebug(&st->ma.tei_m,
"tei handler wrong entity id %x",
skb->data[0]);
"tei handler wrong entity id %x",
skb->data[0]);
} else {
mt = skb->data[3];
if (mt == ID_ASSIGNED)
@@ -351,13 +351,13 @@ tei_l1l2(struct PStack *st, int pr, void *arg)
FsmEvent(&st->ma.tei_m, EV_REMOVE, skb);
else {
st->ma.tei_m.printdebug(&st->ma.tei_m,
"tei handler wrong mt %x\n", mt);
"tei handler wrong mt %x\n", mt);
}
}
}
} else {
st->ma.tei_m.printdebug(&st->ma.tei_m,
"tei handler wrong pr %x\n", pr);
"tei handler wrong pr %x\n", pr);
}
dev_kfree_skb(skb);
}
@@ -371,7 +371,7 @@ tei_l2tei(struct PStack *st, int pr, void *arg)
if (pr == (MDL_ASSIGN | INDICATION)) {
if (st->ma.debug)
st->ma.tei_m.printdebug(&st->ma.tei_m,
"fixed assign tei %d", st->l2.tei);
"fixed assign tei %d", st->l2.tei);
st->l3.l3l2(st, MDL_ASSIGN | REQUEST, (void *) (long) st->l2.tei);
cs = (struct IsdnCardState *) st->l1.hardware;
cs->cardmsg(cs, MDL_ASSIGN | REQUEST, NULL);
@@ -379,14 +379,14 @@ tei_l2tei(struct PStack *st, int pr, void *arg)
return;
}
switch (pr) {
case (MDL_ASSIGN | INDICATION):
FsmEvent(&st->ma.tei_m, EV_IDREQ, arg);
break;
case (MDL_ERROR | REQUEST):
FsmEvent(&st->ma.tei_m, EV_VERIFY, arg);
break;
default:
break;
case (MDL_ASSIGN | INDICATION):
FsmEvent(&st->ma.tei_m, EV_IDREQ, arg);
break;
case (MDL_ERROR | REQUEST):
FsmEvent(&st->ma.tei_m, EV_VERIFY, arg);
break;
default:
break;
}
}

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -18,7 +18,7 @@
static const char *TeleInt_revision = "$Revision: 1.16.2.5 $";
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
static inline u_char
@@ -40,14 +40,14 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
}
static inline void
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
register u_char ret;
register int max_delay = 20000;
register int i;
byteout(ale, off);
for (i = 0; i<size; i++) {
for (i = 0; i < size; i++) {
ret = HFC_BUSY & bytein(ale);
while (ret && --max_delay)
ret = HFC_BUSY & bytein(ale);
@@ -78,14 +78,14 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
}
static inline void
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
register u_char ret;
register int max_delay = 20000;
register int i;
byteout(ale, off);
for (i = 0; i<size; i++) {
for (i = 0; i < size; i++) {
ret = HFC_BUSY & bytein(ale);
while (ret && --max_delay)
ret = HFC_BUSY & bytein(ale);
@@ -114,14 +114,14 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
cs->hw.hfc.cip = 0;
readfifo(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, 0, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
cs->hw.hfc.cip = 0;
writefifo(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, 0, data, size);
@@ -163,7 +163,7 @@ TeleInt_interrupt(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
val = readreg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, ISAC_ISTA);
@@ -183,7 +183,7 @@ TeleInt_Timer(struct IsdnCardState *cs)
{
int stat = 0;
u_long flags;
spin_lock_irqsave(&cs->lock, flags);
if (cs->bcs[0].mode) {
stat |= 1;
@@ -194,7 +194,7 @@ TeleInt_Timer(struct IsdnCardState *cs)
main_irq_hfc(&cs->bcs[1]);
}
spin_unlock_irqrestore(&cs->lock, flags);
stat = HZ/100;
stat = HZ / 100;
if (!stat)
stat = 1;
cs->hw.hfc.timer.expires = jiffies + stat;
@@ -229,34 +229,34 @@ TeleInt_card_msg(struct IsdnCardState *cs, int mt, void *arg)
int delay;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_TeleInt(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_TeleInt(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
reset_TeleInt(cs);
inithfc(cs);
clear_pending_isac_ints(cs);
initisac(cs);
/* Reenable all IRQ */
cs->writeisac(cs, ISAC_MASK, 0);
cs->writeisac(cs, ISAC_CMDR, 0x41);
spin_unlock_irqrestore(&cs->lock, flags);
delay = HZ/100;
if (!delay)
delay = 1;
cs->hw.hfc.timer.expires = jiffies + delay;
add_timer(&cs->hw.hfc.timer);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_TeleInt(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_TeleInt(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
reset_TeleInt(cs);
inithfc(cs);
clear_pending_isac_ints(cs);
initisac(cs);
/* Reenable all IRQ */
cs->writeisac(cs, ISAC_MASK, 0);
cs->writeisac(cs, ISAC_CMDR, 0x41);
spin_unlock_irqrestore(&cs->lock, flags);
delay = HZ / 100;
if (!delay)
delay = 1;
cs->hw.hfc.timer.expires = jiffies + delay;
add_timer(&cs->hw.hfc.timer);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
int __devinit
@@ -293,34 +293,34 @@ setup_TeleInt(struct IsdnCard *card)
byteout(cs->hw.hfc.addr, cs->hw.hfc.addr & 0xff);
byteout(cs->hw.hfc.addr | 1, ((cs->hw.hfc.addr & 0x300) >> 8) | 0x54);
switch (cs->irq) {
case 3:
cs->hw.hfc.cirm |= HFC_INTA;
break;
case 4:
cs->hw.hfc.cirm |= HFC_INTB;
break;
case 5:
cs->hw.hfc.cirm |= HFC_INTC;
break;
case 7:
cs->hw.hfc.cirm |= HFC_INTD;
break;
case 10:
cs->hw.hfc.cirm |= HFC_INTE;
break;
case 11:
cs->hw.hfc.cirm |= HFC_INTF;
break;
default:
printk(KERN_WARNING "TeleInt: wrong IRQ\n");
release_io_TeleInt(cs);
return (0);
case 3:
cs->hw.hfc.cirm |= HFC_INTA;
break;
case 4:
cs->hw.hfc.cirm |= HFC_INTB;
break;
case 5:
cs->hw.hfc.cirm |= HFC_INTC;
break;
case 7:
cs->hw.hfc.cirm |= HFC_INTD;
break;
case 10:
cs->hw.hfc.cirm |= HFC_INTE;
break;
case 11:
cs->hw.hfc.cirm |= HFC_INTF;
break;
default:
printk(KERN_WARNING "TeleInt: wrong IRQ\n");
release_io_TeleInt(cs);
return (0);
}
byteout(cs->hw.hfc.addr | 1, cs->hw.hfc.cirm);
byteout(cs->hw.hfc.addr | 1, cs->hw.hfc.ctmt);
printk(KERN_INFO "TeleInt: defined at 0x%x IRQ %d\n",
cs->hw.hfc.addr, cs->irq);
cs->hw.hfc.addr, cs->irq);
setup_isac(cs);
cs->readisac = &ReadISAC;

Visa fil

@@ -5,7 +5,7 @@
* Author Karsten Keil
* based on the teles driver from Jan den Ouden
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -24,7 +24,7 @@
static const char *teles0_revision = "$Revision: 2.15.2.4 $";
#define TELES_IOMEM_SIZE 0x400
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
static inline u_char
@@ -55,7 +55,7 @@ writehscx(void __iomem *adr, int hscx, u_char off, u_char data)
}
static inline void
read_fifo_isac(void __iomem *adr, u_char * data, int size)
read_fifo_isac(void __iomem *adr, u_char *data, int size)
{
register int i;
register u_char __iomem *ad = adr + 0x100;
@@ -64,7 +64,7 @@ read_fifo_isac(void __iomem *adr, u_char * data, int size)
}
static inline void
write_fifo_isac(void __iomem *adr, u_char * data, int size)
write_fifo_isac(void __iomem *adr, u_char *data, int size)
{
register int i;
register u_char __iomem *ad = adr + 0x100;
@@ -74,7 +74,7 @@ write_fifo_isac(void __iomem *adr, u_char * data, int size)
}
static inline void
read_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
read_fifo_hscx(void __iomem *adr, int hscx, u_char *data, int size)
{
register int i;
register u_char __iomem *ad = adr + (hscx ? 0x1c0 : 0x180);
@@ -83,7 +83,7 @@ read_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
}
static inline void
write_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
write_fifo_hscx(void __iomem *adr, int hscx, u_char *data, int size)
{
int i;
register u_char __iomem *ad = adr + (hscx ? 0x1c0 : 0x180);
@@ -107,13 +107,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
read_fifo_isac(cs->hw.teles0.membase, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
write_fifo_isac(cs->hw.teles0.membase, data, size);
}
@@ -151,11 +151,11 @@ teles0_interrupt(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
val = readhscx(cs->hw.teles0.membase, 1, HSCX_ISTA);
Start_HSCX:
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readisac(cs->hw.teles0.membase, ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val)
isac_interrupt(cs, val);
count++;
@@ -197,33 +197,33 @@ reset_teles0(struct IsdnCardState *cs)
if (cs->hw.teles0.cfg_reg) {
switch (cs->irq) {
case 2:
case 9:
cfval = 0x00;
break;
case 3:
cfval = 0x02;
break;
case 4:
cfval = 0x04;
break;
case 5:
cfval = 0x06;
break;
case 10:
cfval = 0x08;
break;
case 11:
cfval = 0x0A;
break;
case 12:
cfval = 0x0C;
break;
case 15:
cfval = 0x0E;
break;
default:
return(1);
case 2:
case 9:
cfval = 0x00;
break;
case 3:
cfval = 0x02;
break;
case 4:
cfval = 0x04;
break;
case 5:
cfval = 0x06;
break;
case 10:
cfval = 0x08;
break;
case 11:
cfval = 0x0A;
break;
case 12:
cfval = 0x0C;
break;
case 15:
cfval = 0x0E;
break;
default:
return (1);
}
cfval |= ((cs->hw.teles0.phymem >> 9) & 0xF0);
byteout(cs->hw.teles0.cfg_reg + 4, cfval);
@@ -235,7 +235,7 @@ reset_teles0(struct IsdnCardState *cs)
HZDELAY(HZ / 5 + 1);
writeb(1, cs->hw.teles0.membase + 0x80); mb();
HZDELAY(HZ / 5 + 1);
return(0);
return (0);
}
static int
@@ -244,23 +244,23 @@ Teles_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_teles0(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_teles0(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_teles0(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_teles0(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
int __devinit
@@ -283,14 +283,14 @@ setup_teles0(struct IsdnCard *card)
if (card->para[1] < 0x10000) {
card->para[1] <<= 4;
printk(KERN_INFO
"Teles0: membase configured DOSish, assuming 0x%lx\n",
"Teles0: membase configured DOSish, assuming 0x%lx\n",
(unsigned long) card->para[1]);
}
cs->irq = card->para[0];
if (cs->hw.teles0.cfg_reg) {
if (!request_region(cs->hw.teles0.cfg_reg, 8, "teles cfg")) {
printk(KERN_WARNING
"HiSax: %s config port %x-%x already in use\n",
"HiSax: %s config port %x-%x already in use\n",
CardType[card->typ],
cs->hw.teles0.cfg_reg,
cs->hw.teles0.cfg_reg + 8);
@@ -311,8 +311,8 @@ setup_teles0(struct IsdnCard *card)
return (0);
}
val = bytein(cs->hw.teles0.cfg_reg + 2); /* 0x1e=without AB
* 0x1f=with AB
* 0x1c 16.3 ???
* 0x1f=with AB
* 0x1c 16.3 ???
*/
if (val != 0x1e && val != 0x1f) {
printk(KERN_WARNING "Teles0: 16.0 Byte at %x is %x\n",
@@ -326,10 +326,10 @@ setup_teles0(struct IsdnCard *card)
cs->hw.teles0.phymem = card->para[1];
if (!request_mem_region(cs->hw.teles0.phymem, TELES_IOMEM_SIZE, "teles iomem")) {
printk(KERN_WARNING
"HiSax: %s memory region %lx-%lx already in use\n",
CardType[card->typ],
cs->hw.teles0.phymem,
cs->hw.teles0.phymem + TELES_IOMEM_SIZE);
"HiSax: %s memory region %lx-%lx already in use\n",
CardType[card->typ],
cs->hw.teles0.phymem,
cs->hw.teles0.phymem + TELES_IOMEM_SIZE);
if (cs->hw.teles0.cfg_reg)
release_region(cs->hw.teles0.cfg_reg, 8);
return (0);
@@ -357,7 +357,7 @@ setup_teles0(struct IsdnCard *card)
ISACVersion(cs, "Teles0:");
if (HscxVersion(cs, "Teles0:")) {
printk(KERN_WARNING
"Teles0: wrong HSCX versions check IO/MEM addresses\n");
"Teles0: wrong HSCX versions check IO/MEM addresses\n");
release_io_teles0(cs);
return (0);
}

Visa fil

@@ -4,7 +4,7 @@
*
* Author Karsten Keil
* Copyright by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -22,7 +22,7 @@
static const char *teles3_revision = "$Revision: 2.19.2.4 $";
#define byteout(addr,val) outb(val,addr)
#define byteout(addr, val) outb(val, addr)
#define bytein(addr) inb(addr)
static inline u_char
@@ -39,13 +39,13 @@ writereg(unsigned int adr, u_char off, u_char data)
static inline void
read_fifo(unsigned int adr, u_char * data, int size)
read_fifo(unsigned int adr, u_char *data, int size)
{
insb(adr, data, size);
}
static void
write_fifo(unsigned int adr, u_char * data, int size)
write_fifo(unsigned int adr, u_char *data, int size)
{
outsb(adr, data, size);
}
@@ -65,13 +65,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
read_fifo(cs->hw.teles3.isacfifo, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
write_fifo(cs->hw.teles3.isacfifo, data, size);
}
@@ -110,11 +110,11 @@ teles3_interrupt(int intno, void *dev_id)
spin_lock_irqsave(&cs->lock, flags);
val = readreg(cs->hw.teles3.hscx[1], HSCX_ISTA);
Start_HSCX:
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs->hw.teles3.isac, ISAC_ISTA);
Start_ISAC:
Start_ISAC:
if (val)
isac_interrupt(cs, val);
count++;
@@ -178,33 +178,33 @@ reset_teles3(struct IsdnCardState *cs)
if (cs->typ != ISDN_CTYPE_TELESPCMCIA) {
if ((cs->hw.teles3.cfg_reg) && (cs->typ != ISDN_CTYPE_COMPAQ_ISA)) {
switch (cs->irq) {
case 2:
case 9:
irqcfg = 0x00;
break;
case 3:
irqcfg = 0x02;
break;
case 4:
irqcfg = 0x04;
break;
case 5:
irqcfg = 0x06;
break;
case 10:
irqcfg = 0x08;
break;
case 11:
irqcfg = 0x0A;
break;
case 12:
irqcfg = 0x0C;
break;
case 15:
irqcfg = 0x0E;
break;
default:
return(1);
case 2:
case 9:
irqcfg = 0x00;
break;
case 3:
irqcfg = 0x02;
break;
case 4:
irqcfg = 0x04;
break;
case 5:
irqcfg = 0x06;
break;
case 10:
irqcfg = 0x08;
break;
case 11:
irqcfg = 0x0A;
break;
case 12:
irqcfg = 0x0C;
break;
case 15:
irqcfg = 0x0E;
break;
default:
return (1);
}
byteout(cs->hw.teles3.cfg_reg + 4, irqcfg);
HZDELAY(HZ / 10 + 1);
@@ -223,7 +223,7 @@ reset_teles3(struct IsdnCardState *cs)
HZDELAY(2);
}
}
return(0);
return (0);
}
static int
@@ -232,36 +232,36 @@ Teles_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_teles3(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_RELEASE:
release_io_teles3(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
spin_lock_irqsave(&cs->lock, flags);
reset_teles3(cs);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_RELEASE:
release_io_teles3(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
#ifdef __ISAPNP__
static struct isapnp_device_id teles_ids[] __devinitdata = {
{ ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2110),
ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2110),
ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2110),
(unsigned long) "Teles 16.3 PnP" },
{ ISAPNP_VENDOR('C', 'T', 'X'), ISAPNP_FUNCTION(0x0),
ISAPNP_VENDOR('C', 'T', 'X'), ISAPNP_FUNCTION(0x0),
ISAPNP_VENDOR('C', 'T', 'X'), ISAPNP_FUNCTION(0x0),
(unsigned long) "Creatix 16.3 PnP" },
{ ISAPNP_VENDOR('C', 'P', 'Q'), ISAPNP_FUNCTION(0x1002),
ISAPNP_VENDOR('C', 'P', 'Q'), ISAPNP_FUNCTION(0x1002),
ISAPNP_VENDOR('C', 'P', 'Q'), ISAPNP_FUNCTION(0x1002),
(unsigned long) "Compaq ISDN S0" },
{ 0, }
};
@@ -286,22 +286,22 @@ setup_teles3(struct IsdnCard *card)
#ifdef __ISAPNP__
if (!card->para[1] && isapnp_present()) {
struct pnp_dev *pnp_d;
while(ipid->card_vendor) {
while (ipid->card_vendor) {
if ((pnp_c = pnp_find_card(ipid->card_vendor,
ipid->card_device, pnp_c))) {
ipid->card_device, pnp_c))) {
pnp_d = NULL;
if ((pnp_d = pnp_find_dev(pnp_c,
ipid->vendor, ipid->function, pnp_d))) {
ipid->vendor, ipid->function, pnp_d))) {
int err;
printk(KERN_INFO "HiSax: %s detected\n",
(char *)ipid->driver_data);
(char *)ipid->driver_data);
pnp_disable_dev(pnp_d);
err = pnp_activate_dev(pnp_d);
if (err<0) {
if (err < 0) {
printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
__func__, err);
return(0);
__func__, err);
return (0);
}
card->para[3] = pnp_port_start(pnp_d, 2);
card->para[2] = pnp_port_start(pnp_d, 1);
@@ -309,9 +309,9 @@ setup_teles3(struct IsdnCard *card)
card->para[0] = pnp_irq(pnp_d, 0);
if (!card->para[0] || !card->para[1] || !card->para[2]) {
printk(KERN_ERR "Teles PnP:some resources are missing %ld/%lx/%lx\n",
card->para[0], card->para[1], card->para[2]);
card->para[0], card->para[1], card->para[2]);
pnp_disable_dev(pnp_d);
return(0);
return (0);
}
break;
} else {
@@ -320,21 +320,21 @@ setup_teles3(struct IsdnCard *card)
}
ipid++;
pnp_c = NULL;
}
}
if (!ipid->card_vendor) {
printk(KERN_INFO "Teles PnP: no ISAPnP card found\n");
return(0);
return (0);
}
}
#endif
if (cs->typ == ISDN_CTYPE_16_3) {
cs->hw.teles3.cfg_reg = card->para[1];
switch (cs->hw.teles3.cfg_reg) {
case 0x180:
case 0x280:
case 0x380:
cs->hw.teles3.cfg_reg |= 0xc00;
break;
case 0x180:
case 0x280:
case 0x380:
cs->hw.teles3.cfg_reg |= 0xc00;
break;
}
cs->hw.teles3.isac = cs->hw.teles3.cfg_reg - 0x420;
cs->hw.teles3.hscx[0] = cs->hw.teles3.cfg_reg - 0xc20;
@@ -374,9 +374,9 @@ setup_teles3(struct IsdnCard *card)
if (cs->typ == ISDN_CTYPE_COMPAQ_ISA) {
if (!request_region(cs->hw.teles3.cfg_reg, 1, "teles3 cfg")) {
printk(KERN_WARNING
"HiSax: %s config port %x already in use\n",
CardType[card->typ],
cs->hw.teles3.cfg_reg);
"HiSax: %s config port %x already in use\n",
CardType[card->typ],
cs->hw.teles3.cfg_reg);
return (0);
}
} else {
@@ -385,14 +385,14 @@ setup_teles3(struct IsdnCard *card)
"HiSax: %s config port %x-%x already in use\n",
CardType[card->typ],
cs->hw.teles3.cfg_reg,
cs->hw.teles3.cfg_reg + 8);
cs->hw.teles3.cfg_reg + 8);
return (0);
}
}
}
if (!request_region(cs->hw.teles3.isac + 32, 32, "HiSax isac")) {
printk(KERN_WARNING
"HiSax: %s isac ports %x-%x already in use\n",
"HiSax: %s isac ports %x-%x already in use\n",
CardType[cs->typ],
cs->hw.teles3.isac + 32,
cs->hw.teles3.isac + 64);
@@ -407,7 +407,7 @@ setup_teles3(struct IsdnCard *card)
}
if (!request_region(cs->hw.teles3.hscx[0] + 32, 32, "HiSax hscx A")) {
printk(KERN_WARNING
"HiSax: %s hscx A ports %x-%x already in use\n",
"HiSax: %s hscx A ports %x-%x already in use\n",
CardType[cs->typ],
cs->hw.teles3.hscx[0] + 32,
cs->hw.teles3.hscx[0] + 64);
@@ -423,7 +423,7 @@ setup_teles3(struct IsdnCard *card)
}
if (!request_region(cs->hw.teles3.hscx[1] + 32, 32, "HiSax hscx B")) {
printk(KERN_WARNING
"HiSax: %s hscx B ports %x-%x already in use\n",
"HiSax: %s hscx B ports %x-%x already in use\n",
CardType[cs->typ],
cs->hw.teles3.hscx[1] + 32,
cs->hw.teles3.hscx[1] + 64);

Visa fil

@@ -1,20 +1,20 @@
/* $Id: teles_cs.c,v 1.1.2.2 2004/01/25 15:07:06 keil Exp $ */
/*======================================================================
A teles S0 PCMCIA client driver
A teles S0 PCMCIA client driver
Based on skeleton by David Hinds, dhinds@allegro.stanford.edu
Written by Christof Petig, christof.petig@wtal.de
Also inspired by ELSA PCMCIA driver
by Klaus Lichtenwalder <Lichtenwalder@ACM.org>
Extensions to new hisax_pcmcia by Karsten Keil
Based on skeleton by David Hinds, dhinds@allegro.stanford.edu
Written by Christof Petig, christof.petig@wtal.de
minor changes to be compatible with kernel 2.4.x
by Jan.Schubert@GMX.li
Also inspired by ELSA PCMCIA driver
by Klaus Lichtenwalder <Lichtenwalder@ACM.org>
======================================================================*/
Extensions to new hisax_pcmcia by Karsten Keil
minor changes to be compatible with kernel 2.4.x
by Jan.Schubert@GMX.li
======================================================================*/
#include <linux/kernel.h>
#include <linux/module.h>
@@ -44,33 +44,33 @@ MODULE_LICENSE("GPL");
static int protocol = 2; /* EURO-ISDN Default */
module_param(protocol, int, 0);
static int teles_cs_config(struct pcmcia_device *link) __devinit ;
static int teles_cs_config(struct pcmcia_device *link) __devinit;
static void teles_cs_release(struct pcmcia_device *link);
static void teles_detach(struct pcmcia_device *p_dev) __devexit ;
static void teles_detach(struct pcmcia_device *p_dev) __devexit;
typedef struct local_info_t {
struct pcmcia_device *p_dev;
int busy;
int cardnr;
int busy;
int cardnr;
} local_info_t;
static int __devinit teles_probe(struct pcmcia_device *link)
{
local_info_t *local;
local_info_t *local;
dev_dbg(&link->dev, "teles_attach()\n");
dev_dbg(&link->dev, "teles_attach()\n");
/* Allocate space for private device-specific data */
local = kzalloc(sizeof(local_info_t), GFP_KERNEL);
if (!local) return -ENOMEM;
local->cardnr = -1;
/* Allocate space for private device-specific data */
local = kzalloc(sizeof(local_info_t), GFP_KERNEL);
if (!local) return -ENOMEM;
local->cardnr = -1;
local->p_dev = link;
link->priv = local;
local->p_dev = link;
link->priv = local;
link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
return teles_cs_config(link);
return teles_cs_config(link);
} /* teles_attach */
static void __devexit teles_detach(struct pcmcia_device *link)
@@ -111,64 +111,64 @@ static int teles_cs_configcheck(struct pcmcia_device *p_dev, void *priv_data)
static int __devinit teles_cs_config(struct pcmcia_device *link)
{
int i;
IsdnCard_t icard;
int i;
IsdnCard_t icard;
dev_dbg(&link->dev, "teles_config(0x%p)\n", link);
dev_dbg(&link->dev, "teles_config(0x%p)\n", link);
i = pcmcia_loop_config(link, teles_cs_configcheck, NULL);
if (i != 0)
goto cs_failed;
i = pcmcia_loop_config(link, teles_cs_configcheck, NULL);
if (i != 0)
goto cs_failed;
if (!link->irq)
goto cs_failed;
if (!link->irq)
goto cs_failed;
i = pcmcia_enable_device(link);
if (i != 0)
goto cs_failed;
i = pcmcia_enable_device(link);
if (i != 0)
goto cs_failed;
icard.para[0] = link->irq;
icard.para[1] = link->resource[0]->start;
icard.protocol = protocol;
icard.typ = ISDN_CTYPE_TELESPCMCIA;
i = hisax_init_pcmcia(link, &(((local_info_t*)link->priv)->busy), &icard);
if (i < 0) {
printk(KERN_ERR "teles_cs: failed to initialize Teles PCMCIA %d at i/o %#x\n",
i, (unsigned int) link->resource[0]->start);
teles_cs_release(link);
return -ENODEV;
}
icard.para[0] = link->irq;
icard.para[1] = link->resource[0]->start;
icard.protocol = protocol;
icard.typ = ISDN_CTYPE_TELESPCMCIA;
((local_info_t*)link->priv)->cardnr = i;
return 0;
i = hisax_init_pcmcia(link, &(((local_info_t *)link->priv)->busy), &icard);
if (i < 0) {
printk(KERN_ERR "teles_cs: failed to initialize Teles PCMCIA %d at i/o %#x\n",
i, (unsigned int) link->resource[0]->start);
teles_cs_release(link);
return -ENODEV;
}
((local_info_t *)link->priv)->cardnr = i;
return 0;
cs_failed:
teles_cs_release(link);
return -ENODEV;
teles_cs_release(link);
return -ENODEV;
} /* teles_cs_config */
static void teles_cs_release(struct pcmcia_device *link)
{
local_info_t *local = link->priv;
local_info_t *local = link->priv;
dev_dbg(&link->dev, "teles_cs_release(0x%p)\n", link);
dev_dbg(&link->dev, "teles_cs_release(0x%p)\n", link);
if (local) {
if (local->cardnr >= 0) {
/* no unregister function with hisax */
HiSax_closecard(local->cardnr);
if (local) {
if (local->cardnr >= 0) {
/* no unregister function with hisax */
HiSax_closecard(local->cardnr);
}
}
}
pcmcia_disable_device(link);
pcmcia_disable_device(link);
} /* teles_cs_release */
static int teles_suspend(struct pcmcia_device *link)
{
local_info_t *dev = link->priv;
dev->busy = 1;
dev->busy = 1;
return 0;
}
@@ -177,7 +177,7 @@ static int teles_resume(struct pcmcia_device *link)
{
local_info_t *dev = link->priv;
dev->busy = 0;
dev->busy = 0;
return 0;
}

Visa fil

@@ -6,7 +6,7 @@
* Karsten Keil
* Copyright by Ton van Rosmalen
* by Karsten Keil <keil@isdn4linux.de>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -36,9 +36,9 @@ static const char *telespci_revision = "$Revision: 2.23.2.3 $";
#define READ_DATA_HSCX (ZORAN_PO_GID1 | ZORAN_PO_GREG1)
#define WRITE_DATA_HSCX (ZORAN_PO_WR | ZORAN_PO_GID1 | ZORAN_PO_GREG1)
#define ZORAN_WAIT_NOBUSY do { \
portdata = readl(adr + 0x200); \
} while (portdata & ZORAN_PO_RQ_PEN)
#define ZORAN_WAIT_NOBUSY do { \
portdata = readl(adr + 0x200); \
} while (portdata & ZORAN_PO_RQ_PEN)
static inline u_char
readisac(void __iomem *adr, u_char off)
@@ -46,15 +46,15 @@ readisac(void __iomem *adr, u_char off)
register unsigned int portdata;
ZORAN_WAIT_NOBUSY;
/* set address for ISAC */
writel(WRITE_ADDR_ISAC | off, adr + 0x200);
ZORAN_WAIT_NOBUSY;
/* read data from ISAC */
writel(READ_DATA_ISAC, adr + 0x200);
ZORAN_WAIT_NOBUSY;
return((u_char)(portdata & ZORAN_PO_DMASK));
return ((u_char)(portdata & ZORAN_PO_DMASK));
}
static inline void
@@ -63,7 +63,7 @@ writeisac(void __iomem *adr, u_char off, u_char data)
register unsigned int portdata;
ZORAN_WAIT_NOBUSY;
/* set address for ISAC */
writel(WRITE_ADDR_ISAC | off, adr + 0x200);
ZORAN_WAIT_NOBUSY;
@@ -80,9 +80,9 @@ readhscx(void __iomem *adr, int hscx, u_char off)
ZORAN_WAIT_NOBUSY;
/* set address for HSCX */
writel(WRITE_ADDR_HSCX | ((hscx ? 0x40:0) + off), adr + 0x200);
writel(WRITE_ADDR_HSCX | ((hscx ? 0x40 : 0) + off), adr + 0x200);
ZORAN_WAIT_NOBUSY;
/* read data from HSCX */
writel(READ_DATA_HSCX, adr + 0x200);
ZORAN_WAIT_NOBUSY;
@@ -96,7 +96,7 @@ writehscx(void __iomem *adr, int hscx, u_char off, u_char data)
ZORAN_WAIT_NOBUSY;
/* set address for HSCX */
writel(WRITE_ADDR_HSCX | ((hscx ? 0x40:0) + off), adr + 0x200);
writel(WRITE_ADDR_HSCX | ((hscx ? 0x40 : 0) + off), adr + 0x200);
ZORAN_WAIT_NOBUSY;
/* write data to HSCX */
@@ -105,7 +105,7 @@ writehscx(void __iomem *adr, int hscx, u_char off, u_char data)
}
static inline void
read_fifo_isac(void __iomem *adr, u_char * data, int size)
read_fifo_isac(void __iomem *adr, u_char *data, int size)
{
register unsigned int portdata;
register int i;
@@ -123,7 +123,7 @@ read_fifo_isac(void __iomem *adr, u_char * data, int size)
}
static void
write_fifo_isac(void __iomem *adr, u_char * data, int size)
write_fifo_isac(void __iomem *adr, u_char *data, int size)
{
register unsigned int portdata;
register int i;
@@ -140,7 +140,7 @@ write_fifo_isac(void __iomem *adr, u_char * data, int size)
}
static inline void
read_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
read_fifo_hscx(void __iomem *adr, int hscx, u_char *data, int size)
{
register unsigned int portdata;
register int i;
@@ -149,7 +149,7 @@ read_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
/* read data from HSCX */
for (i = 0; i < size; i++) {
/* set address for HSCX fifo */
writel(WRITE_ADDR_HSCX |(hscx ? 0x5F:0x1F), adr + 0x200);
writel(WRITE_ADDR_HSCX | (hscx ? 0x5F : 0x1F), adr + 0x200);
ZORAN_WAIT_NOBUSY;
writel(READ_DATA_HSCX, adr + 0x200);
ZORAN_WAIT_NOBUSY;
@@ -158,7 +158,7 @@ read_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
}
static inline void
write_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
write_fifo_hscx(void __iomem *adr, int hscx, u_char *data, int size)
{
unsigned int portdata;
register int i;
@@ -167,7 +167,7 @@ write_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
/* write data to HSCX */
for (i = 0; i < size; i++) {
/* set address for HSCX fifo */
writel(WRITE_ADDR_HSCX |(hscx ? 0x5F:0x1F), adr + 0x200);
writel(WRITE_ADDR_HSCX | (hscx ? 0x5F : 0x1F), adr + 0x200);
ZORAN_WAIT_NOBUSY;
writel(WRITE_DATA_HSCX | data[i], adr + 0x200);
ZORAN_WAIT_NOBUSY;
@@ -190,13 +190,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
read_fifo_isac(cs->hw.teles0.membase, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
write_fifo_isac(cs->hw.teles0.membase, data, size);
}
@@ -267,20 +267,20 @@ TelesPCI_card_msg(struct IsdnCardState *cs, int mt, void *arg)
u_long flags;
switch (mt) {
case CARD_RESET:
return(0);
case CARD_RELEASE:
release_io_telespci(cs);
return(0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return(0);
case CARD_TEST:
return(0);
case CARD_RESET:
return (0);
case CARD_RELEASE:
release_io_telespci(cs);
return (0);
case CARD_INIT:
spin_lock_irqsave(&cs->lock, flags);
inithscxisac(cs, 3);
spin_unlock_irqrestore(&cs->lock, flags);
return (0);
case CARD_TEST:
return (0);
}
return(0);
return (0);
}
static struct pci_dev *dev_tel __devinitdata = NULL;
@@ -300,22 +300,22 @@ setup_telespci(struct IsdnCard *card)
if (cs->typ != ISDN_CTYPE_TELESPCI)
return (0);
if ((dev_tel = hisax_find_pci_device (PCI_VENDOR_ID_ZORAN, PCI_DEVICE_ID_ZORAN_36120, dev_tel))) {
if ((dev_tel = hisax_find_pci_device(PCI_VENDOR_ID_ZORAN, PCI_DEVICE_ID_ZORAN_36120, dev_tel))) {
if (pci_enable_device(dev_tel))
return(0);
return (0);
cs->irq = dev_tel->irq;
if (!cs->irq) {
printk(KERN_WARNING "Teles: No IRQ for PCI card found\n");
return(0);
return (0);
}
cs->hw.teles0.membase = ioremap(pci_resource_start(dev_tel, 0),
PAGE_SIZE);
PAGE_SIZE);
printk(KERN_INFO "Found: Zoran, base-address: 0x%llx, irq: 0x%x\n",
(unsigned long long)pci_resource_start(dev_tel, 0),
dev_tel->irq);
(unsigned long long)pci_resource_start(dev_tel, 0),
dev_tel->irq);
} else {
printk(KERN_WARNING "TelesPCI: No PCI card found\n");
return(0);
return (0);
}
/* Initialize Zoran PCI controller */
@@ -346,7 +346,7 @@ setup_telespci(struct IsdnCard *card)
ISACVersion(cs, "TelesPCI:");
if (HscxVersion(cs, "TelesPCI:")) {
printk(KERN_WARNING
"TelesPCI: wrong HSCX versions check IO/MEM addresses\n");
"TelesPCI: wrong HSCX versions check IO/MEM addresses\n");
release_io_telespci(cs);
return (0);
}

Visa fil

@@ -4,7 +4,7 @@
*
* Author Petr Novak
* Copyright by Petr Novak <petr.novak@i.cz>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -69,33 +69,33 @@ static void
W6692_new_ph(struct IsdnCardState *cs)
{
switch (cs->dc.w6692.ph_state) {
case (W_L1CMD_RST):
ph_command(cs, W_L1CMD_DRC);
l1_msg(cs, HW_RESET | INDICATION, NULL);
/* fallthru */
case (W_L1IND_CD):
l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
break;
case (W_L1IND_DRD):
l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
break;
case (W_L1IND_CE):
l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
break;
case (W_L1IND_LD):
l1_msg(cs, HW_RSYNC | INDICATION, NULL);
break;
case (W_L1IND_ARD):
l1_msg(cs, HW_INFO2 | INDICATION, NULL);
break;
case (W_L1IND_AI8):
l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
break;
case (W_L1IND_AI10):
l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL);
break;
default:
break;
case (W_L1CMD_RST):
ph_command(cs, W_L1CMD_DRC);
l1_msg(cs, HW_RESET | INDICATION, NULL);
/* fallthru */
case (W_L1IND_CD):
l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
break;
case (W_L1IND_DRD):
l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
break;
case (W_L1IND_CE):
l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
break;
case (W_L1IND_LD):
l1_msg(cs, HW_RSYNC | INDICATION, NULL);
break;
case (W_L1IND_ARD):
l1_msg(cs, HW_INFO2 | INDICATION, NULL);
break;
case (W_L1IND_AI8):
l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
break;
case (W_L1IND_AI10):
l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL);
break;
default:
break;
}
}
@@ -122,11 +122,11 @@ W6692_bh(struct work_struct *work)
if (test_and_clear_bit(D_XMTBUFREADY, &cs->event))
DChannel_proc_xmt(cs);
/*
if (test_and_clear_bit(D_RX_MON1, &cs->event))
arcofi_fsm(cs, ARCOFI_RX_END, NULL);
if (test_and_clear_bit(D_TX_MON1, &cs->event))
arcofi_fsm(cs, ARCOFI_TX_END, NULL);
*/
if (test_and_clear_bit(D_RX_MON1, &cs->event))
arcofi_fsm(cs, ARCOFI_RX_END, NULL);
if (test_and_clear_bit(D_TX_MON1, &cs->event))
arcofi_fsm(cs, ARCOFI_TX_END, NULL);
*/
}
static void
@@ -250,7 +250,7 @@ W6692B_fill_fifo(struct BCState *bcs)
count = bcs->tx_skb->len;
if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
debugl1(cs, "W6692B_fill_fifo%s%d", (more ? " ": " last "), count);
debugl1(cs, "W6692B_fill_fifo%s%d", (more ? " " : " last "), count);
ptr = bcs->tx_skb->data;
skb_pull(bcs->tx_skb, count);
@@ -277,7 +277,7 @@ W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
struct sk_buff *skb;
int count;
bcs = (cs->bcs->channel == bchan) ? cs->bcs : (cs->bcs+1);
bcs = (cs->bcs->channel == bchan) ? cs->bcs : (cs->bcs + 1);
val = cs->BC_Read_Reg(cs, bchan, W_B_EXIR);
debugl1(cs, "W6692B chan %d B_EXIR 0x%02X", bchan, val);
@@ -322,7 +322,7 @@ W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
if (r & W_B_STAR_RDOV) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "W6692 B RDOV(RMR) mode=%d",bcs->mode);
debugl1(cs, "W6692 B RDOV(RMR) mode=%d", bcs->mode);
cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT);
if (bcs->mode != L1_MODE_TRANS)
bcs->hw.w6692.rcvidx = 0;
@@ -347,7 +347,7 @@ W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
W6692B_fill_fifo(bcs);
else {
/* Here we lost an TX interrupt, so
* restart transmitting the whole frame.
* restart transmitting the whole frame.
*/
if (bcs->tx_skb) {
skb_push(bcs->tx_skb, bcs->hw.w6692.count);
@@ -374,9 +374,9 @@ W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
W6692B_fill_fifo(bcs);
return;
} else {
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
u_long flags;
if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
u_long flags;
spin_lock_irqsave(&bcs->aclock, flags);
bcs->ackcnt += bcs->hw.w6692.count;
spin_unlock_irqrestore(&bcs->aclock, flags);
@@ -414,7 +414,7 @@ W6692_interrupt(int intno, void *dev_id)
spin_unlock_irqrestore(&cs->lock, flags);
return IRQ_NONE;
}
StartW6692:
StartW6692:
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "W6692 ISTA %x", val);
@@ -473,7 +473,7 @@ W6692_interrupt(int intno, void *dev_id)
} else
schedule_event(cs, D_XMTBUFREADY);
}
afterXFR:
afterXFR:
if (val & (W_INT_XINT0 | W_INT_XINT1)) { /* XINT0/1 - never */
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "W6692 spurious XINT!");
@@ -564,108 +564,108 @@ W6692_l1hw(struct PStack *st, int pr, void *arg)
int val;
switch (pr) {
case (PH_DATA | REQUEST):
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
skb_queue_tail(&cs->sq, skb);
case (PH_DATA | REQUEST):
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
skb_queue_tail(&cs->sq, skb);
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA Queued", 0);
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA Queued", 0);
#endif
} else {
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA", 0);
#endif
W6692_fill_fifo(cs);
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
spin_unlock_irqrestore(&cs->lock, flags);
break;
}
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
} else {
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
Logl2Frame(cs, skb, "PH_DATA", 0);
#endif
W6692_fill_fifo(cs);
}
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | INDICATION):
spin_lock_irqsave(&cs->lock, flags);
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | REQUEST):
}
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
debugl1(cs, "-> PH_REQUEST_PULL");
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
#endif
if (!cs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (HW_RESET | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
if ((cs->dc.w6692.ph_state == W_L1IND_DRD)) {
ph_command(cs, W_L1CMD_ECK);
spin_unlock_irqrestore(&cs->lock, flags);
} else {
ph_command(cs, W_L1CMD_RST);
cs->dc.w6692.ph_state = W_L1CMD_RST;
spin_unlock_irqrestore(&cs->lock, flags);
W6692_new_ph(cs);
}
break;
case (HW_ENABLE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
W6692_fill_fifo(cs);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (PH_PULL | REQUEST):
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
debugl1(cs, "-> PH_REQUEST_PULL");
#endif
if (!cs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (HW_RESET | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
if ((cs->dc.w6692.ph_state == W_L1IND_DRD)) {
ph_command(cs, W_L1CMD_ECK);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_INFO3 | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
ph_command(cs, W_L1CMD_AR8);
} else {
ph_command(cs, W_L1CMD_RST);
cs->dc.w6692.ph_state = W_L1CMD_RST;
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_TESTLOOP | REQUEST):
val = 0;
if (1 & (long) arg)
val |= 0x0c;
if (2 & (long) arg)
val |= 0x3;
/* !!! not implemented yet */
break;
case (HW_DEACTIVATE | RESPONSE):
skb_queue_purge(&cs->rq);
skb_queue_purge(&cs->sq);
if (cs->tx_skb) {
dev_kfree_skb_any(cs->tx_skb);
cs->tx_skb = NULL;
}
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
schedule_event(cs, D_CLEARBUSY);
break;
default:
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "W6692_l1hw unknown %04x", pr);
break;
W6692_new_ph(cs);
}
break;
case (HW_ENABLE | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
ph_command(cs, W_L1CMD_ECK);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_INFO3 | REQUEST):
spin_lock_irqsave(&cs->lock, flags);
ph_command(cs, W_L1CMD_AR8);
spin_unlock_irqrestore(&cs->lock, flags);
break;
case (HW_TESTLOOP | REQUEST):
val = 0;
if (1 & (long) arg)
val |= 0x0c;
if (2 & (long) arg)
val |= 0x3;
/* !!! not implemented yet */
break;
case (HW_DEACTIVATE | RESPONSE):
skb_queue_purge(&cs->rq);
skb_queue_purge(&cs->sq);
if (cs->tx_skb) {
dev_kfree_skb_any(cs->tx_skb);
cs->tx_skb = NULL;
}
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
schedule_event(cs, D_CLEARBUSY);
break;
default:
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "W6692_l1hw unknown %04x", pr);
break;
}
}
@@ -734,17 +734,17 @@ W6692Bmode(struct BCState *bcs, int mode, int bchan)
bcs->hw.w6692.bchan = bchan;
switch (mode) {
case (L1_MODE_NULL):
cs->BC_Write_Reg(cs, bchan, W_B_MODE, 0);
break;
case (L1_MODE_TRANS):
cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_MMS);
break;
case (L1_MODE_HDLC):
cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_ITF);
cs->BC_Write_Reg(cs, bchan, W_B_ADM1, 0xff);
cs->BC_Write_Reg(cs, bchan, W_B_ADM2, 0xff);
break;
case (L1_MODE_NULL):
cs->BC_Write_Reg(cs, bchan, W_B_MODE, 0);
break;
case (L1_MODE_TRANS):
cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_MMS);
break;
case (L1_MODE_HDLC):
cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_ITF);
cs->BC_Write_Reg(cs, bchan, W_B_ADM1, 0xff);
cs->BC_Write_Reg(cs, bchan, W_B_ADM2, 0xff);
break;
}
if (mode)
cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RRST |
@@ -756,59 +756,59 @@ static void
W6692_l2l1(struct PStack *st, int pr, void *arg)
{
struct sk_buff *skb = arg;
struct BCState *bcs = st->l1.bcs;
struct BCState *bcs = st->l1.bcs;
u_long flags;
switch (pr) {
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->hw.w6692.count = 0;
bcs->cs->BC_Send_Data(bcs);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
if (bcs->tx_skb) {
printk(KERN_WARNING "W6692_l2l1: this shouldn't happen\n");
break;
}
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
case (PH_DATA | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
if (bcs->tx_skb) {
skb_queue_tail(&bcs->squeue, skb);
} else {
bcs->tx_skb = skb;
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->hw.w6692.count = 0;
bcs->cs->BC_Send_Data(bcs);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
W6692Bmode(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
W6692Bmode(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
}
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | INDICATION):
if (bcs->tx_skb) {
printk(KERN_WARNING "W6692_l2l1: this shouldn't happen\n");
break;
}
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->hw.w6692.count = 0;
bcs->cs->BC_Send_Data(bcs);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
break;
case (PH_PULL | REQUEST):
if (!bcs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
break;
case (PH_ACTIVATE | REQUEST):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
W6692Bmode(bcs, st->l1.mode, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | REQUEST):
l1_msg_b(st, pr, arg);
break;
case (PH_DEACTIVATE | CONFIRM):
spin_lock_irqsave(&bcs->cs->lock, flags);
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
W6692Bmode(bcs, 0, st->l1.bc);
spin_unlock_irqrestore(&bcs->cs->lock, flags);
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
break;
}
}
@@ -943,13 +943,13 @@ WriteW6692(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
insb(cs->hw.w6692.iobase + W_D_RFIFO, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
outsb(cs->hw.w6692.iobase + W_D_XFIFO, data, size);
}
@@ -970,26 +970,26 @@ static int
w6692_card_msg(struct IsdnCardState *cs, int mt, void *arg)
{
switch (mt) {
case CARD_RESET:
resetW6692(cs);
return (0);
case CARD_RELEASE:
cs->writeW6692(cs, W_IMASK, 0xff);
release_region(cs->hw.w6692.iobase, 256);
if (cs->subtyp == W6692_USR) {
cs->writeW6692(cs, W_XDATA, 0x04);
}
return (0);
case CARD_INIT:
initW6692(cs, 3);
return (0);
case CARD_TEST:
return (0);
case CARD_RESET:
resetW6692(cs);
return (0);
case CARD_RELEASE:
cs->writeW6692(cs, W_IMASK, 0xff);
release_region(cs->hw.w6692.iobase, 256);
if (cs->subtyp == W6692_USR) {
cs->writeW6692(cs, W_XDATA, 0x04);
}
return (0);
case CARD_INIT:
initW6692(cs, 3);
return (0);
case CARD_TEST:
return (0);
}
return (0);
}
static int id_idx ;
static int id_idx;
static struct pci_dev *dev_w6692 __devinitdata = NULL;
@@ -1009,8 +1009,8 @@ setup_w6692(struct IsdnCard *card)
while (id_list[id_idx].vendor_id) {
dev_w6692 = hisax_find_pci_device(id_list[id_idx].vendor_id,
id_list[id_idx].device_id,
dev_w6692);
id_list[id_idx].device_id,
dev_w6692);
if (dev_w6692) {
if (pci_enable_device(dev_w6692))
continue;

Visa fil

@@ -4,7 +4,7 @@
*
* Author Petr Novak
* Copyright by Petr Novak <petr.novak@i.cz>
*
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
@@ -18,11 +18,11 @@
/* B-channel FIFO read/write routines */
#define READW6692BFIFO(cs,bchan,ptr,count) \
insb(cs->hw.w6692.iobase+W_B_RFIFO+(bchan?0x40:0),ptr,count)
#define READW6692BFIFO(cs, bchan, ptr, count) \
insb(cs->hw.w6692.iobase + W_B_RFIFO + (bchan ? 0x40 : 0), ptr, count)
#define WRITEW6692BFIFO(cs,bchan,ptr,count) \
outsb(cs->hw.w6692.iobase+W_B_XFIFO+(bchan?0x40:0),ptr,count)
#define WRITEW6692BFIFO(cs, bchan, ptr, count) \
outsb(cs->hw.w6692.iobase + W_B_XFIFO + (bchan ? 0x40 : 0), ptr, count)
/* Specifications of W6692 registers */