Merge tag 'v3.3-rc7' into sched/core
Merge reason: merge back final fixes, prepare for the merge window. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Цей коміт міститься в:
@@ -147,7 +147,9 @@ struct cpu_hw_events {
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/*
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* AMD specific bits
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*/
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struct amd_nb *amd_nb;
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struct amd_nb *amd_nb;
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/* Inverted mask of bits to clear in the perf_ctr ctrl registers */
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u64 perf_ctr_virt_mask;
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void *kfree_on_online;
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};
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@@ -417,9 +419,11 @@ void x86_pmu_disable_all(void);
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static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,
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u64 enable_mask)
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{
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u64 disable_mask = __this_cpu_read(cpu_hw_events.perf_ctr_virt_mask);
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if (hwc->extra_reg.reg)
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wrmsrl(hwc->extra_reg.reg, hwc->extra_reg.config);
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wrmsrl(hwc->config_base, hwc->config | enable_mask);
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wrmsrl(hwc->config_base, (hwc->config | enable_mask) & ~disable_mask);
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}
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void x86_pmu_enable_all(int added);
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@@ -1,4 +1,5 @@
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#include <linux/perf_event.h>
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#include <linux/export.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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@@ -357,7 +358,9 @@ static void amd_pmu_cpu_starting(int cpu)
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struct amd_nb *nb;
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int i, nb_id;
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if (boot_cpu_data.x86_max_cores < 2)
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cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY;
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if (boot_cpu_data.x86_max_cores < 2 || boot_cpu_data.x86 == 0x15)
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return;
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nb_id = amd_get_nb_id(cpu);
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@@ -587,9 +590,9 @@ static __initconst const struct x86_pmu amd_pmu_f15h = {
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.put_event_constraints = amd_put_event_constraints,
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.cpu_prepare = amd_pmu_cpu_prepare,
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.cpu_starting = amd_pmu_cpu_starting,
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.cpu_dead = amd_pmu_cpu_dead,
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#endif
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.cpu_starting = amd_pmu_cpu_starting,
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};
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__init int amd_pmu_init(void)
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@@ -621,3 +624,33 @@ __init int amd_pmu_init(void)
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return 0;
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}
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void amd_pmu_enable_virt(void)
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{
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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cpuc->perf_ctr_virt_mask = 0;
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/* Reload all events */
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x86_pmu_disable_all();
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x86_pmu_enable_all(0);
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}
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EXPORT_SYMBOL_GPL(amd_pmu_enable_virt);
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void amd_pmu_disable_virt(void)
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{
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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/*
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* We only mask out the Host-only bit so that host-only counting works
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* when SVM is disabled. If someone sets up a guest-only counter when
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* SVM is disabled the Guest-only bits still gets set and the counter
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* will not count anything.
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*/
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cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY;
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/* Reload all events */
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x86_pmu_disable_all();
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x86_pmu_enable_all(0);
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}
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EXPORT_SYMBOL_GPL(amd_pmu_disable_virt);
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