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powerpc/64s: Remove POWER4 support

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POWER4 has been broken since at least the change 49d09bf2a6
("powerpc/64s: Optimise MSR handling in exception handling"), which
requires mtmsrd L=1 support. This was introduced in ISA v2.01, and
POWER4 supports ISA v2.00.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Nicholas Piggin
2018-02-21 05:08:29 +10:00
committed by Michael Ellerman
parent 3735eb850e
commit 471d7ff8b5
10 changed files with 18 additions and 692 deletions
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9
arch/powerpc/mm/hash_utils_64.c
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@@ -132,9 +132,10 @@ EXPORT_SYMBOL(mmu_hash_ops);
* is provided by the firmware.
*/
/* Pre-POWER4 CPUs (4k pages only)
/*
* Fallback (4k pages only)
*/
static struct mmu_psize_def mmu_psize_defaults_old[] = {
static struct mmu_psize_def mmu_psize_defaults[] = {
[MMU_PAGE_4K] = {
.shift = 12,
.sllp = 0,
@@ -554,8 +555,8 @@ static void __init htab_scan_page_sizes(void)
mmu_psize_set_default_penc();
/* Default to 4K pages only */
memcpy(mmu_psize_defs, mmu_psize_defaults_old,
sizeof(mmu_psize_defaults_old));
memcpy(mmu_psize_defs, mmu_psize_defaults,
sizeof(mmu_psize_defaults));
/*
* Try to find the available page sizes in the device-tree