Merge branches 'for-next/misc', 'for-next/vmcoreinfo', 'for-next/cpufeature', 'for-next/acpi', 'for-next/perf', 'for-next/timens', 'for-next/msi-iommu' and 'for-next/trivial' into for-next/core
* for-next/misc: : Miscellaneous fixes and cleanups arm64: use IRQ_STACK_SIZE instead of THREAD_SIZE for irq stack arm64/mm: save memory access in check_and_switch_context() fast switch path recordmcount: only record relocation of type R_AARCH64_CALL26 on arm64. arm64: Reserve HWCAP2_MTE as (1 << 18) arm64/entry: deduplicate SW PAN entry/exit routines arm64: s/AMEVTYPE/AMEVTYPER arm64/hugetlb: Reserve CMA areas for gigantic pages on 16K and 64K configs arm64: stacktrace: Move export for save_stack_trace_tsk() smccc: Make constants available to assembly arm64/mm: Redefine CONT_{PTE, PMD}_SHIFT arm64/defconfig: Enable CONFIG_KEXEC_FILE arm64: Document sysctls for emulated deprecated instructions arm64/panic: Unify all three existing notifier blocks arm64/module: Optimize module load time by optimizing PLT counting * for-next/vmcoreinfo: : Export the virtual and physical address sizes in vmcoreinfo arm64/crash_core: Export TCR_EL1.T1SZ in vmcoreinfo crash_core, vmcoreinfo: Append 'MAX_PHYSMEM_BITS' to vmcoreinfo * for-next/cpufeature: : CPU feature handling cleanups arm64/cpufeature: Validate feature bits spacing in arm64_ftr_regs[] arm64/cpufeature: Replace all open bits shift encodings with macros arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR2 register arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR1 register arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR0 register * for-next/acpi: : ACPI updates for arm64 arm64/acpi: disallow writeable AML opregion mapping for EFI code regions arm64/acpi: disallow AML memory opregions to access kernel memory * for-next/perf: : perf updates for arm64 arm64: perf: Expose some new events via sysfs tools headers UAPI: Update tools's copy of linux/perf_event.h arm64: perf: Add cap_user_time_short perf: Add perf_event_mmap_page::cap_user_time_short ABI arm64: perf: Only advertise cap_user_time for arch_timer arm64: perf: Implement correct cap_user_time time/sched_clock: Use raw_read_seqcount_latch() sched_clock: Expose struct clock_read_data arm64: perf: Correct the event index in sysfs perf/smmuv3: To simplify code for ioremap page in pmcg * for-next/timens: : Time namespace support for arm64 arm64: enable time namespace support arm64/vdso: Restrict splitting VVAR VMA arm64/vdso: Handle faults on timens page arm64/vdso: Add time namespace page arm64/vdso: Zap vvar pages when switching to a time namespace arm64/vdso: use the fault callback to map vvar pages * for-next/msi-iommu: : Make the MSI/IOMMU input/output ID translation PCI agnostic, augment the : MSI/IOMMU ACPI/OF ID mapping APIs to accept an input ID bus-specific parameter : and apply the resulting changes to the device ID space provided by the : Freescale FSL bus bus: fsl-mc: Add ACPI support for fsl-mc bus/fsl-mc: Refactor the MSI domain creation in the DPRC driver of/irq: Make of_msi_map_rid() PCI bus agnostic of/irq: make of_msi_map_get_device_domain() bus agnostic dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus of/device: Add input id to of_dma_configure() of/iommu: Make of_map_rid() PCI agnostic ACPI/IORT: Add an input ID to acpi_dma_configure() ACPI/IORT: Remove useless PCI bus walk ACPI/IORT: Make iort_msi_map_rid() PCI agnostic ACPI/IORT: Make iort_get_device_domain IRQ domain agnostic ACPI/IORT: Make iort_match_node_callback walk the ACPI namespace for NC * for-next/trivial: : Trivial fixes arm64: sigcontext.h: delete duplicated word arm64: ptrace.h: delete duplicated word arm64: pgtable-hwdef.h: delete duplicated words
这个提交包含在:

@@ -413,6 +413,7 @@ static int __init crash_save_vmcoreinfo_init(void)
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VMCOREINFO_LENGTH(mem_section, NR_SECTION_ROOTS);
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VMCOREINFO_STRUCT_SIZE(mem_section);
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VMCOREINFO_OFFSET(mem_section, section_mem_map);
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VMCOREINFO_NUMBER(MAX_PHYSMEM_BITS);
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#endif
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VMCOREINFO_STRUCT_SIZE(page);
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VMCOREINFO_STRUCT_SIZE(pglist_data);
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@@ -19,31 +19,6 @@
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#include "timekeeping.h"
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/**
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* struct clock_read_data - data required to read from sched_clock()
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*
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* @epoch_ns: sched_clock() value at last update
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* @epoch_cyc: Clock cycle value at last update.
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* @sched_clock_mask: Bitmask for two's complement subtraction of non 64bit
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* clocks.
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* @read_sched_clock: Current clock source (or dummy source when suspended).
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* @mult: Multipler for scaled math conversion.
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* @shift: Shift value for scaled math conversion.
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*
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* Care must be taken when updating this structure; it is read by
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* some very hot code paths. It occupies <=40 bytes and, when combined
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* with the seqcount used to synchronize access, comfortably fits into
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* a 64 byte cache line.
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*/
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struct clock_read_data {
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u64 epoch_ns;
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u64 epoch_cyc;
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u64 sched_clock_mask;
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u64 (*read_sched_clock)(void);
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u32 mult;
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u32 shift;
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};
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/**
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* struct clock_data - all data needed for sched_clock() (including
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* registration of a new clock source)
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@@ -93,6 +68,17 @@ static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift)
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return (cyc * mult) >> shift;
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}
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struct clock_read_data *sched_clock_read_begin(unsigned int *seq)
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{
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*seq = raw_read_seqcount_latch(&cd.seq);
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return cd.read_data + (*seq & 1);
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}
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int sched_clock_read_retry(unsigned int seq)
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{
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return read_seqcount_retry(&cd.seq, seq);
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}
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unsigned long long notrace sched_clock(void)
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{
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u64 cyc, res;
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@@ -100,13 +86,12 @@ unsigned long long notrace sched_clock(void)
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struct clock_read_data *rd;
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do {
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seq = raw_read_seqcount(&cd.seq);
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rd = cd.read_data + (seq & 1);
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rd = sched_clock_read_begin(&seq);
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cyc = (rd->read_sched_clock() - rd->epoch_cyc) &
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rd->sched_clock_mask;
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res = rd->epoch_ns + cyc_to_ns(cyc, rd->mult, rd->shift);
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} while (read_seqcount_retry(&cd.seq, seq));
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} while (sched_clock_read_retry(seq));
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return res;
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}
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