powerpc/64s/exception: remove H concatenation for EXC_HV variants
Replace all instances of this with gas macros that test the hsrr parameter and use the appropriate register names / labels. No generated code change. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [mpe: Remove extraneous 2nd check for 0xea0 in SOFTEN_TEST] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Nicholas Piggin
committed by
Michael Ellerman
Michael Ellerman
parent
1efd8caa9a
commit
4508a74a63
@@ -67,6 +67,8 @@
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*/
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#define EX_R3 EX_DAR
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#ifdef __ASSEMBLY__
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#define STF_ENTRY_BARRIER_SLOT \
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STF_ENTRY_BARRIER_FIXUP_SECTION; \
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nop; \
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@@ -148,38 +150,6 @@
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hrfid; \
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b hrfi_flush_fallback
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#ifdef CONFIG_RELOCATABLE
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#define __EXCEPTION_PROLOG_2_RELON(label, h) \
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mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
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LOAD_HANDLER(r12,label); \
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mtctr r12; \
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mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
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li r10,MSR_RI; \
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mtmsrd r10,1; /* Set RI (EE=0) */ \
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bctr;
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#else
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/* If not relocatable, we can jump directly -- and save messing with LR */
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#define __EXCEPTION_PROLOG_2_RELON(label, h) \
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mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
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mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
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li r10,MSR_RI; \
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mtmsrd r10,1; /* Set RI (EE=0) */ \
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b label;
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#endif
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#define EXCEPTION_PROLOG_2_RELON(label, h) \
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__EXCEPTION_PROLOG_2_RELON(label, h)
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/*
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* As EXCEPTION_PROLOG(), except we've already got relocation on so no need to
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* rfid. Save LR in case we're CONFIG_RELOCATABLE, in which case
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* EXCEPTION_PROLOG_2_RELON will be using LR.
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*/
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#define EXCEPTION_RELON_PROLOG(area, label, h, extra, vec) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0(area); \
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EXCEPTION_PROLOG_1(area, extra, vec); \
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EXCEPTION_PROLOG_2_RELON(label, h)
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/*
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* We're short on space and time in the exception prolog, so we can't
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* use the normal LOAD_REG_IMMEDIATE macro to load the address of label.
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@@ -204,9 +174,54 @@
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ori reg,reg,(ABS_ADDR(label))@l; \
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addis reg,reg,(ABS_ADDR(label))@h
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#ifdef CONFIG_RELOCATABLE
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.macro EXCEPTION_PROLOG_2_RELON label, hsrr
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.if \hsrr
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mfspr r11,SPRN_HSRR0 /* save HSRR0 */
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.else
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mfspr r11,SPRN_SRR0 /* save SRR0 */
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.endif
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LOAD_HANDLER(r12, \label\())
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mtctr r12
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.if \hsrr
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mfspr r12,SPRN_HSRR1 /* and HSRR1 */
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.else
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mfspr r12,SPRN_SRR1 /* and HSRR1 */
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.endif
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li r10,MSR_RI
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mtmsrd r10,1 /* Set RI (EE=0) */
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bctr
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.endm
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#else
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/* If not relocatable, we can jump directly -- and save messing with LR */
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.macro EXCEPTION_PROLOG_2_RELON label, hsrr
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.if \hsrr
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mfspr r11,SPRN_HSRR0 /* save HSRR0 */
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mfspr r12,SPRN_HSRR1 /* and HSRR1 */
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.else
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mfspr r11,SPRN_SRR0 /* save SRR0 */
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mfspr r12,SPRN_SRR1 /* and SRR1 */
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.endif
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li r10,MSR_RI
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mtmsrd r10,1 /* Set RI (EE=0) */
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b \label
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.endm
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#endif
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/*
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* As EXCEPTION_PROLOG(), except we've already got relocation on so no need to
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* rfid. Save LR in case we're CONFIG_RELOCATABLE, in which case
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* EXCEPTION_PROLOG_2_RELON will be using LR.
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*/
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#define EXCEPTION_RELON_PROLOG(area, label, hsrr, extra, vec) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0(area); \
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EXCEPTION_PROLOG_1(area, extra, vec); \
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EXCEPTION_PROLOG_2_RELON label, hsrr
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/* Exception register prefixes */
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#define EXC_HV H
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#define EXC_STD
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#define EXC_HV 1
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#define EXC_STD 0
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#if defined(CONFIG_RELOCATABLE)
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/*
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@@ -308,43 +323,57 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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#define EXCEPTION_PROLOG_1(area, extra, vec) \
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_EXCEPTION_PROLOG_1(area, extra, vec)
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#define __EXCEPTION_PROLOG_2(label, h) \
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ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
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mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
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LOAD_HANDLER(r12,label); \
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mtspr SPRN_##h##SRR0,r12; \
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mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
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mtspr SPRN_##h##SRR1,r10; \
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h##RFI_TO_KERNEL; \
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.macro EXCEPTION_PROLOG_2 label, hsrr
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ld r10,PACAKMSR(r13) /* get MSR value for kernel */
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.if \hsrr
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mfspr r11,SPRN_HSRR0 /* save HSRR0 */
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.else
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mfspr r11,SPRN_SRR0 /* save SRR0 */
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.endif
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LOAD_HANDLER(r12,\label\())
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.if \hsrr
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mtspr SPRN_HSRR0,r12
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mfspr r12,SPRN_HSRR1 /* and HSRR1 */
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mtspr SPRN_HSRR1,r10
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HRFI_TO_KERNEL
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.else
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mtspr SPRN_SRR0,r12
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mfspr r12,SPRN_SRR1 /* and SRR1 */
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mtspr SPRN_SRR1,r10
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RFI_TO_KERNEL
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.endif
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b . /* prevent speculative execution */
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#define EXCEPTION_PROLOG_2(label, h) \
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__EXCEPTION_PROLOG_2(label, h)
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.endm
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/* _NORI variant keeps MSR_RI clear */
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#define __EXCEPTION_PROLOG_2_NORI(label, h) \
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ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
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xori r10,r10,MSR_RI; /* Clear MSR_RI */ \
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mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
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LOAD_HANDLER(r12,label); \
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mtspr SPRN_##h##SRR0,r12; \
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mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
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mtspr SPRN_##h##SRR1,r10; \
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h##RFI_TO_KERNEL; \
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.macro EXCEPTION_PROLOG_2_NORI label, hsrr
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ld r10,PACAKMSR(r13) /* get MSR value for kernel */
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xori r10,r10,MSR_RI /* Clear MSR_RI */
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.if \hsrr
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mfspr r11,SPRN_HSRR0 /* save HSRR0 */
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.else
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mfspr r11,SPRN_SRR0 /* save SRR0 */
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.endif
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LOAD_HANDLER(r12,\label\())
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.if \hsrr
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mtspr SPRN_HSRR0,r12
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mfspr r12,SPRN_HSRR1 /* and HSRR1 */
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mtspr SPRN_HSRR1,r10
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HRFI_TO_KERNEL
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.else
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mtspr SPRN_SRR0,r12
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mfspr r12,SPRN_SRR1 /* and SRR1 */
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mtspr SPRN_SRR1,r10
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RFI_TO_KERNEL
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.endif
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b . /* prevent speculative execution */
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#define EXCEPTION_PROLOG_2_NORI(label, h) \
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__EXCEPTION_PROLOG_2_NORI(label, h)
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.endm
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#define EXCEPTION_PROLOG(area, label, h, extra, vec) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0(area); \
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EXCEPTION_PROLOG_1(area, extra, vec); \
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EXCEPTION_PROLOG_2(label, h)
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#define __KVMTEST(h, n) \
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lbz r10,HSTATE_IN_GUEST(r13); \
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cmpwi r10,0; \
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bne do_kvm_##h##n
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EXCEPTION_PROLOG_2 label, h
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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/*
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@@ -413,52 +442,66 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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#define EXCEPTION_PROLOG_NORI(area, label, h, extra, vec) \
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EXCEPTION_PROLOG_0(area); \
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EXCEPTION_PROLOG_1(area, extra, vec); \
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EXCEPTION_PROLOG_2_NORI(label, h)
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#define __KVM_HANDLER(area, h, n) \
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BEGIN_FTR_SECTION_NESTED(947) \
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ld r10,area+EX_CFAR(r13); \
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std r10,HSTATE_CFAR(r13); \
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END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \
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BEGIN_FTR_SECTION_NESTED(948) \
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ld r10,area+EX_PPR(r13); \
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std r10,HSTATE_PPR(r13); \
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END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
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ld r10,area+EX_R10(r13); \
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std r12,HSTATE_SCRATCH0(r13); \
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sldi r12,r9,32; \
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ori r12,r12,(n); \
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/* This reloads r9 before branching to kvmppc_interrupt */ \
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__BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt)
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#define __KVM_HANDLER_SKIP(area, h, n) \
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cmpwi r10,KVM_GUEST_MODE_SKIP; \
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beq 89f; \
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BEGIN_FTR_SECTION_NESTED(948) \
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ld r10,area+EX_PPR(r13); \
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std r10,HSTATE_PPR(r13); \
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END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
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ld r10,area+EX_R10(r13); \
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std r12,HSTATE_SCRATCH0(r13); \
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sldi r12,r9,32; \
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ori r12,r12,(n); \
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/* This reloads r9 before branching to kvmppc_interrupt */ \
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__BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \
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89: mtocrf 0x80,r9; \
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ld r9,area+EX_R9(r13); \
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ld r10,area+EX_R10(r13); \
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b kvmppc_skip_##h##interrupt
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EXCEPTION_PROLOG_2_NORI label, h
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#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
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#define KVMTEST(h, n) __KVMTEST(h, n)
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#define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
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#define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
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.macro KVMTEST hsrr, n
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lbz r10,HSTATE_IN_GUEST(r13)
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cmpwi r10,0
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.if \hsrr
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bne do_kvm_H\n
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.else
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bne do_kvm_\n
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.endif
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.endm
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.macro KVM_HANDLER area, hsrr, n
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BEGIN_FTR_SECTION_NESTED(947)
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ld r10,\area+EX_CFAR(r13)
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std r10,HSTATE_CFAR(r13)
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END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947)
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BEGIN_FTR_SECTION_NESTED(948)
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ld r10,\area+EX_PPR(r13)
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std r10,HSTATE_PPR(r13)
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END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
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ld r10,\area+EX_R10(r13)
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std r12,HSTATE_SCRATCH0(r13)
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sldi r12,r9,32
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ori r12,r12,(\n)
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/* This reloads r9 before branching to kvmppc_interrupt */
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__BRANCH_TO_KVM_EXIT(\area, kvmppc_interrupt)
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.endm
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.macro KVM_HANDLER_SKIP area, hsrr, n
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cmpwi r10,KVM_GUEST_MODE_SKIP
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beq 89f
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BEGIN_FTR_SECTION_NESTED(948)
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ld r10,\area+EX_PPR(r13)
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std r10,HSTATE_PPR(r13)
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END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
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ld r10,\area+EX_R10(r13)
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std r12,HSTATE_SCRATCH0(r13)
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sldi r12,r9,32
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ori r12,r12,(\n)
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/* This reloads r9 before branching to kvmppc_interrupt */
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__BRANCH_TO_KVM_EXIT(\area, kvmppc_interrupt)
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89: mtocrf 0x80,r9
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ld r9,\area+EX_R9(r13)
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ld r10,\area+EX_R10(r13)
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.if \hsrr
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b kvmppc_skip_Hinterrupt
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.else
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b kvmppc_skip_interrupt
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.endif
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.endm
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#else
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#define KVMTEST(h, n)
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#define KVM_HANDLER(area, h, n)
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#define KVM_HANDLER_SKIP(area, h, n)
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.macro KVMTEST hsrr, n
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.endm
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.macro KVM_HANDLER area, hsrr, n
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.endm
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.macro KVM_HANDLER_SKIP area, hsrr, n
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.endm
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#endif
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#define NOTEST(n)
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@@ -556,14 +599,14 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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#define STD_EXCEPTION_OOL(vec, label) \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
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EXCEPTION_PROLOG_2(label, EXC_STD)
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EXCEPTION_PROLOG_2 label, EXC_STD
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#define STD_EXCEPTION_HV(loc, vec, label) \
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EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec)
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#define STD_EXCEPTION_HV_OOL(vec, label) \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
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EXCEPTION_PROLOG_2(label, EXC_HV)
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EXCEPTION_PROLOG_2 label, EXC_HV
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#define STD_RELON_EXCEPTION(loc, vec, label) \
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/* No guest interrupts come through here */ \
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@@ -571,88 +614,97 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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#define STD_RELON_EXCEPTION_OOL(vec, label) \
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EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
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EXCEPTION_PROLOG_2_RELON(label, EXC_STD)
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EXCEPTION_PROLOG_2_RELON label, EXC_STD
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#define STD_RELON_EXCEPTION_HV(loc, vec, label) \
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EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec)
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#define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
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EXCEPTION_PROLOG_2_RELON(label, EXC_HV)
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EXCEPTION_PROLOG_2_RELON label, EXC_HV
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/* This associate vector numbers with bits in paca->irq_happened */
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#define SOFTEN_VALUE_0x500 PACA_IRQ_EE
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#define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
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#define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL
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#define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
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#define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI
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#define SOFTEN_VALUE_0xea0 PACA_IRQ_EE
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#define SOFTEN_VALUE_0xf00 PACA_IRQ_PMI
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.macro SOFTEN_TEST hsrr, vec, bitmask
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lbz r10, PACAIRQSOFTMASK(r13)
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andi. r10, r10, \bitmask
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/* This associates vector numbers with bits in paca->irq_happened */
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.if \vec == 0x500 || \vec == 0xea0
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li r10, PACA_IRQ_EE
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.elseif \vec == 0x900
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li r10, PACA_IRQ_DEC
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.elseif \vec == 0xa00 || \vec == 0xe80
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li r10, PACA_IRQ_DBELL
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.elseif \vec == 0xe60
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li r10, PACA_IRQ_HMI
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.elseif \vec == 0xf00
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li r10, PACA_IRQ_PMI
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.else
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.abort "Bad maskable vector"
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.endif
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#define __SOFTEN_TEST(h, vec, bitmask) \
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lbz r10,PACAIRQSOFTMASK(r13); \
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andi. r10,r10,bitmask; \
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li r10,SOFTEN_VALUE_##vec; \
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bne masked_##h##interrupt
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#define _SOFTEN_TEST(h, vec, bitmask) __SOFTEN_TEST(h, vec, bitmask)
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.if \hsrr
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bne masked_Hinterrupt
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.else
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bne masked_interrupt
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.endif
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.endm
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#define SOFTEN_TEST_PR(vec, bitmask) \
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KVMTEST(EXC_STD, vec); \
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_SOFTEN_TEST(EXC_STD, vec, bitmask)
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KVMTEST EXC_STD, vec ; \
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SOFTEN_TEST EXC_STD, vec, bitmask
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#define SOFTEN_TEST_HV(vec, bitmask) \
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KVMTEST(EXC_HV, vec); \
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_SOFTEN_TEST(EXC_HV, vec, bitmask)
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KVMTEST EXC_HV, vec ; \
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SOFTEN_TEST EXC_HV, vec, bitmask
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#define KVMTEST_PR(vec) \
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KVMTEST(EXC_STD, vec)
|
||||
KVMTEST EXC_STD, vec
|
||||
|
||||
#define KVMTEST_HV(vec) \
|
||||
KVMTEST(EXC_HV, vec)
|
||||
KVMTEST EXC_HV, vec
|
||||
|
||||
#define SOFTEN_NOTEST_PR(vec, bitmask) _SOFTEN_TEST(EXC_STD, vec, bitmask)
|
||||
#define SOFTEN_NOTEST_HV(vec, bitmask) _SOFTEN_TEST(EXC_HV, vec, bitmask)
|
||||
#define SOFTEN_NOTEST_PR(vec, bitmask) SOFTEN_TEST EXC_STD, vec, bitmask
|
||||
#define SOFTEN_NOTEST_HV(vec, bitmask) SOFTEN_TEST EXC_HV, vec, bitmask
|
||||
|
||||
#define __MASKABLE_EXCEPTION(vec, label, h, extra, bitmask) \
|
||||
SET_SCRATCH0(r13); /* save r13 */ \
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN); \
|
||||
MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \
|
||||
EXCEPTION_PROLOG_2(label, h)
|
||||
EXCEPTION_PROLOG_2 label, h
|
||||
|
||||
#define MASKABLE_EXCEPTION(vec, label, bitmask) \
|
||||
__MASKABLE_EXCEPTION(vec, label, EXC_STD, SOFTEN_TEST_PR, bitmask)
|
||||
|
||||
#define MASKABLE_EXCEPTION_OOL(vec, label, bitmask) \
|
||||
MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec, bitmask);\
|
||||
EXCEPTION_PROLOG_2(label, EXC_STD)
|
||||
EXCEPTION_PROLOG_2 label, EXC_STD
|
||||
|
||||
#define MASKABLE_EXCEPTION_HV(vec, label, bitmask) \
|
||||
__MASKABLE_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)
|
||||
|
||||
#define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask) \
|
||||
MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
|
||||
EXCEPTION_PROLOG_2(label, EXC_HV)
|
||||
EXCEPTION_PROLOG_2 label, EXC_HV
|
||||
|
||||
#define __MASKABLE_RELON_EXCEPTION(vec, label, h, extra, bitmask) \
|
||||
SET_SCRATCH0(r13); /* save r13 */ \
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN); \
|
||||
MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \
|
||||
EXCEPTION_PROLOG_2_RELON(label, h)
|
||||
EXCEPTION_PROLOG_2_RELON label, h
|
||||
|
||||
#define MASKABLE_RELON_EXCEPTION(vec, label, bitmask) \
|
||||
__MASKABLE_RELON_EXCEPTION(vec, label, EXC_STD, SOFTEN_NOTEST_PR, bitmask)
|
||||
|
||||
#define MASKABLE_RELON_EXCEPTION_OOL(vec, label, bitmask) \
|
||||
MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec, bitmask);\
|
||||
EXCEPTION_PROLOG_2(label, EXC_STD)
|
||||
EXCEPTION_PROLOG_2 label, EXC_STD
|
||||
|
||||
#define MASKABLE_RELON_EXCEPTION_HV(vec, label, bitmask) \
|
||||
__MASKABLE_RELON_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)
|
||||
|
||||
#define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask) \
|
||||
MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
|
||||
EXCEPTION_PROLOG_2_RELON(label, EXC_HV)
|
||||
EXCEPTION_PROLOG_2_RELON label, EXC_HV
|
||||
|
||||
/*
|
||||
* Our exception common code can be passed various "additions"
|
||||
@@ -731,4 +783,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
|
||||
#define FINISH_NAP
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_POWERPC_EXCEPTION_H */
|
||||
|
||||
Reference in New Issue
Block a user