ARM: dts: omap3: Fix NAND device nodes
Add compatible id, GPMC register resource and interrupt resource to NAND controller nodes. The GPMC node will provide an interrupt controller for the NAND IRQs. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@@ -384,8 +384,11 @@
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/* Chip select 0 */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* NAND I/O window, 4 bytes */
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interrupts = <20>;
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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ti,nand-ecc-opt = "ham1";
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nand-bus-width = <16>;
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#address-cells = <1>;
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