Merge branch 'pci/host-rockchip' into next
* pci/host-rockchip: PCI: rockchip: Move the deassert of pm/aclk/pclk after phy_init() PCI: rockchip: Split out rockchip_cfg_atu() PCI: rockchip: Clean up bit definitions for PCIE_RC_CONFIG_LCS PCI: rockchip: Correct the use of FTS mask PCI: rockchip: Remove the pointer to L1 substate cap PCI: rockchip: Specify the link capability PCI: rockchip: Fix negotiated lanes calculation PCI: rockchip: Add Kconfig COMPILE_TEST PCI: rockchip: Mark RC as common clock architecture PCI: rockchip: Provide captured slot power limit and scale PCI: rockchip: Add three new resets as required properties PCI: Don't attempt to claim shadow copies of ROM PCI: designware: Check for iATU unroll support after initializing host PCI: qcom: Fix pp->dev usage before assignment PCI: designware-plat: Update author email address PCI: layerscape: Fix drvdata usage before assignment PCI: designware-plat: Change maintainer to Jose Abreu
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@@ -141,6 +141,14 @@ int pci_claim_resource(struct pci_dev *dev, int resource)
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return -EINVAL;
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}
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/*
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* If we have a shadow copy in RAM, the PCI device doesn't respond
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* to the shadow range, so we don't need to claim it, and upstream
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* bridges don't need to route the range to the device.
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*/
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if (res->flags & IORESOURCE_ROM_SHADOW)
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return 0;
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root = pci_find_parent_resource(dev, res);
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if (!root) {
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dev_info(&dev->dev, "can't claim BAR %d %pR: no compatible bridge window\n",
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