Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu: - Fixed algorithm construction hang when self-test fails. - Added SHA variants to talitos AEAD list. - New driver for Exynos random number generator. - Performance enhancements for arc4. - Added hwrng support to caam. - Added ahash support to caam. - Fixed bad kfree in aesni-intel. - Allow aesni-intel in FIPS mode. - Added atmel driver with support for AES/3DES/SHA. - Bug fixes for mv_cesa. - CRC hardware driver for BF60x family processors. * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (66 commits) crypto: twofish-avx - remove useless instruction crypto: testmgr - add aead cbc aes hmac sha1,256,512 test vectors crypto: talitos - add sha224, sha384 and sha512 to existing AEAD algorithms crypto: talitos - export the talitos_submit function crypto: talitos - move talitos structures to header file crypto: atmel - add new tests to tcrypt crypto: atmel - add Atmel SHA1/SHA256 driver crypto: atmel - add Atmel DES/TDES driver crypto: atmel - add Atmel AES driver ARM: AT91SAM9G45: add crypto peripherals crypto: testmgr - allow aesni-intel and ghash_clmulni-intel in fips mode hwrng: exynos - Add support for Exynos random number generator crypto: aesni-intel - fix wrong kfree pointer crypto: caam - ERA retrieval and printing for SEC device crypto: caam - Using alloc_coherent for caam job rings crypto: algapi - Fix hang on crypto allocation crypto: arc4 - now arc needs blockcipher support crypto: caam - one tasklet per job ring crypto: caam - consolidate memory barriers from job ring en/dequeue crypto: caam - only query h/w in job ring dequeue path ...
This commit is contained in:
@@ -18,6 +18,7 @@
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#include <linux/platform_device.h>
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#include <linux/i2c-gpio.h>
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#include <linux/atmel-mci.h>
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#include <linux/platform_data/atmel-aes.h>
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#include <linux/platform_data/at91_adc.h>
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@@ -1830,6 +1831,130 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
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void __init at91_add_device_serial(void) {}
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#endif
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/* --------------------------------------------------------------------
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* SHA1/SHA256
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_CRYPTO_DEV_ATMEL_SHA) || defined(CONFIG_CRYPTO_DEV_ATMEL_SHA_MODULE)
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static struct resource sha_resources[] = {
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{
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.start = AT91SAM9G45_BASE_SHA,
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.end = AT91SAM9G45_BASE_SHA + SZ_16K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AT91SAM9G45_ID_AESTDESSHA,
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.end = AT91SAM9G45_ID_AESTDESSHA,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device at91sam9g45_sha_device = {
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.name = "atmel_sha",
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.id = -1,
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.resource = sha_resources,
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.num_resources = ARRAY_SIZE(sha_resources),
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};
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static void __init at91_add_device_sha(void)
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{
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platform_device_register(&at91sam9g45_sha_device);
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}
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#else
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static void __init at91_add_device_sha(void) {}
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#endif
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/* --------------------------------------------------------------------
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* DES/TDES
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_CRYPTO_DEV_ATMEL_TDES) || defined(CONFIG_CRYPTO_DEV_ATMEL_TDES_MODULE)
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static struct resource tdes_resources[] = {
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[0] = {
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.start = AT91SAM9G45_BASE_TDES,
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.end = AT91SAM9G45_BASE_TDES + SZ_16K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AT91SAM9G45_ID_AESTDESSHA,
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.end = AT91SAM9G45_ID_AESTDESSHA,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device at91sam9g45_tdes_device = {
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.name = "atmel_tdes",
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.id = -1,
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.resource = tdes_resources,
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.num_resources = ARRAY_SIZE(tdes_resources),
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};
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static void __init at91_add_device_tdes(void)
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{
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platform_device_register(&at91sam9g45_tdes_device);
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}
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#else
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static void __init at91_add_device_tdes(void) {}
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#endif
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/* --------------------------------------------------------------------
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* AES
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_CRYPTO_DEV_ATMEL_AES) || defined(CONFIG_CRYPTO_DEV_ATMEL_AES_MODULE)
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static struct aes_platform_data aes_data;
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static u64 aes_dmamask = DMA_BIT_MASK(32);
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static struct resource aes_resources[] = {
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[0] = {
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.start = AT91SAM9G45_BASE_AES,
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.end = AT91SAM9G45_BASE_AES + SZ_16K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AT91SAM9G45_ID_AESTDESSHA,
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.end = AT91SAM9G45_ID_AESTDESSHA,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device at91sam9g45_aes_device = {
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.name = "atmel_aes",
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.id = -1,
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.dev = {
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.dma_mask = &aes_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &aes_data,
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},
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.resource = aes_resources,
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.num_resources = ARRAY_SIZE(aes_resources),
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};
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static void __init at91_add_device_aes(void)
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{
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struct at_dma_slave *atslave;
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struct aes_dma_data *alt_atslave;
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alt_atslave = kzalloc(sizeof(struct aes_dma_data), GFP_KERNEL);
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/* DMA TX slave channel configuration */
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atslave = &alt_atslave->txdata;
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atslave->dma_dev = &at_hdmac_device.dev;
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atslave->cfg = ATC_FIFOCFG_ENOUGHSPACE | ATC_SRC_H2SEL_HW |
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ATC_SRC_PER(AT_DMA_ID_AES_RX);
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/* DMA RX slave channel configuration */
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atslave = &alt_atslave->rxdata;
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atslave->dma_dev = &at_hdmac_device.dev;
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atslave->cfg = ATC_FIFOCFG_ENOUGHSPACE | ATC_DST_H2SEL_HW |
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ATC_DST_PER(AT_DMA_ID_AES_TX);
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aes_data.dma_slave = alt_atslave;
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platform_device_register(&at91sam9g45_aes_device);
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}
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#else
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static void __init at91_add_device_aes(void) {}
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#endif
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/* -------------------------------------------------------------------- */
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/*
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@@ -1847,6 +1972,9 @@ static int __init at91_add_standard_devices(void)
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at91_add_device_trng();
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at91_add_device_watchdog();
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at91_add_device_tc();
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at91_add_device_sha();
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at91_add_device_tdes();
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at91_add_device_aes();
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return 0;
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}
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