ARM: ARMv7-M: Allow the building of new kernel port
This patch modifies the required Kconfig and Makefile files to allow the building of kernel for Cortex-M3. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Jonathan Austin <jonathan.austin@arm.com> Tested-by: Jonathan Austin <jonathan.austin@arm.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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@@ -397,6 +397,15 @@ config CPU_V7
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select CPU_PABRT_V7
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select CPU_TLB_V7 if MMU
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# ARMv7M
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config CPU_V7M
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bool
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select CPU_32v7M
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select CPU_ABRT_NOMMU
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select CPU_CACHE_NOP
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select CPU_PABRT_LEGACY
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select CPU_THUMBONLY
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config CPU_THUMBONLY
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bool
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# There are no CPUs available with MMU that don't implement an ARM ISA:
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@@ -441,6 +450,9 @@ config CPU_32v6K
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config CPU_32v7
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bool
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config CPU_32v7M
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bool
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# The abort model
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config CPU_ABRT_NOMMU
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bool
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@@ -494,6 +506,9 @@ config CPU_CACHE_V6
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config CPU_CACHE_V7
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bool
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config CPU_CACHE_NOP
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bool
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config CPU_CACHE_VIVT
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bool
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@@ -616,7 +631,11 @@ config ARCH_DMA_ADDR_T_64BIT
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config ARM_THUMB
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bool "Support Thumb user binaries" if !CPU_THUMBONLY
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depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_V6 || CPU_V6K || CPU_V7 || CPU_FEROCEON
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depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || \
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CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || \
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CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
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CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_V6 || CPU_V6K || \
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CPU_V7 || CPU_FEROCEON || CPU_V7M
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default y
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help
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Say Y if you want to include kernel support for running user space
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@@ -40,6 +40,7 @@ obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o
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obj-$(CONFIG_CPU_CACHE_V6) += cache-v6.o
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obj-$(CONFIG_CPU_CACHE_V7) += cache-v7.o
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obj-$(CONFIG_CPU_CACHE_FA) += cache-fa.o
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obj-$(CONFIG_CPU_CACHE_NOP) += cache-nop.o
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AFLAGS_cache-v6.o :=-Wa,-march=armv6
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AFLAGS_cache-v7.o :=-Wa,-march=armv7-a
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@@ -88,6 +89,7 @@ obj-$(CONFIG_CPU_FEROCEON) += proc-feroceon.o
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obj-$(CONFIG_CPU_V6) += proc-v6.o
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obj-$(CONFIG_CPU_V6K) += proc-v6.o
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obj-$(CONFIG_CPU_V7) += proc-v7.o
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obj-$(CONFIG_CPU_V7M) += proc-v7m.o
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AFLAGS_proc-v6.o :=-Wa,-march=armv6
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AFLAGS_proc-v7.o :=-Wa,-march=armv7-a
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