UAPI: (Scripted) Disintegrate arch/ia64/include/asm
Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
This commit is contained in:
David Howells
@@ -1,16 +1,2 @@
|
||||
include include/asm-generic/Kbuild.asm
|
||||
|
||||
header-y += break.h
|
||||
header-y += cmpxchg.h
|
||||
header-y += fpu.h
|
||||
header-y += gcc_intrin.h
|
||||
header-y += ia64regs.h
|
||||
header-y += intel_intrin.h
|
||||
header-y += intrinsics.h
|
||||
header-y += perfmon.h
|
||||
header-y += perfmon_default_smpl.h
|
||||
header-y += ptrace_offsets.h
|
||||
header-y += rse.h
|
||||
header-y += ucontext.h
|
||||
header-y += ustack.h
|
||||
generic-y += clkdev.h
|
||||
|
||||
@@ -1,13 +0,0 @@
|
||||
#ifndef _ASM_IA64_AUXVEC_H
|
||||
#define _ASM_IA64_AUXVEC_H
|
||||
|
||||
/*
|
||||
* Architecture-neutral AT_ values are in the range 0-17. Leave some room for more of
|
||||
* them, start the architecture-specific ones at 32.
|
||||
*/
|
||||
#define AT_SYSINFO 32
|
||||
#define AT_SYSINFO_EHDR 33
|
||||
|
||||
#define AT_VECTOR_SIZE_ARCH 2 /* entries in ARCH_DLINFO */
|
||||
|
||||
#endif /* _ASM_IA64_AUXVEC_H */
|
||||
@@ -1,8 +0,0 @@
|
||||
#ifndef __ASM_IA64_BITSPERLONG_H
|
||||
#define __ASM_IA64_BITSPERLONG_H
|
||||
|
||||
#define __BITS_PER_LONG 64
|
||||
|
||||
#include <asm-generic/bitsperlong.h>
|
||||
|
||||
#endif /* __ASM_IA64_BITSPERLONG_H */
|
||||
@@ -1,32 +0,0 @@
|
||||
#ifndef _ASM_IA64_BREAK_H
|
||||
#define _ASM_IA64_BREAK_H
|
||||
|
||||
/*
|
||||
* IA-64 Linux break numbers.
|
||||
*
|
||||
* Copyright (C) 1999 Hewlett-Packard Co
|
||||
* Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
|
||||
*/
|
||||
|
||||
/*
|
||||
* OS-specific debug break numbers:
|
||||
*/
|
||||
#define __IA64_BREAK_KDB 0x80100
|
||||
#define __IA64_BREAK_KPROBE 0x81000 /* .. 0x81fff */
|
||||
#define __IA64_BREAK_JPROBE 0x82000
|
||||
|
||||
/*
|
||||
* OS-specific break numbers:
|
||||
*/
|
||||
#define __IA64_BREAK_SYSCALL 0x100000
|
||||
|
||||
/*
|
||||
* Xen specific break numbers:
|
||||
*/
|
||||
#define __IA64_XEN_HYPERCALL 0x1000
|
||||
/* [__IA64_XEN_HYPERPRIVOP_START, __IA64_XEN_HYPERPRIVOP_MAX] is used
|
||||
for xen hyperprivops */
|
||||
#define __IA64_XEN_HYPERPRIVOP_START 0x1
|
||||
#define __IA64_XEN_HYPERPRIVOP_MAX 0x1a
|
||||
|
||||
#endif /* _ASM_IA64_BREAK_H */
|
||||
@@ -1,6 +0,0 @@
|
||||
#ifndef _ASM_IA64_BYTEORDER_H
|
||||
#define _ASM_IA64_BYTEORDER_H
|
||||
|
||||
#include <linux/byteorder/little_endian.h>
|
||||
|
||||
#endif /* _ASM_IA64_BYTEORDER_H */
|
||||
@@ -1,147 +0,0 @@
|
||||
#ifndef _ASM_IA64_CMPXCHG_H
|
||||
#define _ASM_IA64_CMPXCHG_H
|
||||
|
||||
/*
|
||||
* Compare/Exchange, forked from asm/intrinsics.h
|
||||
* which was:
|
||||
*
|
||||
* Copyright (C) 2002-2003 Hewlett-Packard Co
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>
|
||||
*/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/types.h>
|
||||
/* include compiler specific intrinsics */
|
||||
#include <asm/ia64regs.h>
|
||||
#ifdef __INTEL_COMPILER
|
||||
# include <asm/intel_intrin.h>
|
||||
#else
|
||||
# include <asm/gcc_intrin.h>
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This function doesn't exist, so you'll get a linker error if
|
||||
* something tries to do an invalid xchg().
|
||||
*/
|
||||
extern void ia64_xchg_called_with_bad_pointer(void);
|
||||
|
||||
#define __xchg(x, ptr, size) \
|
||||
({ \
|
||||
unsigned long __xchg_result; \
|
||||
\
|
||||
switch (size) { \
|
||||
case 1: \
|
||||
__xchg_result = ia64_xchg1((__u8 *)ptr, x); \
|
||||
break; \
|
||||
\
|
||||
case 2: \
|
||||
__xchg_result = ia64_xchg2((__u16 *)ptr, x); \
|
||||
break; \
|
||||
\
|
||||
case 4: \
|
||||
__xchg_result = ia64_xchg4((__u32 *)ptr, x); \
|
||||
break; \
|
||||
\
|
||||
case 8: \
|
||||
__xchg_result = ia64_xchg8((__u64 *)ptr, x); \
|
||||
break; \
|
||||
default: \
|
||||
ia64_xchg_called_with_bad_pointer(); \
|
||||
} \
|
||||
__xchg_result; \
|
||||
})
|
||||
|
||||
#define xchg(ptr, x) \
|
||||
((__typeof__(*(ptr))) __xchg((unsigned long) (x), (ptr), sizeof(*(ptr))))
|
||||
|
||||
/*
|
||||
* Atomic compare and exchange. Compare OLD with MEM, if identical,
|
||||
* store NEW in MEM. Return the initial value in MEM. Success is
|
||||
* indicated by comparing RETURN with OLD.
|
||||
*/
|
||||
|
||||
#define __HAVE_ARCH_CMPXCHG 1
|
||||
|
||||
/*
|
||||
* This function doesn't exist, so you'll get a linker error
|
||||
* if something tries to do an invalid cmpxchg().
|
||||
*/
|
||||
extern long ia64_cmpxchg_called_with_bad_pointer(void);
|
||||
|
||||
#define ia64_cmpxchg(sem, ptr, old, new, size) \
|
||||
({ \
|
||||
__u64 _o_, _r_; \
|
||||
\
|
||||
switch (size) { \
|
||||
case 1: \
|
||||
_o_ = (__u8) (long) (old); \
|
||||
break; \
|
||||
case 2: \
|
||||
_o_ = (__u16) (long) (old); \
|
||||
break; \
|
||||
case 4: \
|
||||
_o_ = (__u32) (long) (old); \
|
||||
break; \
|
||||
case 8: \
|
||||
_o_ = (__u64) (long) (old); \
|
||||
break; \
|
||||
default: \
|
||||
break; \
|
||||
} \
|
||||
switch (size) { \
|
||||
case 1: \
|
||||
_r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \
|
||||
break; \
|
||||
\
|
||||
case 2: \
|
||||
_r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \
|
||||
break; \
|
||||
\
|
||||
case 4: \
|
||||
_r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \
|
||||
break; \
|
||||
\
|
||||
case 8: \
|
||||
_r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \
|
||||
break; \
|
||||
\
|
||||
default: \
|
||||
_r_ = ia64_cmpxchg_called_with_bad_pointer(); \
|
||||
break; \
|
||||
} \
|
||||
(__typeof__(old)) _r_; \
|
||||
})
|
||||
|
||||
#define cmpxchg_acq(ptr, o, n) \
|
||||
ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))
|
||||
#define cmpxchg_rel(ptr, o, n) \
|
||||
ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))
|
||||
|
||||
/* for compatibility with other platforms: */
|
||||
#define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
|
||||
#define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
|
||||
|
||||
#define cmpxchg_local cmpxchg
|
||||
#define cmpxchg64_local cmpxchg64
|
||||
|
||||
#ifdef CONFIG_IA64_DEBUG_CMPXCHG
|
||||
# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
|
||||
# define CMPXCHG_BUGCHECK(v) \
|
||||
do { \
|
||||
if (_cmpxchg_bugcheck_count-- <= 0) { \
|
||||
void *ip; \
|
||||
extern int printk(const char *fmt, ...); \
|
||||
ip = (void *) ia64_getreg(_IA64_REG_IP); \
|
||||
printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v));\
|
||||
break; \
|
||||
} \
|
||||
} while (0)
|
||||
#else /* !CONFIG_IA64_DEBUG_CMPXCHG */
|
||||
# define CMPXCHG_BUGCHECK_DECL
|
||||
# define CMPXCHG_BUGCHECK(v)
|
||||
#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_IA64_CMPXCHG_H */
|
||||
@@ -1 +0,0 @@
|
||||
#include <asm-generic/errno.h>
|
||||
@@ -1,13 +0,0 @@
|
||||
#ifndef _ASM_IA64_FCNTL_H
|
||||
#define _ASM_IA64_FCNTL_H
|
||||
/*
|
||||
* Modified 1998-2000
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co.
|
||||
*/
|
||||
|
||||
#define force_o_largefile() \
|
||||
(personality(current->personality) != PER_LINUX32)
|
||||
|
||||
#include <asm-generic/fcntl.h>
|
||||
|
||||
#endif /* _ASM_IA64_FCNTL_H */
|
||||
@@ -1,66 +0,0 @@
|
||||
#ifndef _ASM_IA64_FPU_H
|
||||
#define _ASM_IA64_FPU_H
|
||||
|
||||
/*
|
||||
* Copyright (C) 1998, 1999, 2002, 2003 Hewlett-Packard Co
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
/* floating point status register: */
|
||||
#define FPSR_TRAP_VD (1 << 0) /* invalid op trap disabled */
|
||||
#define FPSR_TRAP_DD (1 << 1) /* denormal trap disabled */
|
||||
#define FPSR_TRAP_ZD (1 << 2) /* zero-divide trap disabled */
|
||||
#define FPSR_TRAP_OD (1 << 3) /* overflow trap disabled */
|
||||
#define FPSR_TRAP_UD (1 << 4) /* underflow trap disabled */
|
||||
#define FPSR_TRAP_ID (1 << 5) /* inexact trap disabled */
|
||||
#define FPSR_S0(x) ((x) << 6)
|
||||
#define FPSR_S1(x) ((x) << 19)
|
||||
#define FPSR_S2(x) (__IA64_UL(x) << 32)
|
||||
#define FPSR_S3(x) (__IA64_UL(x) << 45)
|
||||
|
||||
/* floating-point status field controls: */
|
||||
#define FPSF_FTZ (1 << 0) /* flush-to-zero */
|
||||
#define FPSF_WRE (1 << 1) /* widest-range exponent */
|
||||
#define FPSF_PC(x) (((x) & 0x3) << 2) /* precision control */
|
||||
#define FPSF_RC(x) (((x) & 0x3) << 4) /* rounding control */
|
||||
#define FPSF_TD (1 << 6) /* trap disabled */
|
||||
|
||||
/* floating-point status field flags: */
|
||||
#define FPSF_V (1 << 7) /* invalid operation flag */
|
||||
#define FPSF_D (1 << 8) /* denormal/unnormal operand flag */
|
||||
#define FPSF_Z (1 << 9) /* zero divide (IEEE) flag */
|
||||
#define FPSF_O (1 << 10) /* overflow (IEEE) flag */
|
||||
#define FPSF_U (1 << 11) /* underflow (IEEE) flag */
|
||||
#define FPSF_I (1 << 12) /* inexact (IEEE) flag) */
|
||||
|
||||
/* floating-point rounding control: */
|
||||
#define FPRC_NEAREST 0x0
|
||||
#define FPRC_NEGINF 0x1
|
||||
#define FPRC_POSINF 0x2
|
||||
#define FPRC_TRUNC 0x3
|
||||
|
||||
#define FPSF_DEFAULT (FPSF_PC (0x3) | FPSF_RC (FPRC_NEAREST))
|
||||
|
||||
/* This default value is the same as HP-UX uses. Don't change it
|
||||
without a very good reason. */
|
||||
#define FPSR_DEFAULT (FPSR_TRAP_VD | FPSR_TRAP_DD | FPSR_TRAP_ZD \
|
||||
| FPSR_TRAP_OD | FPSR_TRAP_UD | FPSR_TRAP_ID \
|
||||
| FPSR_S0 (FPSF_DEFAULT) \
|
||||
| FPSR_S1 (FPSF_DEFAULT | FPSF_TD | FPSF_WRE) \
|
||||
| FPSR_S2 (FPSF_DEFAULT | FPSF_TD) \
|
||||
| FPSR_S3 (FPSF_DEFAULT | FPSF_TD))
|
||||
|
||||
# ifndef __ASSEMBLY__
|
||||
|
||||
struct ia64_fpreg {
|
||||
union {
|
||||
unsigned long bits[2];
|
||||
long double __dummy; /* force 16-byte alignment */
|
||||
} u;
|
||||
};
|
||||
|
||||
# endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_IA64_FPU_H */
|
||||
@@ -1,621 +1,12 @@
|
||||
#ifndef _ASM_IA64_GCC_INTRIN_H
|
||||
#define _ASM_IA64_GCC_INTRIN_H
|
||||
/*
|
||||
*
|
||||
* Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
|
||||
* Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
|
||||
*/
|
||||
#ifndef _ASM_IA64_GCC_INTRIN_H
|
||||
#define _ASM_IA64_GCC_INTRIN_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/compiler.h>
|
||||
#include <uapi/asm/gcc_intrin.h>
|
||||
|
||||
/* define this macro to get some asm stmts included in 'c' files */
|
||||
#define ASM_SUPPORTED
|
||||
|
||||
/* Optimization barrier */
|
||||
/* The "volatile" is due to gcc bugs */
|
||||
#define ia64_barrier() asm volatile ("":::"memory")
|
||||
|
||||
#define ia64_stop() asm volatile (";;"::)
|
||||
|
||||
#define ia64_invala_gr(regnum) asm volatile ("invala.e r%0" :: "i"(regnum))
|
||||
|
||||
#define ia64_invala_fr(regnum) asm volatile ("invala.e f%0" :: "i"(regnum))
|
||||
|
||||
#define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
|
||||
|
||||
#define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
|
||||
|
||||
extern void ia64_bad_param_for_setreg (void);
|
||||
extern void ia64_bad_param_for_getreg (void);
|
||||
|
||||
#ifdef __KERNEL__
|
||||
register unsigned long ia64_r13 asm ("r13") __used;
|
||||
#endif
|
||||
|
||||
#define ia64_native_setreg(regnum, val) \
|
||||
({ \
|
||||
switch (regnum) { \
|
||||
case _IA64_REG_PSR_L: \
|
||||
asm volatile ("mov psr.l=%0" :: "r"(val) : "memory"); \
|
||||
break; \
|
||||
case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
|
||||
asm volatile ("mov ar%0=%1" :: \
|
||||
"i" (regnum - _IA64_REG_AR_KR0), \
|
||||
"r"(val): "memory"); \
|
||||
break; \
|
||||
case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
|
||||
asm volatile ("mov cr%0=%1" :: \
|
||||
"i" (regnum - _IA64_REG_CR_DCR), \
|
||||
"r"(val): "memory" ); \
|
||||
break; \
|
||||
case _IA64_REG_SP: \
|
||||
asm volatile ("mov r12=%0" :: \
|
||||
"r"(val): "memory"); \
|
||||
break; \
|
||||
case _IA64_REG_GP: \
|
||||
asm volatile ("mov gp=%0" :: "r"(val) : "memory"); \
|
||||
break; \
|
||||
default: \
|
||||
ia64_bad_param_for_setreg(); \
|
||||
break; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define ia64_native_getreg(regnum) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
\
|
||||
switch (regnum) { \
|
||||
case _IA64_REG_GP: \
|
||||
asm volatile ("mov %0=gp" : "=r"(ia64_intri_res)); \
|
||||
break; \
|
||||
case _IA64_REG_IP: \
|
||||
asm volatile ("mov %0=ip" : "=r"(ia64_intri_res)); \
|
||||
break; \
|
||||
case _IA64_REG_PSR: \
|
||||
asm volatile ("mov %0=psr" : "=r"(ia64_intri_res)); \
|
||||
break; \
|
||||
case _IA64_REG_TP: /* for current() */ \
|
||||
ia64_intri_res = ia64_r13; \
|
||||
break; \
|
||||
case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
|
||||
asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res) \
|
||||
: "i"(regnum - _IA64_REG_AR_KR0)); \
|
||||
break; \
|
||||
case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
|
||||
asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res) \
|
||||
: "i" (regnum - _IA64_REG_CR_DCR)); \
|
||||
break; \
|
||||
case _IA64_REG_SP: \
|
||||
asm volatile ("mov %0=sp" : "=r" (ia64_intri_res)); \
|
||||
break; \
|
||||
default: \
|
||||
ia64_bad_param_for_getreg(); \
|
||||
break; \
|
||||
} \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_hint_pause 0
|
||||
|
||||
#define ia64_hint(mode) \
|
||||
({ \
|
||||
switch (mode) { \
|
||||
case ia64_hint_pause: \
|
||||
asm volatile ("hint @pause" ::: "memory"); \
|
||||
break; \
|
||||
} \
|
||||
})
|
||||
|
||||
|
||||
/* Integer values for mux1 instruction */
|
||||
#define ia64_mux1_brcst 0
|
||||
#define ia64_mux1_mix 8
|
||||
#define ia64_mux1_shuf 9
|
||||
#define ia64_mux1_alt 10
|
||||
#define ia64_mux1_rev 11
|
||||
|
||||
#define ia64_mux1(x, mode) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
\
|
||||
switch (mode) { \
|
||||
case ia64_mux1_brcst: \
|
||||
asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x)); \
|
||||
break; \
|
||||
case ia64_mux1_mix: \
|
||||
asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x)); \
|
||||
break; \
|
||||
case ia64_mux1_shuf: \
|
||||
asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x)); \
|
||||
break; \
|
||||
case ia64_mux1_alt: \
|
||||
asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x)); \
|
||||
break; \
|
||||
case ia64_mux1_rev: \
|
||||
asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x)); \
|
||||
break; \
|
||||
} \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
|
||||
# define ia64_popcnt(x) __builtin_popcountl(x)
|
||||
#else
|
||||
# define ia64_popcnt(x) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \
|
||||
\
|
||||
ia64_intri_res; \
|
||||
})
|
||||
#endif
|
||||
|
||||
#define ia64_getf_exp(x) \
|
||||
({ \
|
||||
long ia64_intri_res; \
|
||||
\
|
||||
asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x)); \
|
||||
\
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_shrp(a, b, count) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count)); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_ldfs(regnum, x) \
|
||||
({ \
|
||||
register double __f__ asm ("f"#regnum); \
|
||||
asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x)); \
|
||||
})
|
||||
|
||||
#define ia64_ldfd(regnum, x) \
|
||||
({ \
|
||||
register double __f__ asm ("f"#regnum); \
|
||||
asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x)); \
|
||||
})
|
||||
|
||||
#define ia64_ldfe(regnum, x) \
|
||||
({ \
|
||||
register double __f__ asm ("f"#regnum); \
|
||||
asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x)); \
|
||||
})
|
||||
|
||||
#define ia64_ldf8(regnum, x) \
|
||||
({ \
|
||||
register double __f__ asm ("f"#regnum); \
|
||||
asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x)); \
|
||||
})
|
||||
|
||||
#define ia64_ldf_fill(regnum, x) \
|
||||
({ \
|
||||
register double __f__ asm ("f"#regnum); \
|
||||
asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
|
||||
})
|
||||
|
||||
#define ia64_st4_rel_nta(m, val) \
|
||||
({ \
|
||||
asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \
|
||||
})
|
||||
|
||||
#define ia64_stfs(x, regnum) \
|
||||
({ \
|
||||
register double __f__ asm ("f"#regnum); \
|
||||
asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
|
||||
})
|
||||
|
||||
#define ia64_stfd(x, regnum) \
|
||||
({ \
|
||||
register double __f__ asm ("f"#regnum); \
|
||||
asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
|
||||
})
|
||||
|
||||
#define ia64_stfe(x, regnum) \
|
||||
({ \
|
||||
register double __f__ asm ("f"#regnum); \
|
||||
asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
|
||||
})
|
||||
|
||||
#define ia64_stf8(x, regnum) \
|
||||
({ \
|
||||
register double __f__ asm ("f"#regnum); \
|
||||
asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
|
||||
})
|
||||
|
||||
#define ia64_stf_spill(x, regnum) \
|
||||
({ \
|
||||
register double __f__ asm ("f"#regnum); \
|
||||
asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
|
||||
})
|
||||
|
||||
#define ia64_fetchadd4_acq(p, inc) \
|
||||
({ \
|
||||
\
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("fetchadd4.acq %0=[%1],%2" \
|
||||
: "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
|
||||
: "memory"); \
|
||||
\
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_fetchadd4_rel(p, inc) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("fetchadd4.rel %0=[%1],%2" \
|
||||
: "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
|
||||
: "memory"); \
|
||||
\
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_fetchadd8_acq(p, inc) \
|
||||
({ \
|
||||
\
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("fetchadd8.acq %0=[%1],%2" \
|
||||
: "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
|
||||
: "memory"); \
|
||||
\
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_fetchadd8_rel(p, inc) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("fetchadd8.rel %0=[%1],%2" \
|
||||
: "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
|
||||
: "memory"); \
|
||||
\
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_xchg1(ptr,x) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("xchg1 %0=[%1],%2" \
|
||||
: "=r" (ia64_intri_res) : "r" (ptr), "r" (x) : "memory"); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_xchg2(ptr,x) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res) \
|
||||
: "r" (ptr), "r" (x) : "memory"); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_xchg4(ptr,x) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res) \
|
||||
: "r" (ptr), "r" (x) : "memory"); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_xchg8(ptr,x) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res) \
|
||||
: "r" (ptr), "r" (x) : "memory"); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_cmpxchg1_acq(ptr, new, old) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
|
||||
asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv": \
|
||||
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_cmpxchg1_rel(ptr, new, old) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
|
||||
asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv": \
|
||||
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_cmpxchg2_acq(ptr, new, old) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
|
||||
asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv": \
|
||||
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_cmpxchg2_rel(ptr, new, old) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
|
||||
\
|
||||
asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv": \
|
||||
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_cmpxchg4_acq(ptr, new, old) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
|
||||
asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv": \
|
||||
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_cmpxchg4_rel(ptr, new, old) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
|
||||
asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv": \
|
||||
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_cmpxchg8_acq(ptr, new, old) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
|
||||
asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv": \
|
||||
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_cmpxchg8_rel(ptr, new, old) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
|
||||
\
|
||||
asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv": \
|
||||
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_mf() asm volatile ("mf" ::: "memory")
|
||||
#define ia64_mfa() asm volatile ("mf.a" ::: "memory")
|
||||
|
||||
#define ia64_invala() asm volatile ("invala" ::: "memory")
|
||||
|
||||
#define ia64_native_thash(addr) \
|
||||
({ \
|
||||
unsigned long ia64_intri_res; \
|
||||
asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_srlz_i() asm volatile (";; srlz.i ;;" ::: "memory")
|
||||
#define ia64_srlz_d() asm volatile (";; srlz.d" ::: "memory");
|
||||
|
||||
#ifdef HAVE_SERIALIZE_DIRECTIVE
|
||||
# define ia64_dv_serialize_data() asm volatile (".serialize.data");
|
||||
# define ia64_dv_serialize_instruction() asm volatile (".serialize.instruction");
|
||||
#else
|
||||
# define ia64_dv_serialize_data()
|
||||
# define ia64_dv_serialize_instruction()
|
||||
#endif
|
||||
|
||||
#define ia64_nop(x) asm volatile ("nop %0"::"i"(x));
|
||||
|
||||
#define ia64_itci(addr) asm volatile ("itc.i %0;;" :: "r"(addr) : "memory")
|
||||
|
||||
#define ia64_itcd(addr) asm volatile ("itc.d %0;;" :: "r"(addr) : "memory")
|
||||
|
||||
|
||||
#define ia64_itri(trnum, addr) asm volatile ("itr.i itr[%0]=%1" \
|
||||
:: "r"(trnum), "r"(addr) : "memory")
|
||||
|
||||
#define ia64_itrd(trnum, addr) asm volatile ("itr.d dtr[%0]=%1" \
|
||||
:: "r"(trnum), "r"(addr) : "memory")
|
||||
|
||||
#define ia64_tpa(addr) \
|
||||
({ \
|
||||
unsigned long ia64_pa; \
|
||||
asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \
|
||||
ia64_pa; \
|
||||
})
|
||||
|
||||
#define __ia64_set_dbr(index, val) \
|
||||
asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")
|
||||
|
||||
#define ia64_set_ibr(index, val) \
|
||||
asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")
|
||||
|
||||
#define ia64_set_pkr(index, val) \
|
||||
asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")
|
||||
|
||||
#define ia64_set_pmc(index, val) \
|
||||
asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")
|
||||
|
||||
#define ia64_set_pmd(index, val) \
|
||||
asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
|
||||
|
||||
#define ia64_native_set_rr(index, val) \
|
||||
asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
|
||||
|
||||
#define ia64_native_get_cpuid(index) \
|
||||
({ \
|
||||
unsigned long ia64_intri_res; \
|
||||
asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define __ia64_get_dbr(index) \
|
||||
({ \
|
||||
unsigned long ia64_intri_res; \
|
||||
asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_get_ibr(index) \
|
||||
({ \
|
||||
unsigned long ia64_intri_res; \
|
||||
asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_get_pkr(index) \
|
||||
({ \
|
||||
unsigned long ia64_intri_res; \
|
||||
asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_get_pmc(index) \
|
||||
({ \
|
||||
unsigned long ia64_intri_res; \
|
||||
asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
|
||||
#define ia64_native_get_pmd(index) \
|
||||
({ \
|
||||
unsigned long ia64_intri_res; \
|
||||
asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_native_get_rr(index) \
|
||||
({ \
|
||||
unsigned long ia64_intri_res; \
|
||||
asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
#define ia64_native_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory")
|
||||
|
||||
|
||||
#define ia64_sync_i() asm volatile (";; sync.i" ::: "memory")
|
||||
|
||||
#define ia64_native_ssm(mask) asm volatile ("ssm %0":: "i"((mask)) : "memory")
|
||||
#define ia64_native_rsm(mask) asm volatile ("rsm %0":: "i"((mask)) : "memory")
|
||||
#define ia64_sum(mask) asm volatile ("sum %0":: "i"((mask)) : "memory")
|
||||
#define ia64_rum(mask) asm volatile ("rum %0":: "i"((mask)) : "memory")
|
||||
|
||||
#define ia64_ptce(addr) asm volatile ("ptc.e %0" :: "r"(addr))
|
||||
|
||||
#define ia64_native_ptcga(addr, size) \
|
||||
do { \
|
||||
asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory"); \
|
||||
ia64_dv_serialize_data(); \
|
||||
} while (0)
|
||||
|
||||
#define ia64_ptcl(addr, size) \
|
||||
do { \
|
||||
asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory"); \
|
||||
ia64_dv_serialize_data(); \
|
||||
} while (0)
|
||||
|
||||
#define ia64_ptri(addr, size) \
|
||||
asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")
|
||||
|
||||
#define ia64_ptrd(addr, size) \
|
||||
asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
|
||||
|
||||
#define ia64_ttag(addr) \
|
||||
({ \
|
||||
__u64 ia64_intri_res; \
|
||||
asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
|
||||
ia64_intri_res; \
|
||||
})
|
||||
|
||||
|
||||
/* Values for lfhint in ia64_lfetch and ia64_lfetch_fault */
|
||||
|
||||
#define ia64_lfhint_none 0
|
||||
#define ia64_lfhint_nt1 1
|
||||
#define ia64_lfhint_nt2 2
|
||||
#define ia64_lfhint_nta 3
|
||||
|
||||
#define ia64_lfetch(lfhint, y) \
|
||||
({ \
|
||||
switch (lfhint) { \
|
||||
case ia64_lfhint_none: \
|
||||
asm volatile ("lfetch [%0]" : : "r"(y)); \
|
||||
break; \
|
||||
case ia64_lfhint_nt1: \
|
||||
asm volatile ("lfetch.nt1 [%0]" : : "r"(y)); \
|
||||
break; \
|
||||
case ia64_lfhint_nt2: \
|
||||
asm volatile ("lfetch.nt2 [%0]" : : "r"(y)); \
|
||||
break; \
|
||||
case ia64_lfhint_nta: \
|
||||
asm volatile ("lfetch.nta [%0]" : : "r"(y)); \
|
||||
break; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define ia64_lfetch_excl(lfhint, y) \
|
||||
({ \
|
||||
switch (lfhint) { \
|
||||
case ia64_lfhint_none: \
|
||||
asm volatile ("lfetch.excl [%0]" :: "r"(y)); \
|
||||
break; \
|
||||
case ia64_lfhint_nt1: \
|
||||
asm volatile ("lfetch.excl.nt1 [%0]" :: "r"(y)); \
|
||||
break; \
|
||||
case ia64_lfhint_nt2: \
|
||||
asm volatile ("lfetch.excl.nt2 [%0]" :: "r"(y)); \
|
||||
break; \
|
||||
case ia64_lfhint_nta: \
|
||||
asm volatile ("lfetch.excl.nta [%0]" :: "r"(y)); \
|
||||
break; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define ia64_lfetch_fault(lfhint, y) \
|
||||
({ \
|
||||
switch (lfhint) { \
|
||||
case ia64_lfhint_none: \
|
||||
asm volatile ("lfetch.fault [%0]" : : "r"(y)); \
|
||||
break; \
|
||||
case ia64_lfhint_nt1: \
|
||||
asm volatile ("lfetch.fault.nt1 [%0]" : : "r"(y)); \
|
||||
break; \
|
||||
case ia64_lfhint_nt2: \
|
||||
asm volatile ("lfetch.fault.nt2 [%0]" : : "r"(y)); \
|
||||
break; \
|
||||
case ia64_lfhint_nta: \
|
||||
asm volatile ("lfetch.fault.nta [%0]" : : "r"(y)); \
|
||||
break; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define ia64_lfetch_fault_excl(lfhint, y) \
|
||||
({ \
|
||||
switch (lfhint) { \
|
||||
case ia64_lfhint_none: \
|
||||
asm volatile ("lfetch.fault.excl [%0]" :: "r"(y)); \
|
||||
break; \
|
||||
case ia64_lfhint_nt1: \
|
||||
asm volatile ("lfetch.fault.excl.nt1 [%0]" :: "r"(y)); \
|
||||
break; \
|
||||
case ia64_lfhint_nt2: \
|
||||
asm volatile ("lfetch.fault.excl.nt2 [%0]" :: "r"(y)); \
|
||||
break; \
|
||||
case ia64_lfhint_nta: \
|
||||
asm volatile ("lfetch.fault.excl.nta [%0]" :: "r"(y)); \
|
||||
break; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define ia64_native_intrin_local_irq_restore(x) \
|
||||
do { \
|
||||
asm volatile (";; cmp.ne p6,p7=%0,r0;;" \
|
||||
"(p6) ssm psr.i;" \
|
||||
"(p7) rsm psr.i;;" \
|
||||
"(p6) srlz.d" \
|
||||
:: "r"((x)) : "p6", "p7", "memory"); \
|
||||
} while (0)
|
||||
|
||||
#endif /* _ASM_IA64_GCC_INTRIN_H */
|
||||
|
||||
@@ -1,100 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2002,2003 Intel Corp.
|
||||
* Jun Nakajima <jun.nakajima@intel.com>
|
||||
* Suresh Siddha <suresh.b.siddha@intel.com>
|
||||
*/
|
||||
|
||||
#ifndef _ASM_IA64_IA64REGS_H
|
||||
#define _ASM_IA64_IA64REGS_H
|
||||
|
||||
/*
|
||||
* Register Names for getreg() and setreg().
|
||||
*
|
||||
* The "magic" numbers happen to match the values used by the Intel compiler's
|
||||
* getreg()/setreg() intrinsics.
|
||||
*/
|
||||
|
||||
/* Special Registers */
|
||||
|
||||
#define _IA64_REG_IP 1016 /* getreg only */
|
||||
#define _IA64_REG_PSR 1019
|
||||
#define _IA64_REG_PSR_L 1019
|
||||
|
||||
/* General Integer Registers */
|
||||
|
||||
#define _IA64_REG_GP 1025 /* R1 */
|
||||
#define _IA64_REG_R8 1032 /* R8 */
|
||||
#define _IA64_REG_R9 1033 /* R9 */
|
||||
#define _IA64_REG_SP 1036 /* R12 */
|
||||
#define _IA64_REG_TP 1037 /* R13 */
|
||||
|
||||
/* Application Registers */
|
||||
|
||||
#define _IA64_REG_AR_KR0 3072
|
||||
#define _IA64_REG_AR_KR1 3073
|
||||
#define _IA64_REG_AR_KR2 3074
|
||||
#define _IA64_REG_AR_KR3 3075
|
||||
#define _IA64_REG_AR_KR4 3076
|
||||
#define _IA64_REG_AR_KR5 3077
|
||||
#define _IA64_REG_AR_KR6 3078
|
||||
#define _IA64_REG_AR_KR7 3079
|
||||
#define _IA64_REG_AR_RSC 3088
|
||||
#define _IA64_REG_AR_BSP 3089
|
||||
#define _IA64_REG_AR_BSPSTORE 3090
|
||||
#define _IA64_REG_AR_RNAT 3091
|
||||
#define _IA64_REG_AR_FCR 3093
|
||||
#define _IA64_REG_AR_EFLAG 3096
|
||||
#define _IA64_REG_AR_CSD 3097
|
||||
#define _IA64_REG_AR_SSD 3098
|
||||
#define _IA64_REG_AR_CFLAG 3099
|
||||
#define _IA64_REG_AR_FSR 3100
|
||||
#define _IA64_REG_AR_FIR 3101
|
||||
#define _IA64_REG_AR_FDR 3102
|
||||
#define _IA64_REG_AR_CCV 3104
|
||||
#define _IA64_REG_AR_UNAT 3108
|
||||
#define _IA64_REG_AR_FPSR 3112
|
||||
#define _IA64_REG_AR_ITC 3116
|
||||
#define _IA64_REG_AR_PFS 3136
|
||||
#define _IA64_REG_AR_LC 3137
|
||||
#define _IA64_REG_AR_EC 3138
|
||||
|
||||
/* Control Registers */
|
||||
|
||||
#define _IA64_REG_CR_DCR 4096
|
||||
#define _IA64_REG_CR_ITM 4097
|
||||
#define _IA64_REG_CR_IVA 4098
|
||||
#define _IA64_REG_CR_PTA 4104
|
||||
#define _IA64_REG_CR_IPSR 4112
|
||||
#define _IA64_REG_CR_ISR 4113
|
||||
#define _IA64_REG_CR_IIP 4115
|
||||
#define _IA64_REG_CR_IFA 4116
|
||||
#define _IA64_REG_CR_ITIR 4117
|
||||
#define _IA64_REG_CR_IIPA 4118
|
||||
#define _IA64_REG_CR_IFS 4119
|
||||
#define _IA64_REG_CR_IIM 4120
|
||||
#define _IA64_REG_CR_IHA 4121
|
||||
#define _IA64_REG_CR_LID 4160
|
||||
#define _IA64_REG_CR_IVR 4161 /* getreg only */
|
||||
#define _IA64_REG_CR_TPR 4162
|
||||
#define _IA64_REG_CR_EOI 4163
|
||||
#define _IA64_REG_CR_IRR0 4164 /* getreg only */
|
||||
#define _IA64_REG_CR_IRR1 4165 /* getreg only */
|
||||
#define _IA64_REG_CR_IRR2 4166 /* getreg only */
|
||||
#define _IA64_REG_CR_IRR3 4167 /* getreg only */
|
||||
#define _IA64_REG_CR_ITV 4168
|
||||
#define _IA64_REG_CR_PMV 4169
|
||||
#define _IA64_REG_CR_CMCV 4170
|
||||
#define _IA64_REG_CR_LRR0 4176
|
||||
#define _IA64_REG_CR_LRR1 4177
|
||||
|
||||
/* Indirect Registers for getindreg() and setindreg() */
|
||||
|
||||
#define _IA64_REG_INDR_CPUID 9000 /* getindreg only */
|
||||
#define _IA64_REG_INDR_DBR 9001
|
||||
#define _IA64_REG_INDR_IBR 9002
|
||||
#define _IA64_REG_INDR_PKR 9003
|
||||
#define _IA64_REG_INDR_PMC 9004
|
||||
#define _IA64_REG_INDR_PMD 9005
|
||||
#define _IA64_REG_INDR_RR 9006
|
||||
|
||||
#endif /* _ASM_IA64_IA64REGS_H */
|
||||
@@ -1,161 +0,0 @@
|
||||
#ifndef _ASM_IA64_INTEL_INTRIN_H
|
||||
#define _ASM_IA64_INTEL_INTRIN_H
|
||||
/*
|
||||
* Intel Compiler Intrinsics
|
||||
*
|
||||
* Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
|
||||
* Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
|
||||
* Copyright (C) 2005,2006 Hongjiu Lu <hongjiu.lu@intel.com>
|
||||
*
|
||||
*/
|
||||
#include <ia64intrin.h>
|
||||
|
||||
#define ia64_barrier() __memory_barrier()
|
||||
|
||||
#define ia64_stop() /* Nothing: As of now stop bit is generated for each
|
||||
* intrinsic
|
||||
*/
|
||||
|
||||
#define ia64_native_getreg __getReg
|
||||
#define ia64_native_setreg __setReg
|
||||
|
||||
#define ia64_hint __hint
|
||||
#define ia64_hint_pause __hint_pause
|
||||
|
||||
#define ia64_mux1_brcst _m64_mux1_brcst
|
||||
#define ia64_mux1_mix _m64_mux1_mix
|
||||
#define ia64_mux1_shuf _m64_mux1_shuf
|
||||
#define ia64_mux1_alt _m64_mux1_alt
|
||||
#define ia64_mux1_rev _m64_mux1_rev
|
||||
|
||||
#define ia64_mux1(x,v) _m_to_int64(_m64_mux1(_m_from_int64(x), (v)))
|
||||
#define ia64_popcnt _m64_popcnt
|
||||
#define ia64_getf_exp __getf_exp
|
||||
#define ia64_shrp _m64_shrp
|
||||
|
||||
#define ia64_tpa __tpa
|
||||
#define ia64_invala __invala
|
||||
#define ia64_invala_gr __invala_gr
|
||||
#define ia64_invala_fr __invala_fr
|
||||
#define ia64_nop __nop
|
||||
#define ia64_sum __sum
|
||||
#define ia64_native_ssm __ssm
|
||||
#define ia64_rum __rum
|
||||
#define ia64_native_rsm __rsm
|
||||
#define ia64_native_fc __fc
|
||||
|
||||
#define ia64_ldfs __ldfs
|
||||
#define ia64_ldfd __ldfd
|
||||
#define ia64_ldfe __ldfe
|
||||
#define ia64_ldf8 __ldf8
|
||||
#define ia64_ldf_fill __ldf_fill
|
||||
|
||||
#define ia64_stfs __stfs
|
||||
#define ia64_stfd __stfd
|
||||
#define ia64_stfe __stfe
|
||||
#define ia64_stf8 __stf8
|
||||
#define ia64_stf_spill __stf_spill
|
||||
|
||||
#define ia64_mf __mf
|
||||
#define ia64_mfa __mfa
|
||||
|
||||
#define ia64_fetchadd4_acq __fetchadd4_acq
|
||||
#define ia64_fetchadd4_rel __fetchadd4_rel
|
||||
#define ia64_fetchadd8_acq __fetchadd8_acq
|
||||
#define ia64_fetchadd8_rel __fetchadd8_rel
|
||||
|
||||
#define ia64_xchg1 _InterlockedExchange8
|
||||
#define ia64_xchg2 _InterlockedExchange16
|
||||
#define ia64_xchg4 _InterlockedExchange
|
||||
#define ia64_xchg8 _InterlockedExchange64
|
||||
|
||||
#define ia64_cmpxchg1_rel _InterlockedCompareExchange8_rel
|
||||
#define ia64_cmpxchg1_acq _InterlockedCompareExchange8_acq
|
||||
#define ia64_cmpxchg2_rel _InterlockedCompareExchange16_rel
|
||||
#define ia64_cmpxchg2_acq _InterlockedCompareExchange16_acq
|
||||
#define ia64_cmpxchg4_rel _InterlockedCompareExchange_rel
|
||||
#define ia64_cmpxchg4_acq _InterlockedCompareExchange_acq
|
||||
#define ia64_cmpxchg8_rel _InterlockedCompareExchange64_rel
|
||||
#define ia64_cmpxchg8_acq _InterlockedCompareExchange64_acq
|
||||
|
||||
#define __ia64_set_dbr(index, val) \
|
||||
__setIndReg(_IA64_REG_INDR_DBR, index, val)
|
||||
#define ia64_set_ibr(index, val) \
|
||||
__setIndReg(_IA64_REG_INDR_IBR, index, val)
|
||||
#define ia64_set_pkr(index, val) \
|
||||
__setIndReg(_IA64_REG_INDR_PKR, index, val)
|
||||
#define ia64_set_pmc(index, val) \
|
||||
__setIndReg(_IA64_REG_INDR_PMC, index, val)
|
||||
#define ia64_set_pmd(index, val) \
|
||||
__setIndReg(_IA64_REG_INDR_PMD, index, val)
|
||||
#define ia64_native_set_rr(index, val) \
|
||||
__setIndReg(_IA64_REG_INDR_RR, index, val)
|
||||
|
||||
#define ia64_native_get_cpuid(index) \
|
||||
__getIndReg(_IA64_REG_INDR_CPUID, index)
|
||||
#define __ia64_get_dbr(index) __getIndReg(_IA64_REG_INDR_DBR, index)
|
||||
#define ia64_get_ibr(index) __getIndReg(_IA64_REG_INDR_IBR, index)
|
||||
#define ia64_get_pkr(index) __getIndReg(_IA64_REG_INDR_PKR, index)
|
||||
#define ia64_get_pmc(index) __getIndReg(_IA64_REG_INDR_PMC, index)
|
||||
#define ia64_native_get_pmd(index) __getIndReg(_IA64_REG_INDR_PMD, index)
|
||||
#define ia64_native_get_rr(index) __getIndReg(_IA64_REG_INDR_RR, index)
|
||||
|
||||
#define ia64_srlz_d __dsrlz
|
||||
#define ia64_srlz_i __isrlz
|
||||
|
||||
#define ia64_dv_serialize_data()
|
||||
#define ia64_dv_serialize_instruction()
|
||||
|
||||
#define ia64_st1_rel __st1_rel
|
||||
#define ia64_st2_rel __st2_rel
|
||||
#define ia64_st4_rel __st4_rel
|
||||
#define ia64_st8_rel __st8_rel
|
||||
|
||||
/* FIXME: need st4.rel.nta intrinsic */
|
||||
#define ia64_st4_rel_nta __st4_rel
|
||||
|
||||
#define ia64_ld1_acq __ld1_acq
|
||||
#define ia64_ld2_acq __ld2_acq
|
||||
#define ia64_ld4_acq __ld4_acq
|
||||
#define ia64_ld8_acq __ld8_acq
|
||||
|
||||
#define ia64_sync_i __synci
|
||||
#define ia64_native_thash __thash
|
||||
#define ia64_native_ttag __ttag
|
||||
#define ia64_itcd __itcd
|
||||
#define ia64_itci __itci
|
||||
#define ia64_itrd __itrd
|
||||
#define ia64_itri __itri
|
||||
#define ia64_ptce __ptce
|
||||
#define ia64_ptcl __ptcl
|
||||
#define ia64_native_ptcg __ptcg
|
||||
#define ia64_native_ptcga __ptcga
|
||||
#define ia64_ptri __ptri
|
||||
#define ia64_ptrd __ptrd
|
||||
#define ia64_dep_mi _m64_dep_mi
|
||||
|
||||
/* Values for lfhint in __lfetch and __lfetch_fault */
|
||||
|
||||
#define ia64_lfhint_none __lfhint_none
|
||||
#define ia64_lfhint_nt1 __lfhint_nt1
|
||||
#define ia64_lfhint_nt2 __lfhint_nt2
|
||||
#define ia64_lfhint_nta __lfhint_nta
|
||||
|
||||
#define ia64_lfetch __lfetch
|
||||
#define ia64_lfetch_excl __lfetch_excl
|
||||
#define ia64_lfetch_fault __lfetch_fault
|
||||
#define ia64_lfetch_fault_excl __lfetch_fault_excl
|
||||
|
||||
#define ia64_native_intrin_local_irq_restore(x) \
|
||||
do { \
|
||||
if ((x) != 0) { \
|
||||
ia64_native_ssm(IA64_PSR_I); \
|
||||
ia64_srlz_d(); \
|
||||
} else { \
|
||||
ia64_native_rsm(IA64_PSR_I); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define __builtin_trap() __break(0);
|
||||
|
||||
#endif /* _ASM_IA64_INTEL_INTRIN_H */
|
||||
@@ -1,99 +1,16 @@
|
||||
#ifndef _ASM_IA64_INTRINSICS_H
|
||||
#define _ASM_IA64_INTRINSICS_H
|
||||
|
||||
/*
|
||||
* Compiler-dependent intrinsics.
|
||||
*
|
||||
* Copyright (C) 2002-2003 Hewlett-Packard Co
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>
|
||||
*/
|
||||
#ifndef _ASM_IA64_INTRINSICS_H
|
||||
#define _ASM_IA64_INTRINSICS_H
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/types.h>
|
||||
/* include compiler specific intrinsics */
|
||||
#include <asm/ia64regs.h>
|
||||
#ifdef __INTEL_COMPILER
|
||||
# include <asm/intel_intrin.h>
|
||||
#else
|
||||
# include <asm/gcc_intrin.h>
|
||||
#endif
|
||||
#include <asm/cmpxchg.h>
|
||||
|
||||
#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
|
||||
|
||||
#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
|
||||
do { \
|
||||
ia64_native_set_rr(0x0000000000000000UL, (val0)); \
|
||||
ia64_native_set_rr(0x2000000000000000UL, (val1)); \
|
||||
ia64_native_set_rr(0x4000000000000000UL, (val2)); \
|
||||
ia64_native_set_rr(0x6000000000000000UL, (val3)); \
|
||||
ia64_native_set_rr(0x8000000000000000UL, (val4)); \
|
||||
} while (0)
|
||||
|
||||
/*
|
||||
* Force an unresolved reference if someone tries to use
|
||||
* ia64_fetch_and_add() with a bad value.
|
||||
*/
|
||||
extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
|
||||
extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
|
||||
|
||||
#define IA64_FETCHADD(tmp,v,n,sz,sem) \
|
||||
({ \
|
||||
switch (sz) { \
|
||||
case 4: \
|
||||
tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \
|
||||
break; \
|
||||
\
|
||||
case 8: \
|
||||
tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \
|
||||
break; \
|
||||
\
|
||||
default: \
|
||||
__bad_size_for_ia64_fetch_and_add(); \
|
||||
} \
|
||||
})
|
||||
|
||||
#define ia64_fetchadd(i,v,sem) \
|
||||
({ \
|
||||
__u64 _tmp; \
|
||||
volatile __typeof__(*(v)) *_v = (v); \
|
||||
/* Can't use a switch () here: gcc isn't always smart enough for that... */ \
|
||||
if ((i) == -16) \
|
||||
IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \
|
||||
else if ((i) == -8) \
|
||||
IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \
|
||||
else if ((i) == -4) \
|
||||
IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \
|
||||
else if ((i) == -1) \
|
||||
IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \
|
||||
else if ((i) == 1) \
|
||||
IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \
|
||||
else if ((i) == 4) \
|
||||
IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \
|
||||
else if ((i) == 8) \
|
||||
IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \
|
||||
else if ((i) == 16) \
|
||||
IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \
|
||||
else \
|
||||
_tmp = __bad_increment_for_ia64_fetch_and_add(); \
|
||||
(__typeof__(*(v))) (_tmp); /* return old value */ \
|
||||
})
|
||||
|
||||
#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#include <asm/paravirt_privop.h>
|
||||
#endif
|
||||
#include <uapi/asm/intrinsics.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#define IA64_INTRINSIC_API(name) ia64_native_ ## name
|
||||
#define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name
|
||||
|
||||
#if defined(__KERNEL__)
|
||||
#if defined(CONFIG_PARAVIRT)
|
||||
# undef IA64_INTRINSIC_API
|
||||
# undef IA64_INTRINSIC_MACRO
|
||||
@@ -104,36 +21,5 @@ extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
|
||||
# endif
|
||||
#define IA64_INTRINSIC_MACRO(name) paravirt_ ## name
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/************************************************/
|
||||
/* Instructions paravirtualized for correctness */
|
||||
/************************************************/
|
||||
/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
|
||||
/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
|
||||
* is not currently used (though it may be in a long-format VHPT system!)
|
||||
*/
|
||||
#define ia64_fc IA64_INTRINSIC_API(fc)
|
||||
#define ia64_thash IA64_INTRINSIC_API(thash)
|
||||
#define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid)
|
||||
#define ia64_get_pmd IA64_INTRINSIC_API(get_pmd)
|
||||
|
||||
|
||||
/************************************************/
|
||||
/* Instructions paravirtualized for performance */
|
||||
/************************************************/
|
||||
#define ia64_ssm IA64_INTRINSIC_MACRO(ssm)
|
||||
#define ia64_rsm IA64_INTRINSIC_MACRO(rsm)
|
||||
#define ia64_getreg IA64_INTRINSIC_MACRO(getreg)
|
||||
#define ia64_setreg IA64_INTRINSIC_API(setreg)
|
||||
#define ia64_set_rr IA64_INTRINSIC_API(set_rr)
|
||||
#define ia64_get_rr IA64_INTRINSIC_API(get_rr)
|
||||
#define ia64_ptcga IA64_INTRINSIC_API(ptcga)
|
||||
#define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i)
|
||||
#define ia64_intrin_local_irq_restore \
|
||||
IA64_INTRINSIC_API(intrin_local_irq_restore)
|
||||
#define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4)
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_IA64_INTRINSICS_H */
|
||||
|
||||
@@ -1 +0,0 @@
|
||||
#include <asm-generic/ioctl.h>
|
||||
@@ -1,6 +0,0 @@
|
||||
#ifndef _ASM_IA64_IOCTLS_H
|
||||
#define _ASM_IA64_IOCTLS_H
|
||||
|
||||
#include <asm-generic/ioctls.h>
|
||||
|
||||
#endif /* _ASM_IA64_IOCTLS_H */
|
||||
@@ -1 +0,0 @@
|
||||
#include <asm-generic/ipcbuf.h>
|
||||
@@ -1,269 +0,0 @@
|
||||
#ifndef __ASM_IA64_KVM_H
|
||||
#define __ASM_IA64_KVM_H
|
||||
|
||||
/*
|
||||
* kvm structure definitions for ia64
|
||||
*
|
||||
* Copyright (C) 2007 Xiantao Zhang <xiantao.zhang@intel.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
|
||||
* Place - Suite 330, Boston, MA 02111-1307 USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioctl.h>
|
||||
|
||||
/* Select x86 specific features in <linux/kvm.h> */
|
||||
#define __KVM_HAVE_IOAPIC
|
||||
#define __KVM_HAVE_IRQ_LINE
|
||||
#define __KVM_HAVE_DEVICE_ASSIGNMENT
|
||||
|
||||
/* Architectural interrupt line count. */
|
||||
#define KVM_NR_INTERRUPTS 256
|
||||
|
||||
#define KVM_IOAPIC_NUM_PINS 48
|
||||
|
||||
struct kvm_ioapic_state {
|
||||
__u64 base_address;
|
||||
__u32 ioregsel;
|
||||
__u32 id;
|
||||
__u32 irr;
|
||||
__u32 pad;
|
||||
union {
|
||||
__u64 bits;
|
||||
struct {
|
||||
__u8 vector;
|
||||
__u8 delivery_mode:3;
|
||||
__u8 dest_mode:1;
|
||||
__u8 delivery_status:1;
|
||||
__u8 polarity:1;
|
||||
__u8 remote_irr:1;
|
||||
__u8 trig_mode:1;
|
||||
__u8 mask:1;
|
||||
__u8 reserve:7;
|
||||
__u8 reserved[4];
|
||||
__u8 dest_id;
|
||||
} fields;
|
||||
} redirtbl[KVM_IOAPIC_NUM_PINS];
|
||||
};
|
||||
|
||||
#define KVM_IRQCHIP_PIC_MASTER 0
|
||||
#define KVM_IRQCHIP_PIC_SLAVE 1
|
||||
#define KVM_IRQCHIP_IOAPIC 2
|
||||
#define KVM_NR_IRQCHIPS 3
|
||||
|
||||
#define KVM_CONTEXT_SIZE 8*1024
|
||||
|
||||
struct kvm_fpreg {
|
||||
union {
|
||||
unsigned long bits[2];
|
||||
long double __dummy; /* force 16-byte alignment */
|
||||
} u;
|
||||
};
|
||||
|
||||
union context {
|
||||
/* 8K size */
|
||||
char dummy[KVM_CONTEXT_SIZE];
|
||||
struct {
|
||||
unsigned long psr;
|
||||
unsigned long pr;
|
||||
unsigned long caller_unat;
|
||||
unsigned long pad;
|
||||
unsigned long gr[32];
|
||||
unsigned long ar[128];
|
||||
unsigned long br[8];
|
||||
unsigned long cr[128];
|
||||
unsigned long rr[8];
|
||||
unsigned long ibr[8];
|
||||
unsigned long dbr[8];
|
||||
unsigned long pkr[8];
|
||||
struct kvm_fpreg fr[128];
|
||||
};
|
||||
};
|
||||
|
||||
struct thash_data {
|
||||
union {
|
||||
struct {
|
||||
unsigned long p : 1; /* 0 */
|
||||
unsigned long rv1 : 1; /* 1 */
|
||||
unsigned long ma : 3; /* 2-4 */
|
||||
unsigned long a : 1; /* 5 */
|
||||
unsigned long d : 1; /* 6 */
|
||||
unsigned long pl : 2; /* 7-8 */
|
||||
unsigned long ar : 3; /* 9-11 */
|
||||
unsigned long ppn : 38; /* 12-49 */
|
||||
unsigned long rv2 : 2; /* 50-51 */
|
||||
unsigned long ed : 1; /* 52 */
|
||||
unsigned long ig1 : 11; /* 53-63 */
|
||||
};
|
||||
struct {
|
||||
unsigned long __rv1 : 53; /* 0-52 */
|
||||
unsigned long contiguous : 1; /*53 */
|
||||
unsigned long tc : 1; /* 54 TR or TC */
|
||||
unsigned long cl : 1;
|
||||
/* 55 I side or D side cache line */
|
||||
unsigned long len : 4; /* 56-59 */
|
||||
unsigned long io : 1; /* 60 entry is for io or not */
|
||||
unsigned long nomap : 1;
|
||||
/* 61 entry cann't be inserted into machine TLB.*/
|
||||
unsigned long checked : 1;
|
||||
/* 62 for VTLB/VHPT sanity check */
|
||||
unsigned long invalid : 1;
|
||||
/* 63 invalid entry */
|
||||
};
|
||||
unsigned long page_flags;
|
||||
}; /* same for VHPT and TLB */
|
||||
|
||||
union {
|
||||
struct {
|
||||
unsigned long rv3 : 2;
|
||||
unsigned long ps : 6;
|
||||
unsigned long key : 24;
|
||||
unsigned long rv4 : 32;
|
||||
};
|
||||
unsigned long itir;
|
||||
};
|
||||
union {
|
||||
struct {
|
||||
unsigned long ig2 : 12;
|
||||
unsigned long vpn : 49;
|
||||
unsigned long vrn : 3;
|
||||
};
|
||||
unsigned long ifa;
|
||||
unsigned long vadr;
|
||||
struct {
|
||||
unsigned long tag : 63;
|
||||
unsigned long ti : 1;
|
||||
};
|
||||
unsigned long etag;
|
||||
};
|
||||
union {
|
||||
struct thash_data *next;
|
||||
unsigned long rid;
|
||||
unsigned long gpaddr;
|
||||
};
|
||||
};
|
||||
|
||||
#define NITRS 8
|
||||
#define NDTRS 8
|
||||
|
||||
struct saved_vpd {
|
||||
unsigned long vhpi;
|
||||
unsigned long vgr[16];
|
||||
unsigned long vbgr[16];
|
||||
unsigned long vnat;
|
||||
unsigned long vbnat;
|
||||
unsigned long vcpuid[5];
|
||||
unsigned long vpsr;
|
||||
unsigned long vpr;
|
||||
union {
|
||||
unsigned long vcr[128];
|
||||
struct {
|
||||
unsigned long dcr;
|
||||
unsigned long itm;
|
||||
unsigned long iva;
|
||||
unsigned long rsv1[5];
|
||||
unsigned long pta;
|
||||
unsigned long rsv2[7];
|
||||
unsigned long ipsr;
|
||||
unsigned long isr;
|
||||
unsigned long rsv3;
|
||||
unsigned long iip;
|
||||
unsigned long ifa;
|
||||
unsigned long itir;
|
||||
unsigned long iipa;
|
||||
unsigned long ifs;
|
||||
unsigned long iim;
|
||||
unsigned long iha;
|
||||
unsigned long rsv4[38];
|
||||
unsigned long lid;
|
||||
unsigned long ivr;
|
||||
unsigned long tpr;
|
||||
unsigned long eoi;
|
||||
unsigned long irr[4];
|
||||
unsigned long itv;
|
||||
unsigned long pmv;
|
||||
unsigned long cmcv;
|
||||
unsigned long rsv5[5];
|
||||
unsigned long lrr0;
|
||||
unsigned long lrr1;
|
||||
unsigned long rsv6[46];
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
struct kvm_regs {
|
||||
struct saved_vpd vpd;
|
||||
/*Arch-regs*/
|
||||
int mp_state;
|
||||
unsigned long vmm_rr;
|
||||
/* TR and TC. */
|
||||
struct thash_data itrs[NITRS];
|
||||
struct thash_data dtrs[NDTRS];
|
||||
/* Bit is set if there is a tr/tc for the region. */
|
||||
unsigned char itr_regions;
|
||||
unsigned char dtr_regions;
|
||||
unsigned char tc_regions;
|
||||
|
||||
char irq_check;
|
||||
unsigned long saved_itc;
|
||||
unsigned long itc_check;
|
||||
unsigned long timer_check;
|
||||
unsigned long timer_pending;
|
||||
unsigned long last_itc;
|
||||
|
||||
unsigned long vrr[8];
|
||||
unsigned long ibr[8];
|
||||
unsigned long dbr[8];
|
||||
unsigned long insvc[4]; /* Interrupt in service. */
|
||||
unsigned long xtp;
|
||||
|
||||
unsigned long metaphysical_rr0; /* from kvm_arch (so is pinned) */
|
||||
unsigned long metaphysical_rr4; /* from kvm_arch (so is pinned) */
|
||||
unsigned long metaphysical_saved_rr0; /* from kvm_arch */
|
||||
unsigned long metaphysical_saved_rr4; /* from kvm_arch */
|
||||
unsigned long fp_psr; /*used for lazy float register */
|
||||
unsigned long saved_gp;
|
||||
/*for phycial emulation */
|
||||
|
||||
union context saved_guest;
|
||||
|
||||
unsigned long reserved[64]; /* for future use */
|
||||
};
|
||||
|
||||
struct kvm_sregs {
|
||||
};
|
||||
|
||||
struct kvm_fpu {
|
||||
};
|
||||
|
||||
#define KVM_IA64_VCPU_STACK_SHIFT 16
|
||||
#define KVM_IA64_VCPU_STACK_SIZE (1UL << KVM_IA64_VCPU_STACK_SHIFT)
|
||||
|
||||
struct kvm_ia64_vcpu_stack {
|
||||
unsigned char stack[KVM_IA64_VCPU_STACK_SIZE];
|
||||
};
|
||||
|
||||
struct kvm_debug_exit_arch {
|
||||
};
|
||||
|
||||
/* for KVM_SET_GUEST_DEBUG */
|
||||
struct kvm_guest_debug_arch {
|
||||
};
|
||||
|
||||
/* definition of registers in kvm_run */
|
||||
struct kvm_sync_regs {
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -1,6 +1,3 @@
|
||||
#ifndef __IA64_KVM_PARA_H
|
||||
#define __IA64_KVM_PARA_H
|
||||
|
||||
/*
|
||||
* Copyright (C) 2007 Xiantao Zhang <xiantao.zhang@intel.com>
|
||||
*
|
||||
@@ -18,8 +15,11 @@
|
||||
* Place - Suite 330, Boston, MA 02111-1307 USA.
|
||||
*
|
||||
*/
|
||||
#ifndef __IA64_KVM_PARA_H
|
||||
#define __IA64_KVM_PARA_H
|
||||
|
||||
#include <uapi/asm/kvm_para.h>
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
static inline unsigned int kvm_arch_para_features(void)
|
||||
{
|
||||
@@ -32,5 +32,3 @@ static inline bool kvm_check_and_clear_guest_paused(void)
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,23 +1,17 @@
|
||||
#ifndef _ASM_IA64_MMAN_H
|
||||
#define _ASM_IA64_MMAN_H
|
||||
|
||||
/*
|
||||
* Based on <asm-i386/mman.h>.
|
||||
*
|
||||
* Modified 1998-2000, 2002
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
|
||||
*/
|
||||
#ifndef _ASM_IA64_MMAN_H
|
||||
#define _ASM_IA64_MMAN_H
|
||||
|
||||
#include <asm-generic/mman.h>
|
||||
#include <uapi/asm/mman.h>
|
||||
|
||||
#define MAP_GROWSUP 0x0200 /* register stack-like segment */
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#ifndef __ASSEMBLY__
|
||||
#define arch_mmap_check ia64_mmap_check
|
||||
int ia64_mmap_check(unsigned long addr, unsigned long len,
|
||||
unsigned long flags);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_IA64_MMAN_H */
|
||||
|
||||
@@ -1,27 +0,0 @@
|
||||
#ifndef _ASM_IA64_MSGBUF_H
|
||||
#define _ASM_IA64_MSGBUF_H
|
||||
|
||||
/*
|
||||
* The msqid64_ds structure for IA-64 architecture.
|
||||
* Note extra padding because this structure is passed back and forth
|
||||
* between kernel and user space.
|
||||
*
|
||||
* Pad space is left for:
|
||||
* - 2 miscellaneous 64-bit values
|
||||
*/
|
||||
|
||||
struct msqid64_ds {
|
||||
struct ipc64_perm msg_perm;
|
||||
__kernel_time_t msg_stime; /* last msgsnd time */
|
||||
__kernel_time_t msg_rtime; /* last msgrcv time */
|
||||
__kernel_time_t msg_ctime; /* last change time */
|
||||
unsigned long msg_cbytes; /* current number of bytes on queue */
|
||||
unsigned long msg_qnum; /* number of messages in queue */
|
||||
unsigned long msg_qbytes; /* max number of bytes on queue */
|
||||
__kernel_pid_t msg_lspid; /* pid of last msgsnd */
|
||||
__kernel_pid_t msg_lrpid; /* last receive pid */
|
||||
unsigned long __unused1;
|
||||
unsigned long __unused2;
|
||||
};
|
||||
|
||||
#endif /* _ASM_IA64_MSGBUF_H */
|
||||
@@ -1,6 +1,3 @@
|
||||
#ifndef _ASM_IA64_PARAM_H
|
||||
#define _ASM_IA64_PARAM_H
|
||||
|
||||
/*
|
||||
* Fundamental kernel parameters.
|
||||
*
|
||||
@@ -9,25 +6,12 @@
|
||||
* Modified 1998, 1999, 2002-2003
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
|
||||
*/
|
||||
#ifndef _ASM_IA64_PARAM_H
|
||||
#define _ASM_IA64_PARAM_H
|
||||
|
||||
#define EXEC_PAGESIZE 65536
|
||||
#include <uapi/asm/param.h>
|
||||
|
||||
#ifndef NOGROUP
|
||||
# define NOGROUP (-1)
|
||||
#endif
|
||||
|
||||
#define MAXHOSTNAMELEN 64 /* max length of hostname */
|
||||
|
||||
#ifdef __KERNEL__
|
||||
# define HZ CONFIG_HZ
|
||||
# define USER_HZ HZ
|
||||
# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */
|
||||
#else
|
||||
/*
|
||||
* Technically, this is wrong, but some old apps still refer to it. The proper way to
|
||||
* get the HZ value is via sysconf(_SC_CLK_TCK).
|
||||
*/
|
||||
# define HZ 1024
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_IA64_PARAM_H */
|
||||
|
||||
@@ -2,178 +2,11 @@
|
||||
* Copyright (C) 2001-2003 Hewlett-Packard Co
|
||||
* Stephane Eranian <eranian@hpl.hp.com>
|
||||
*/
|
||||
|
||||
#ifndef _ASM_IA64_PERFMON_H
|
||||
#define _ASM_IA64_PERFMON_H
|
||||
|
||||
/*
|
||||
* perfmon commands supported on all CPU models
|
||||
*/
|
||||
#define PFM_WRITE_PMCS 0x01
|
||||
#define PFM_WRITE_PMDS 0x02
|
||||
#define PFM_READ_PMDS 0x03
|
||||
#define PFM_STOP 0x04
|
||||
#define PFM_START 0x05
|
||||
#define PFM_ENABLE 0x06 /* obsolete */
|
||||
#define PFM_DISABLE 0x07 /* obsolete */
|
||||
#define PFM_CREATE_CONTEXT 0x08
|
||||
#define PFM_DESTROY_CONTEXT 0x09 /* obsolete use close() */
|
||||
#define PFM_RESTART 0x0a
|
||||
#define PFM_PROTECT_CONTEXT 0x0b /* obsolete */
|
||||
#define PFM_GET_FEATURES 0x0c
|
||||
#define PFM_DEBUG 0x0d
|
||||
#define PFM_UNPROTECT_CONTEXT 0x0e /* obsolete */
|
||||
#define PFM_GET_PMC_RESET_VAL 0x0f
|
||||
#define PFM_LOAD_CONTEXT 0x10
|
||||
#define PFM_UNLOAD_CONTEXT 0x11
|
||||
#include <uapi/asm/perfmon.h>
|
||||
|
||||
/*
|
||||
* PMU model specific commands (may not be supported on all PMU models)
|
||||
*/
|
||||
#define PFM_WRITE_IBRS 0x20
|
||||
#define PFM_WRITE_DBRS 0x21
|
||||
|
||||
/*
|
||||
* context flags
|
||||
*/
|
||||
#define PFM_FL_NOTIFY_BLOCK 0x01 /* block task on user level notifications */
|
||||
#define PFM_FL_SYSTEM_WIDE 0x02 /* create a system wide context */
|
||||
#define PFM_FL_OVFL_NO_MSG 0x80 /* do not post overflow/end messages for notification */
|
||||
|
||||
/*
|
||||
* event set flags
|
||||
*/
|
||||
#define PFM_SETFL_EXCL_IDLE 0x01 /* exclude idle task (syswide only) XXX: DO NOT USE YET */
|
||||
|
||||
/*
|
||||
* PMC flags
|
||||
*/
|
||||
#define PFM_REGFL_OVFL_NOTIFY 0x1 /* send notification on overflow */
|
||||
#define PFM_REGFL_RANDOM 0x2 /* randomize sampling interval */
|
||||
|
||||
/*
|
||||
* PMD/PMC/IBR/DBR return flags (ignored on input)
|
||||
*
|
||||
* Those flags are used on output and must be checked in case EAGAIN is returned
|
||||
* by any of the calls using a pfarg_reg_t or pfarg_dbreg_t structure.
|
||||
*/
|
||||
#define PFM_REG_RETFL_NOTAVAIL (1UL<<31) /* set if register is implemented but not available */
|
||||
#define PFM_REG_RETFL_EINVAL (1UL<<30) /* set if register entry is invalid */
|
||||
#define PFM_REG_RETFL_MASK (PFM_REG_RETFL_NOTAVAIL|PFM_REG_RETFL_EINVAL)
|
||||
|
||||
#define PFM_REG_HAS_ERROR(flag) (((flag) & PFM_REG_RETFL_MASK) != 0)
|
||||
|
||||
typedef unsigned char pfm_uuid_t[16]; /* custom sampling buffer identifier type */
|
||||
|
||||
/*
|
||||
* Request structure used to define a context
|
||||
*/
|
||||
typedef struct {
|
||||
pfm_uuid_t ctx_smpl_buf_id; /* which buffer format to use (if needed) */
|
||||
unsigned long ctx_flags; /* noblock/block */
|
||||
unsigned short ctx_nextra_sets; /* number of extra event sets (you always get 1) */
|
||||
unsigned short ctx_reserved1; /* for future use */
|
||||
int ctx_fd; /* return arg: unique identification for context */
|
||||
void *ctx_smpl_vaddr; /* return arg: virtual address of sampling buffer, is used */
|
||||
unsigned long ctx_reserved2[11];/* for future use */
|
||||
} pfarg_context_t;
|
||||
|
||||
/*
|
||||
* Request structure used to write/read a PMC or PMD
|
||||
*/
|
||||
typedef struct {
|
||||
unsigned int reg_num; /* which register */
|
||||
unsigned short reg_set; /* event set for this register */
|
||||
unsigned short reg_reserved1; /* for future use */
|
||||
|
||||
unsigned long reg_value; /* initial pmc/pmd value */
|
||||
unsigned long reg_flags; /* input: pmc/pmd flags, return: reg error */
|
||||
|
||||
unsigned long reg_long_reset; /* reset after buffer overflow notification */
|
||||
unsigned long reg_short_reset; /* reset after counter overflow */
|
||||
|
||||
unsigned long reg_reset_pmds[4]; /* which other counters to reset on overflow */
|
||||
unsigned long reg_random_seed; /* seed value when randomization is used */
|
||||
unsigned long reg_random_mask; /* bitmask used to limit random value */
|
||||
unsigned long reg_last_reset_val;/* return: PMD last reset value */
|
||||
|
||||
unsigned long reg_smpl_pmds[4]; /* which pmds are accessed when PMC overflows */
|
||||
unsigned long reg_smpl_eventid; /* opaque sampling event identifier */
|
||||
|
||||
unsigned long reg_reserved2[3]; /* for future use */
|
||||
} pfarg_reg_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned int dbreg_num; /* which debug register */
|
||||
unsigned short dbreg_set; /* event set for this register */
|
||||
unsigned short dbreg_reserved1; /* for future use */
|
||||
unsigned long dbreg_value; /* value for debug register */
|
||||
unsigned long dbreg_flags; /* return: dbreg error */
|
||||
unsigned long dbreg_reserved2[1]; /* for future use */
|
||||
} pfarg_dbreg_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned int ft_version; /* perfmon: major [16-31], minor [0-15] */
|
||||
unsigned int ft_reserved; /* reserved for future use */
|
||||
unsigned long reserved[4]; /* for future use */
|
||||
} pfarg_features_t;
|
||||
|
||||
typedef struct {
|
||||
pid_t load_pid; /* process to load the context into */
|
||||
unsigned short load_set; /* first event set to load */
|
||||
unsigned short load_reserved1; /* for future use */
|
||||
unsigned long load_reserved2[3]; /* for future use */
|
||||
} pfarg_load_t;
|
||||
|
||||
typedef struct {
|
||||
int msg_type; /* generic message header */
|
||||
int msg_ctx_fd; /* generic message header */
|
||||
unsigned long msg_ovfl_pmds[4]; /* which PMDs overflowed */
|
||||
unsigned short msg_active_set; /* active set at the time of overflow */
|
||||
unsigned short msg_reserved1; /* for future use */
|
||||
unsigned int msg_reserved2; /* for future use */
|
||||
unsigned long msg_tstamp; /* for perf tuning/debug */
|
||||
} pfm_ovfl_msg_t;
|
||||
|
||||
typedef struct {
|
||||
int msg_type; /* generic message header */
|
||||
int msg_ctx_fd; /* generic message header */
|
||||
unsigned long msg_tstamp; /* for perf tuning */
|
||||
} pfm_end_msg_t;
|
||||
|
||||
typedef struct {
|
||||
int msg_type; /* type of the message */
|
||||
int msg_ctx_fd; /* unique identifier for the context */
|
||||
unsigned long msg_tstamp; /* for perf tuning */
|
||||
} pfm_gen_msg_t;
|
||||
|
||||
#define PFM_MSG_OVFL 1 /* an overflow happened */
|
||||
#define PFM_MSG_END 2 /* task to which context was attached ended */
|
||||
|
||||
typedef union {
|
||||
pfm_ovfl_msg_t pfm_ovfl_msg;
|
||||
pfm_end_msg_t pfm_end_msg;
|
||||
pfm_gen_msg_t pfm_gen_msg;
|
||||
} pfm_msg_t;
|
||||
|
||||
/*
|
||||
* Define the version numbers for both perfmon as a whole and the sampling buffer format.
|
||||
*/
|
||||
#define PFM_VERSION_MAJ 2U
|
||||
#define PFM_VERSION_MIN 0U
|
||||
#define PFM_VERSION (((PFM_VERSION_MAJ&0xffff)<<16)|(PFM_VERSION_MIN & 0xffff))
|
||||
#define PFM_VERSION_MAJOR(x) (((x)>>16) & 0xffff)
|
||||
#define PFM_VERSION_MINOR(x) ((x) & 0xffff)
|
||||
|
||||
|
||||
/*
|
||||
* miscellaneous architected definitions
|
||||
*/
|
||||
#define PMU_FIRST_COUNTER 4 /* first counting monitor (PMC/PMD) */
|
||||
#define PMU_MAX_PMCS 256 /* maximum architected number of PMC registers */
|
||||
#define PMU_MAX_PMDS 256 /* maximum architected number of PMD registers */
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
extern long perfmonctl(int fd, int cmd, void *arg, int narg);
|
||||
|
||||
@@ -274,6 +107,4 @@ typedef struct {
|
||||
extern pfm_sysctl_t pfm_sysctl;
|
||||
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _ASM_IA64_PERFMON_H */
|
||||
|
||||
@@ -1,83 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2002-2003 Hewlett-Packard Co
|
||||
* Stephane Eranian <eranian@hpl.hp.com>
|
||||
*
|
||||
* This file implements the default sampling buffer format
|
||||
* for Linux/ia64 perfmon subsystem.
|
||||
*/
|
||||
#ifndef __PERFMON_DEFAULT_SMPL_H__
|
||||
#define __PERFMON_DEFAULT_SMPL_H__ 1
|
||||
|
||||
#define PFM_DEFAULT_SMPL_UUID { \
|
||||
0x4d, 0x72, 0xbe, 0xc0, 0x06, 0x64, 0x41, 0x43, 0x82, 0xb4, 0xd3, 0xfd, 0x27, 0x24, 0x3c, 0x97}
|
||||
|
||||
/*
|
||||
* format specific parameters (passed at context creation)
|
||||
*/
|
||||
typedef struct {
|
||||
unsigned long buf_size; /* size of the buffer in bytes */
|
||||
unsigned int flags; /* buffer specific flags */
|
||||
unsigned int res1; /* for future use */
|
||||
unsigned long reserved[2]; /* for future use */
|
||||
} pfm_default_smpl_arg_t;
|
||||
|
||||
/*
|
||||
* combined context+format specific structure. Can be passed
|
||||
* to PFM_CONTEXT_CREATE
|
||||
*/
|
||||
typedef struct {
|
||||
pfarg_context_t ctx_arg;
|
||||
pfm_default_smpl_arg_t buf_arg;
|
||||
} pfm_default_smpl_ctx_arg_t;
|
||||
|
||||
/*
|
||||
* This header is at the beginning of the sampling buffer returned to the user.
|
||||
* It is directly followed by the first record.
|
||||
*/
|
||||
typedef struct {
|
||||
unsigned long hdr_count; /* how many valid entries */
|
||||
unsigned long hdr_cur_offs; /* current offset from top of buffer */
|
||||
unsigned long hdr_reserved2; /* reserved for future use */
|
||||
|
||||
unsigned long hdr_overflows; /* how many times the buffer overflowed */
|
||||
unsigned long hdr_buf_size; /* how many bytes in the buffer */
|
||||
|
||||
unsigned int hdr_version; /* contains perfmon version (smpl format diffs) */
|
||||
unsigned int hdr_reserved1; /* for future use */
|
||||
unsigned long hdr_reserved[10]; /* for future use */
|
||||
} pfm_default_smpl_hdr_t;
|
||||
|
||||
/*
|
||||
* Entry header in the sampling buffer. The header is directly followed
|
||||
* with the values of the PMD registers of interest saved in increasing
|
||||
* index order: PMD4, PMD5, and so on. How many PMDs are present depends
|
||||
* on how the session was programmed.
|
||||
*
|
||||
* In the case where multiple counters overflow at the same time, multiple
|
||||
* entries are written consecutively.
|
||||
*
|
||||
* last_reset_value member indicates the initial value of the overflowed PMD.
|
||||
*/
|
||||
typedef struct {
|
||||
int pid; /* thread id (for NPTL, this is gettid()) */
|
||||
unsigned char reserved1[3]; /* reserved for future use */
|
||||
unsigned char ovfl_pmd; /* index of overflowed PMD */
|
||||
|
||||
unsigned long last_reset_val; /* initial value of overflowed PMD */
|
||||
unsigned long ip; /* where did the overflow interrupt happened */
|
||||
unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */
|
||||
|
||||
unsigned short cpu; /* cpu on which the overflow occurred */
|
||||
unsigned short set; /* event set active when overflow occurred */
|
||||
int tgid; /* thread group id (for NPTL, this is getpid()) */
|
||||
} pfm_default_smpl_entry_t;
|
||||
|
||||
#define PFM_DEFAULT_MAX_PMDS 64 /* how many pmds supported by data structures (sizeof(unsigned long) */
|
||||
#define PFM_DEFAULT_MAX_ENTRY_SIZE (sizeof(pfm_default_smpl_entry_t)+(sizeof(unsigned long)*PFM_DEFAULT_MAX_PMDS))
|
||||
#define PFM_DEFAULT_SMPL_MIN_BUF_SIZE (sizeof(pfm_default_smpl_hdr_t)+PFM_DEFAULT_MAX_ENTRY_SIZE)
|
||||
|
||||
#define PFM_DEFAULT_SMPL_VERSION_MAJ 2U
|
||||
#define PFM_DEFAULT_SMPL_VERSION_MIN 0U
|
||||
#define PFM_DEFAULT_SMPL_VERSION (((PFM_DEFAULT_SMPL_VERSION_MAJ&0xffff)<<16)|(PFM_DEFAULT_SMPL_VERSION_MIN & 0xffff))
|
||||
|
||||
#endif /* __PERFMON_DEFAULT_SMPL_H__ */
|
||||
@@ -1 +0,0 @@
|
||||
#include <asm-generic/poll.h>
|
||||
@@ -1,8 +0,0 @@
|
||||
#ifndef _ASM_IA64_POSIX_TYPES_H
|
||||
#define _ASM_IA64_POSIX_TYPES_H
|
||||
|
||||
typedef unsigned long __kernel_sigset_t; /* at least 32 bits */
|
||||
|
||||
#include <asm-generic/posix_types.h>
|
||||
|
||||
#endif /* _ASM_IA64_POSIX_TYPES_H */
|
||||
@@ -1,6 +1,3 @@
|
||||
#ifndef _ASM_IA64_PTRACE_H
|
||||
#define _ASM_IA64_PTRACE_H
|
||||
|
||||
/*
|
||||
* Copyright (C) 1998-2004 Hewlett-Packard Co
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>
|
||||
@@ -15,52 +12,13 @@
|
||||
* 6/17/99 D. Mosberger added second unat member to "struct switch_stack"
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* When a user process is blocked, its state looks as follows:
|
||||
*
|
||||
* +----------------------+ ------- IA64_STK_OFFSET
|
||||
* | | ^
|
||||
* | struct pt_regs | |
|
||||
* | | |
|
||||
* +----------------------+ |
|
||||
* | | |
|
||||
* | memory stack | |
|
||||
* | (growing downwards) | |
|
||||
* //.....................// |
|
||||
* |
|
||||
* //.....................// |
|
||||
* | | |
|
||||
* +----------------------+ |
|
||||
* | struct switch_stack | |
|
||||
* | | |
|
||||
* +----------------------+ |
|
||||
* | | |
|
||||
* //.....................// |
|
||||
* |
|
||||
* //.....................// |
|
||||
* | | |
|
||||
* | register stack | |
|
||||
* | (growing upwards) | |
|
||||
* | | |
|
||||
* +----------------------+ | --- IA64_RBS_OFFSET
|
||||
* | struct thread_info | | ^
|
||||
* +----------------------+ | |
|
||||
* | | | |
|
||||
* | struct task_struct | | |
|
||||
* current -> | | | |
|
||||
* +----------------------+ -------
|
||||
*
|
||||
* Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
|
||||
* This is because ar.ec is saved as part of ar.pfs.
|
||||
*/
|
||||
#ifndef _ASM_IA64_PTRACE_H
|
||||
#define _ASM_IA64_PTRACE_H
|
||||
|
||||
|
||||
#include <asm/fpu.h>
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#ifndef ASM_OFFSETS_C
|
||||
#include <asm/asm-offsets.h>
|
||||
#endif
|
||||
#include <uapi/asm/ptrace.h>
|
||||
|
||||
/*
|
||||
* Base-2 logarithm of number of pages to allocate per task structure
|
||||
@@ -81,155 +39,8 @@
|
||||
|
||||
#define KERNEL_STACK_SIZE IA64_STK_OFFSET
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
* This struct defines the way the registers are saved on system
|
||||
* calls.
|
||||
*
|
||||
* We don't save all floating point register because the kernel
|
||||
* is compiled to use only a very small subset, so the other are
|
||||
* untouched.
|
||||
*
|
||||
* THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
|
||||
* (because the memory stack pointer MUST ALWAYS be aligned this way)
|
||||
*
|
||||
*/
|
||||
struct pt_regs {
|
||||
/* The following registers are saved by SAVE_MIN: */
|
||||
unsigned long b6; /* scratch */
|
||||
unsigned long b7; /* scratch */
|
||||
|
||||
unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
|
||||
unsigned long ar_ssd; /* reserved for future use (scratch) */
|
||||
|
||||
unsigned long r8; /* scratch (return value register 0) */
|
||||
unsigned long r9; /* scratch (return value register 1) */
|
||||
unsigned long r10; /* scratch (return value register 2) */
|
||||
unsigned long r11; /* scratch (return value register 3) */
|
||||
|
||||
unsigned long cr_ipsr; /* interrupted task's psr */
|
||||
unsigned long cr_iip; /* interrupted task's instruction pointer */
|
||||
/*
|
||||
* interrupted task's function state; if bit 63 is cleared, it
|
||||
* contains syscall's ar.pfs.pfm:
|
||||
*/
|
||||
unsigned long cr_ifs;
|
||||
|
||||
unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
|
||||
unsigned long ar_pfs; /* prev function state */
|
||||
unsigned long ar_rsc; /* RSE configuration */
|
||||
/* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
|
||||
unsigned long ar_rnat; /* RSE NaT */
|
||||
unsigned long ar_bspstore; /* RSE bspstore */
|
||||
|
||||
unsigned long pr; /* 64 predicate registers (1 bit each) */
|
||||
unsigned long b0; /* return pointer (bp) */
|
||||
unsigned long loadrs; /* size of dirty partition << 16 */
|
||||
|
||||
unsigned long r1; /* the gp pointer */
|
||||
unsigned long r12; /* interrupted task's memory stack pointer */
|
||||
unsigned long r13; /* thread pointer */
|
||||
|
||||
unsigned long ar_fpsr; /* floating point status (preserved) */
|
||||
unsigned long r15; /* scratch */
|
||||
|
||||
/* The remaining registers are NOT saved for system calls. */
|
||||
|
||||
unsigned long r14; /* scratch */
|
||||
unsigned long r2; /* scratch */
|
||||
unsigned long r3; /* scratch */
|
||||
|
||||
/* The following registers are saved by SAVE_REST: */
|
||||
unsigned long r16; /* scratch */
|
||||
unsigned long r17; /* scratch */
|
||||
unsigned long r18; /* scratch */
|
||||
unsigned long r19; /* scratch */
|
||||
unsigned long r20; /* scratch */
|
||||
unsigned long r21; /* scratch */
|
||||
unsigned long r22; /* scratch */
|
||||
unsigned long r23; /* scratch */
|
||||
unsigned long r24; /* scratch */
|
||||
unsigned long r25; /* scratch */
|
||||
unsigned long r26; /* scratch */
|
||||
unsigned long r27; /* scratch */
|
||||
unsigned long r28; /* scratch */
|
||||
unsigned long r29; /* scratch */
|
||||
unsigned long r30; /* scratch */
|
||||
unsigned long r31; /* scratch */
|
||||
|
||||
unsigned long ar_ccv; /* compare/exchange value (scratch) */
|
||||
|
||||
/*
|
||||
* Floating point registers that the kernel considers scratch:
|
||||
*/
|
||||
struct ia64_fpreg f6; /* scratch */
|
||||
struct ia64_fpreg f7; /* scratch */
|
||||
struct ia64_fpreg f8; /* scratch */
|
||||
struct ia64_fpreg f9; /* scratch */
|
||||
struct ia64_fpreg f10; /* scratch */
|
||||
struct ia64_fpreg f11; /* scratch */
|
||||
};
|
||||
|
||||
/*
|
||||
* This structure contains the addition registers that need to
|
||||
* preserved across a context switch. This generally consists of
|
||||
* "preserved" registers.
|
||||
*/
|
||||
struct switch_stack {
|
||||
unsigned long caller_unat; /* user NaT collection register (preserved) */
|
||||
unsigned long ar_fpsr; /* floating-point status register */
|
||||
|
||||
struct ia64_fpreg f2; /* preserved */
|
||||
struct ia64_fpreg f3; /* preserved */
|
||||
struct ia64_fpreg f4; /* preserved */
|
||||
struct ia64_fpreg f5; /* preserved */
|
||||
|
||||
struct ia64_fpreg f12; /* scratch, but untouched by kernel */
|
||||
struct ia64_fpreg f13; /* scratch, but untouched by kernel */
|
||||
struct ia64_fpreg f14; /* scratch, but untouched by kernel */
|
||||
struct ia64_fpreg f15; /* scratch, but untouched by kernel */
|
||||
struct ia64_fpreg f16; /* preserved */
|
||||
struct ia64_fpreg f17; /* preserved */
|
||||
struct ia64_fpreg f18; /* preserved */
|
||||
struct ia64_fpreg f19; /* preserved */
|
||||
struct ia64_fpreg f20; /* preserved */
|
||||
struct ia64_fpreg f21; /* preserved */
|
||||
struct ia64_fpreg f22; /* preserved */
|
||||
struct ia64_fpreg f23; /* preserved */
|
||||
struct ia64_fpreg f24; /* preserved */
|
||||
struct ia64_fpreg f25; /* preserved */
|
||||
struct ia64_fpreg f26; /* preserved */
|
||||
struct ia64_fpreg f27; /* preserved */
|
||||
struct ia64_fpreg f28; /* preserved */
|
||||
struct ia64_fpreg f29; /* preserved */
|
||||
struct ia64_fpreg f30; /* preserved */
|
||||
struct ia64_fpreg f31; /* preserved */
|
||||
|
||||
unsigned long r4; /* preserved */
|
||||
unsigned long r5; /* preserved */
|
||||
unsigned long r6; /* preserved */
|
||||
unsigned long r7; /* preserved */
|
||||
|
||||
unsigned long b0; /* so we can force a direct return in copy_thread */
|
||||
unsigned long b1;
|
||||
unsigned long b2;
|
||||
unsigned long b3;
|
||||
unsigned long b4;
|
||||
unsigned long b5;
|
||||
|
||||
unsigned long ar_pfs; /* previous function state */
|
||||
unsigned long ar_lc; /* loop counter (preserved) */
|
||||
unsigned long ar_unat; /* NaT bits for r4-r7 */
|
||||
unsigned long ar_rnat; /* RSE NaT collection register */
|
||||
unsigned long ar_bspstore; /* RSE dirty base (preserved) */
|
||||
unsigned long pr; /* 64 predicate registers (1 bit each) */
|
||||
};
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <asm/current.h>
|
||||
#include <asm/page.h>
|
||||
|
||||
@@ -331,46 +142,5 @@ static inline long regs_return_value(struct pt_regs *regs)
|
||||
#define arch_has_single_step() (1)
|
||||
#define arch_has_block_step() (1)
|
||||
|
||||
#endif /* !__KERNEL__ */
|
||||
|
||||
/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
|
||||
struct pt_all_user_regs {
|
||||
unsigned long nat;
|
||||
unsigned long cr_iip;
|
||||
unsigned long cfm;
|
||||
unsigned long cr_ipsr;
|
||||
unsigned long pr;
|
||||
|
||||
unsigned long gr[32];
|
||||
unsigned long br[8];
|
||||
unsigned long ar[128];
|
||||
struct ia64_fpreg fr[128];
|
||||
};
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
/* indices to application-registers array in pt_all_user_regs */
|
||||
#define PT_AUR_RSC 16
|
||||
#define PT_AUR_BSP 17
|
||||
#define PT_AUR_BSPSTORE 18
|
||||
#define PT_AUR_RNAT 19
|
||||
#define PT_AUR_CCV 32
|
||||
#define PT_AUR_UNAT 36
|
||||
#define PT_AUR_FPSR 40
|
||||
#define PT_AUR_PFS 64
|
||||
#define PT_AUR_LC 65
|
||||
#define PT_AUR_EC 66
|
||||
|
||||
/*
|
||||
* The numbers chosen here are somewhat arbitrary but absolutely MUST
|
||||
* not overlap with any of the number assigned in <linux/ptrace.h>.
|
||||
*/
|
||||
#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
|
||||
#define PTRACE_OLD_GETSIGINFO 13 /* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>) */
|
||||
#define PTRACE_OLD_SETSIGINFO 14 /* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>) */
|
||||
#define PTRACE_GETREGS 18 /* get all registers (pt_all_user_regs) in one shot */
|
||||
#define PTRACE_SETREGS 19 /* set all registers (pt_all_user_regs) in one shot */
|
||||
|
||||
#define PTRACE_OLDSETOPTIONS 21
|
||||
|
||||
#endif /* _ASM_IA64_PTRACE_H */
|
||||
|
||||
@@ -1,268 +0,0 @@
|
||||
#ifndef _ASM_IA64_PTRACE_OFFSETS_H
|
||||
#define _ASM_IA64_PTRACE_OFFSETS_H
|
||||
|
||||
/*
|
||||
* Copyright (C) 1999, 2003 Hewlett-Packard Co
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>
|
||||
*/
|
||||
/*
|
||||
* The "uarea" that can be accessed via PEEKUSER and POKEUSER is a
|
||||
* virtual structure that would have the following definition:
|
||||
*
|
||||
* struct uarea {
|
||||
* struct ia64_fpreg fph[96]; // f32-f127
|
||||
* unsigned long nat_bits;
|
||||
* unsigned long empty1;
|
||||
* struct ia64_fpreg f2; // f2-f5
|
||||
* :
|
||||
* struct ia64_fpreg f5;
|
||||
* struct ia64_fpreg f10; // f10-f31
|
||||
* :
|
||||
* struct ia64_fpreg f31;
|
||||
* unsigned long r4; // r4-r7
|
||||
* :
|
||||
* unsigned long r7;
|
||||
* unsigned long b1; // b1-b5
|
||||
* :
|
||||
* unsigned long b5;
|
||||
* unsigned long ar_ec;
|
||||
* unsigned long ar_lc;
|
||||
* unsigned long empty2[5];
|
||||
* unsigned long cr_ipsr;
|
||||
* unsigned long cr_iip;
|
||||
* unsigned long cfm;
|
||||
* unsigned long ar_unat;
|
||||
* unsigned long ar_pfs;
|
||||
* unsigned long ar_rsc;
|
||||
* unsigned long ar_rnat;
|
||||
* unsigned long ar_bspstore;
|
||||
* unsigned long pr;
|
||||
* unsigned long b6;
|
||||
* unsigned long ar_bsp;
|
||||
* unsigned long r1;
|
||||
* unsigned long r2;
|
||||
* unsigned long r3;
|
||||
* unsigned long r12;
|
||||
* unsigned long r13;
|
||||
* unsigned long r14;
|
||||
* unsigned long r15;
|
||||
* unsigned long r8;
|
||||
* unsigned long r9;
|
||||
* unsigned long r10;
|
||||
* unsigned long r11;
|
||||
* unsigned long r16;
|
||||
* :
|
||||
* unsigned long r31;
|
||||
* unsigned long ar_ccv;
|
||||
* unsigned long ar_fpsr;
|
||||
* unsigned long b0;
|
||||
* unsigned long b7;
|
||||
* unsigned long f6;
|
||||
* unsigned long f7;
|
||||
* unsigned long f8;
|
||||
* unsigned long f9;
|
||||
* unsigned long ar_csd;
|
||||
* unsigned long ar_ssd;
|
||||
* unsigned long rsvd1[710];
|
||||
* unsigned long dbr[8];
|
||||
* unsigned long rsvd2[504];
|
||||
* unsigned long ibr[8];
|
||||
* unsigned long rsvd3[504];
|
||||
* unsigned long pmd[4];
|
||||
* }
|
||||
*/
|
||||
|
||||
/* fph: */
|
||||
#define PT_F32 0x0000
|
||||
#define PT_F33 0x0010
|
||||
#define PT_F34 0x0020
|
||||
#define PT_F35 0x0030
|
||||
#define PT_F36 0x0040
|
||||
#define PT_F37 0x0050
|
||||
#define PT_F38 0x0060
|
||||
#define PT_F39 0x0070
|
||||
#define PT_F40 0x0080
|
||||
#define PT_F41 0x0090
|
||||
#define PT_F42 0x00a0
|
||||
#define PT_F43 0x00b0
|
||||
#define PT_F44 0x00c0
|
||||
#define PT_F45 0x00d0
|
||||
#define PT_F46 0x00e0
|
||||
#define PT_F47 0x00f0
|
||||
#define PT_F48 0x0100
|
||||
#define PT_F49 0x0110
|
||||
#define PT_F50 0x0120
|
||||
#define PT_F51 0x0130
|
||||
#define PT_F52 0x0140
|
||||
#define PT_F53 0x0150
|
||||
#define PT_F54 0x0160
|
||||
#define PT_F55 0x0170
|
||||
#define PT_F56 0x0180
|
||||
#define PT_F57 0x0190
|
||||
#define PT_F58 0x01a0
|
||||
#define PT_F59 0x01b0
|
||||
#define PT_F60 0x01c0
|
||||
#define PT_F61 0x01d0
|
||||
#define PT_F62 0x01e0
|
||||
#define PT_F63 0x01f0
|
||||
#define PT_F64 0x0200
|
||||
#define PT_F65 0x0210
|
||||
#define PT_F66 0x0220
|
||||
#define PT_F67 0x0230
|
||||
#define PT_F68 0x0240
|
||||
#define PT_F69 0x0250
|
||||
#define PT_F70 0x0260
|
||||
#define PT_F71 0x0270
|
||||
#define PT_F72 0x0280
|
||||
#define PT_F73 0x0290
|
||||
#define PT_F74 0x02a0
|
||||
#define PT_F75 0x02b0
|
||||
#define PT_F76 0x02c0
|
||||
#define PT_F77 0x02d0
|
||||
#define PT_F78 0x02e0
|
||||
#define PT_F79 0x02f0
|
||||
#define PT_F80 0x0300
|
||||
#define PT_F81 0x0310
|
||||
#define PT_F82 0x0320
|
||||
#define PT_F83 0x0330
|
||||
#define PT_F84 0x0340
|
||||
#define PT_F85 0x0350
|
||||
#define PT_F86 0x0360
|
||||
#define PT_F87 0x0370
|
||||
#define PT_F88 0x0380
|
||||
#define PT_F89 0x0390
|
||||
#define PT_F90 0x03a0
|
||||
#define PT_F91 0x03b0
|
||||
#define PT_F92 0x03c0
|
||||
#define PT_F93 0x03d0
|
||||
#define PT_F94 0x03e0
|
||||
#define PT_F95 0x03f0
|
||||
#define PT_F96 0x0400
|
||||
#define PT_F97 0x0410
|
||||
#define PT_F98 0x0420
|
||||
#define PT_F99 0x0430
|
||||
#define PT_F100 0x0440
|
||||
#define PT_F101 0x0450
|
||||
#define PT_F102 0x0460
|
||||
#define PT_F103 0x0470
|
||||
#define PT_F104 0x0480
|
||||
#define PT_F105 0x0490
|
||||
#define PT_F106 0x04a0
|
||||
#define PT_F107 0x04b0
|
||||
#define PT_F108 0x04c0
|
||||
#define PT_F109 0x04d0
|
||||
#define PT_F110 0x04e0
|
||||
#define PT_F111 0x04f0
|
||||
#define PT_F112 0x0500
|
||||
#define PT_F113 0x0510
|
||||
#define PT_F114 0x0520
|
||||
#define PT_F115 0x0530
|
||||
#define PT_F116 0x0540
|
||||
#define PT_F117 0x0550
|
||||
#define PT_F118 0x0560
|
||||
#define PT_F119 0x0570
|
||||
#define PT_F120 0x0580
|
||||
#define PT_F121 0x0590
|
||||
#define PT_F122 0x05a0
|
||||
#define PT_F123 0x05b0
|
||||
#define PT_F124 0x05c0
|
||||
#define PT_F125 0x05d0
|
||||
#define PT_F126 0x05e0
|
||||
#define PT_F127 0x05f0
|
||||
|
||||
#define PT_NAT_BITS 0x0600
|
||||
|
||||
#define PT_F2 0x0610
|
||||
#define PT_F3 0x0620
|
||||
#define PT_F4 0x0630
|
||||
#define PT_F5 0x0640
|
||||
#define PT_F10 0x0650
|
||||
#define PT_F11 0x0660
|
||||
#define PT_F12 0x0670
|
||||
#define PT_F13 0x0680
|
||||
#define PT_F14 0x0690
|
||||
#define PT_F15 0x06a0
|
||||
#define PT_F16 0x06b0
|
||||
#define PT_F17 0x06c0
|
||||
#define PT_F18 0x06d0
|
||||
#define PT_F19 0x06e0
|
||||
#define PT_F20 0x06f0
|
||||
#define PT_F21 0x0700
|
||||
#define PT_F22 0x0710
|
||||
#define PT_F23 0x0720
|
||||
#define PT_F24 0x0730
|
||||
#define PT_F25 0x0740
|
||||
#define PT_F26 0x0750
|
||||
#define PT_F27 0x0760
|
||||
#define PT_F28 0x0770
|
||||
#define PT_F29 0x0780
|
||||
#define PT_F30 0x0790
|
||||
#define PT_F31 0x07a0
|
||||
#define PT_R4 0x07b0
|
||||
#define PT_R5 0x07b8
|
||||
#define PT_R6 0x07c0
|
||||
#define PT_R7 0x07c8
|
||||
|
||||
#define PT_B1 0x07d8
|
||||
#define PT_B2 0x07e0
|
||||
#define PT_B3 0x07e8
|
||||
#define PT_B4 0x07f0
|
||||
#define PT_B5 0x07f8
|
||||
|
||||
#define PT_AR_EC 0x0800
|
||||
#define PT_AR_LC 0x0808
|
||||
|
||||
#define PT_CR_IPSR 0x0830
|
||||
#define PT_CR_IIP 0x0838
|
||||
#define PT_CFM 0x0840
|
||||
#define PT_AR_UNAT 0x0848
|
||||
#define PT_AR_PFS 0x0850
|
||||
#define PT_AR_RSC 0x0858
|
||||
#define PT_AR_RNAT 0x0860
|
||||
#define PT_AR_BSPSTORE 0x0868
|
||||
#define PT_PR 0x0870
|
||||
#define PT_B6 0x0878
|
||||
#define PT_AR_BSP 0x0880 /* note: this points to the *end* of the backing store! */
|
||||
#define PT_R1 0x0888
|
||||
#define PT_R2 0x0890
|
||||
#define PT_R3 0x0898
|
||||
#define PT_R12 0x08a0
|
||||
#define PT_R13 0x08a8
|
||||
#define PT_R14 0x08b0
|
||||
#define PT_R15 0x08b8
|
||||
#define PT_R8 0x08c0
|
||||
#define PT_R9 0x08c8
|
||||
#define PT_R10 0x08d0
|
||||
#define PT_R11 0x08d8
|
||||
#define PT_R16 0x08e0
|
||||
#define PT_R17 0x08e8
|
||||
#define PT_R18 0x08f0
|
||||
#define PT_R19 0x08f8
|
||||
#define PT_R20 0x0900
|
||||
#define PT_R21 0x0908
|
||||
#define PT_R22 0x0910
|
||||
#define PT_R23 0x0918
|
||||
#define PT_R24 0x0920
|
||||
#define PT_R25 0x0928
|
||||
#define PT_R26 0x0930
|
||||
#define PT_R27 0x0938
|
||||
#define PT_R28 0x0940
|
||||
#define PT_R29 0x0948
|
||||
#define PT_R30 0x0950
|
||||
#define PT_R31 0x0958
|
||||
#define PT_AR_CCV 0x0960
|
||||
#define PT_AR_FPSR 0x0968
|
||||
#define PT_B0 0x0970
|
||||
#define PT_B7 0x0978
|
||||
#define PT_F6 0x0980
|
||||
#define PT_F7 0x0990
|
||||
#define PT_F8 0x09a0
|
||||
#define PT_F9 0x09b0
|
||||
#define PT_AR_CSD 0x09c0
|
||||
#define PT_AR_SSD 0x09c8
|
||||
|
||||
#define PT_DBR 0x2000 /* data breakpoint registers */
|
||||
#define PT_IBR 0x3000 /* instruction breakpoint registers */
|
||||
#define PT_PMD 0x4000 /* performance monitoring counters */
|
||||
|
||||
#endif /* _ASM_IA64_PTRACE_OFFSETS_H */
|
||||
@@ -1,7 +0,0 @@
|
||||
#ifndef _ASM_IA64_RESOURCE_H
|
||||
#define _ASM_IA64_RESOURCE_H
|
||||
|
||||
#include <asm/ustack.h>
|
||||
#include <asm-generic/resource.h>
|
||||
|
||||
#endif /* _ASM_IA64_RESOURCE_H */
|
||||
@@ -1,66 +0,0 @@
|
||||
#ifndef _ASM_IA64_RSE_H
|
||||
#define _ASM_IA64_RSE_H
|
||||
|
||||
/*
|
||||
* Copyright (C) 1998, 1999 Hewlett-Packard Co
|
||||
* Copyright (C) 1998, 1999 David Mosberger-Tang <davidm@hpl.hp.com>
|
||||
*
|
||||
* Register stack engine related helper functions. This file may be
|
||||
* used in applications, so be careful about the name-space and give
|
||||
* some consideration to non-GNU C compilers (though __inline__ is
|
||||
* fine).
|
||||
*/
|
||||
|
||||
static __inline__ unsigned long
|
||||
ia64_rse_slot_num (unsigned long *addr)
|
||||
{
|
||||
return (((unsigned long) addr) >> 3) & 0x3f;
|
||||
}
|
||||
|
||||
/*
|
||||
* Return TRUE if ADDR is the address of an RNAT slot.
|
||||
*/
|
||||
static __inline__ unsigned long
|
||||
ia64_rse_is_rnat_slot (unsigned long *addr)
|
||||
{
|
||||
return ia64_rse_slot_num(addr) == 0x3f;
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns the address of the RNAT slot that covers the slot at
|
||||
* address SLOT_ADDR.
|
||||
*/
|
||||
static __inline__ unsigned long *
|
||||
ia64_rse_rnat_addr (unsigned long *slot_addr)
|
||||
{
|
||||
return (unsigned long *) ((unsigned long) slot_addr | (0x3f << 3));
|
||||
}
|
||||
|
||||
/*
|
||||
* Calculate the number of registers in the dirty partition starting at BSPSTORE and
|
||||
* ending at BSP. This isn't simply (BSP-BSPSTORE)/8 because every 64th slot stores
|
||||
* ar.rnat.
|
||||
*/
|
||||
static __inline__ unsigned long
|
||||
ia64_rse_num_regs (unsigned long *bspstore, unsigned long *bsp)
|
||||
{
|
||||
unsigned long slots = (bsp - bspstore);
|
||||
|
||||
return slots - (ia64_rse_slot_num(bspstore) + slots)/0x40;
|
||||
}
|
||||
|
||||
/*
|
||||
* The inverse of the above: given bspstore and the number of
|
||||
* registers, calculate ar.bsp.
|
||||
*/
|
||||
static __inline__ unsigned long *
|
||||
ia64_rse_skip_regs (unsigned long *addr, long num_regs)
|
||||
{
|
||||
long delta = ia64_rse_slot_num(addr) + num_regs;
|
||||
|
||||
if (num_regs < 0)
|
||||
delta -= 0x3e;
|
||||
return addr + num_regs + delta/0x3f;
|
||||
}
|
||||
|
||||
#endif /* _ASM_IA64_RSE_H */
|
||||
@@ -1,22 +0,0 @@
|
||||
#ifndef _ASM_IA64_SEMBUF_H
|
||||
#define _ASM_IA64_SEMBUF_H
|
||||
|
||||
/*
|
||||
* The semid64_ds structure for IA-64 architecture.
|
||||
* Note extra padding because this structure is passed back and forth
|
||||
* between kernel and user space.
|
||||
*
|
||||
* Pad space is left for:
|
||||
* - 2 miscellaneous 64-bit values
|
||||
*/
|
||||
|
||||
struct semid64_ds {
|
||||
struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
|
||||
__kernel_time_t sem_otime; /* last semop time */
|
||||
__kernel_time_t sem_ctime; /* last change time */
|
||||
unsigned long sem_nsems; /* no. of semaphores in array */
|
||||
unsigned long __unused1;
|
||||
unsigned long __unused2;
|
||||
};
|
||||
|
||||
#endif /* _ASM_IA64_SEMBUF_H */
|
||||
@@ -1,24 +0,0 @@
|
||||
#ifndef __IA64_SETUP_H
|
||||
#define __IA64_SETUP_H
|
||||
|
||||
#define COMMAND_LINE_SIZE 2048
|
||||
|
||||
extern struct ia64_boot_param {
|
||||
__u64 command_line; /* physical address of command line arguments */
|
||||
__u64 efi_systab; /* physical address of EFI system table */
|
||||
__u64 efi_memmap; /* physical address of EFI memory map */
|
||||
__u64 efi_memmap_size; /* size of EFI memory map */
|
||||
__u64 efi_memdesc_size; /* size of an EFI memory map descriptor */
|
||||
__u32 efi_memdesc_version; /* memory descriptor version */
|
||||
struct {
|
||||
__u16 num_cols; /* number of columns on console output device */
|
||||
__u16 num_rows; /* number of rows on console output device */
|
||||
__u16 orig_x; /* cursor's x position */
|
||||
__u16 orig_y; /* cursor's y position */
|
||||
} console_info;
|
||||
__u64 fpswa; /* physical address of the fpswa interface */
|
||||
__u64 initrd_start;
|
||||
__u64 initrd_size;
|
||||
} *ia64_boot_param;
|
||||
|
||||
#endif
|
||||
@@ -1,38 +0,0 @@
|
||||
#ifndef _ASM_IA64_SHMBUF_H
|
||||
#define _ASM_IA64_SHMBUF_H
|
||||
|
||||
/*
|
||||
* The shmid64_ds structure for IA-64 architecture.
|
||||
* Note extra padding because this structure is passed back and forth
|
||||
* between kernel and user space.
|
||||
*
|
||||
* Pad space is left for:
|
||||
* - 2 miscellaneous 64-bit values
|
||||
*/
|
||||
|
||||
struct shmid64_ds {
|
||||
struct ipc64_perm shm_perm; /* operation perms */
|
||||
size_t shm_segsz; /* size of segment (bytes) */
|
||||
__kernel_time_t shm_atime; /* last attach time */
|
||||
__kernel_time_t shm_dtime; /* last detach time */
|
||||
__kernel_time_t shm_ctime; /* last change time */
|
||||
__kernel_pid_t shm_cpid; /* pid of creator */
|
||||
__kernel_pid_t shm_lpid; /* pid of last operator */
|
||||
unsigned long shm_nattch; /* no. of current attaches */
|
||||
unsigned long __unused1;
|
||||
unsigned long __unused2;
|
||||
};
|
||||
|
||||
struct shminfo64 {
|
||||
unsigned long shmmax;
|
||||
unsigned long shmmin;
|
||||
unsigned long shmmni;
|
||||
unsigned long shmseg;
|
||||
unsigned long shmall;
|
||||
unsigned long __unused1;
|
||||
unsigned long __unused2;
|
||||
unsigned long __unused3;
|
||||
unsigned long __unused4;
|
||||
};
|
||||
|
||||
#endif /* _ASM_IA64_SHMBUF_H */
|
||||
@@ -1,70 +0,0 @@
|
||||
#ifndef _ASM_IA64_SIGCONTEXT_H
|
||||
#define _ASM_IA64_SIGCONTEXT_H
|
||||
|
||||
/*
|
||||
* Copyright (C) 1998, 1999, 2001 Hewlett-Packard Co
|
||||
* Copyright (C) 1998, 1999, 2001 David Mosberger-Tang <davidm@hpl.hp.com>
|
||||
*/
|
||||
|
||||
#include <asm/fpu.h>
|
||||
|
||||
#define IA64_SC_FLAG_ONSTACK_BIT 0 /* is handler running on signal stack? */
|
||||
#define IA64_SC_FLAG_IN_SYSCALL_BIT 1 /* did signal interrupt a syscall? */
|
||||
#define IA64_SC_FLAG_FPH_VALID_BIT 2 /* is state in f[32]-f[127] valid? */
|
||||
|
||||
#define IA64_SC_FLAG_ONSTACK (1 << IA64_SC_FLAG_ONSTACK_BIT)
|
||||
#define IA64_SC_FLAG_IN_SYSCALL (1 << IA64_SC_FLAG_IN_SYSCALL_BIT)
|
||||
#define IA64_SC_FLAG_FPH_VALID (1 << IA64_SC_FLAG_FPH_VALID_BIT)
|
||||
|
||||
# ifndef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
* Note on handling of register backing store: sc_ar_bsp contains the address that would
|
||||
* be found in ar.bsp after executing a "cover" instruction the context in which the
|
||||
* signal was raised. If signal delivery required switching to an alternate signal stack
|
||||
* (sc_rbs_base is not NULL), the "dirty" partition (as it would exist after executing the
|
||||
* imaginary "cover" instruction) is backed by the *alternate* signal stack, not the
|
||||
* original one. In this case, sc_rbs_base contains the base address of the new register
|
||||
* backing store. The number of registers in the dirty partition can be calculated as:
|
||||
*
|
||||
* ndirty = ia64_rse_num_regs(sc_rbs_base, sc_rbs_base + (sc_loadrs >> 16))
|
||||
*
|
||||
*/
|
||||
|
||||
struct sigcontext {
|
||||
unsigned long sc_flags; /* see manifest constants above */
|
||||
unsigned long sc_nat; /* bit i == 1 iff scratch reg gr[i] is a NaT */
|
||||
stack_t sc_stack; /* previously active stack */
|
||||
|
||||
unsigned long sc_ip; /* instruction pointer */
|
||||
unsigned long sc_cfm; /* current frame marker */
|
||||
unsigned long sc_um; /* user mask bits */
|
||||
unsigned long sc_ar_rsc; /* register stack configuration register */
|
||||
unsigned long sc_ar_bsp; /* backing store pointer */
|
||||
unsigned long sc_ar_rnat; /* RSE NaT collection register */
|
||||
unsigned long sc_ar_ccv; /* compare and exchange compare value register */
|
||||
unsigned long sc_ar_unat; /* ar.unat of interrupted context */
|
||||
unsigned long sc_ar_fpsr; /* floating-point status register */
|
||||
unsigned long sc_ar_pfs; /* previous function state */
|
||||
unsigned long sc_ar_lc; /* loop count register */
|
||||
unsigned long sc_pr; /* predicate registers */
|
||||
unsigned long sc_br[8]; /* branch registers */
|
||||
/* Note: sc_gr[0] is used as the "uc_link" member of ucontext_t */
|
||||
unsigned long sc_gr[32]; /* general registers (static partition) */
|
||||
struct ia64_fpreg sc_fr[128]; /* floating-point registers */
|
||||
|
||||
unsigned long sc_rbs_base; /* NULL or new base of sighandler's rbs */
|
||||
unsigned long sc_loadrs; /* see description above */
|
||||
|
||||
unsigned long sc_ar25; /* cmp8xchg16 uses this */
|
||||
unsigned long sc_ar26; /* rsvd for scratch use */
|
||||
unsigned long sc_rsvd[12]; /* reserved for future use */
|
||||
/*
|
||||
* The mask must come last so we can increase _NSIG_WORDS
|
||||
* without breaking binary compatibility.
|
||||
*/
|
||||
sigset_t sc_mask; /* signal mask to restore after handler returns */
|
||||
};
|
||||
|
||||
# endif /* __ASSEMBLY__ */
|
||||
#endif /* _ASM_IA64_SIGCONTEXT_H */
|
||||
@@ -1,124 +1,14 @@
|
||||
#ifndef _ASM_IA64_SIGINFO_H
|
||||
#define _ASM_IA64_SIGINFO_H
|
||||
|
||||
/*
|
||||
* Based on <asm-i386/siginfo.h>.
|
||||
*
|
||||
* Modified 1998-2002
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
|
||||
*/
|
||||
#ifndef _ASM_IA64_SIGINFO_H
|
||||
#define _ASM_IA64_SIGINFO_H
|
||||
|
||||
#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
|
||||
|
||||
#define HAVE_ARCH_SIGINFO_T
|
||||
#define HAVE_ARCH_COPY_SIGINFO
|
||||
#define HAVE_ARCH_COPY_SIGINFO_TO_USER
|
||||
|
||||
#include <asm-generic/siginfo.h>
|
||||
|
||||
typedef struct siginfo {
|
||||
int si_signo;
|
||||
int si_errno;
|
||||
int si_code;
|
||||
int __pad0;
|
||||
|
||||
union {
|
||||
int _pad[SI_PAD_SIZE];
|
||||
|
||||
/* kill() */
|
||||
struct {
|
||||
pid_t _pid; /* sender's pid */
|
||||
uid_t _uid; /* sender's uid */
|
||||
} _kill;
|
||||
|
||||
/* POSIX.1b timers */
|
||||
struct {
|
||||
timer_t _tid; /* timer id */
|
||||
int _overrun; /* overrun count */
|
||||
char _pad[sizeof(__ARCH_SI_UID_T) - sizeof(int)];
|
||||
sigval_t _sigval; /* must overlay ._rt._sigval! */
|
||||
int _sys_private; /* not to be passed to user */
|
||||
} _timer;
|
||||
|
||||
/* POSIX.1b signals */
|
||||
struct {
|
||||
pid_t _pid; /* sender's pid */
|
||||
uid_t _uid; /* sender's uid */
|
||||
sigval_t _sigval;
|
||||
} _rt;
|
||||
|
||||
/* SIGCHLD */
|
||||
struct {
|
||||
pid_t _pid; /* which child */
|
||||
uid_t _uid; /* sender's uid */
|
||||
int _status; /* exit code */
|
||||
clock_t _utime;
|
||||
clock_t _stime;
|
||||
} _sigchld;
|
||||
|
||||
/* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
|
||||
struct {
|
||||
void __user *_addr; /* faulting insn/memory ref. */
|
||||
int _imm; /* immediate value for "break" */
|
||||
unsigned int _flags; /* see below */
|
||||
unsigned long _isr; /* isr */
|
||||
short _addr_lsb; /* lsb of faulting address */
|
||||
} _sigfault;
|
||||
|
||||
/* SIGPOLL */
|
||||
struct {
|
||||
long _band; /* POLL_IN, POLL_OUT, POLL_MSG (XPG requires a "long") */
|
||||
int _fd;
|
||||
} _sigpoll;
|
||||
} _sifields;
|
||||
} siginfo_t;
|
||||
|
||||
#define si_imm _sifields._sigfault._imm /* as per UNIX SysV ABI spec */
|
||||
#define si_flags _sifields._sigfault._flags
|
||||
/*
|
||||
* si_isr is valid for SIGILL, SIGFPE, SIGSEGV, SIGBUS, and SIGTRAP provided that
|
||||
* si_code is non-zero and __ISR_VALID is set in si_flags.
|
||||
*/
|
||||
#define si_isr _sifields._sigfault._isr
|
||||
|
||||
/*
|
||||
* Flag values for si_flags:
|
||||
*/
|
||||
#define __ISR_VALID_BIT 0
|
||||
#define __ISR_VALID (1 << __ISR_VALID_BIT)
|
||||
|
||||
/*
|
||||
* SIGILL si_codes
|
||||
*/
|
||||
#define ILL_BADIADDR (__SI_FAULT|9) /* unimplemented instruction address */
|
||||
#define __ILL_BREAK (__SI_FAULT|10) /* illegal break */
|
||||
#define __ILL_BNDMOD (__SI_FAULT|11) /* bundle-update (modification) in progress */
|
||||
#undef NSIGILL
|
||||
#define NSIGILL 11
|
||||
|
||||
/*
|
||||
* SIGFPE si_codes
|
||||
*/
|
||||
#define __FPE_DECOVF (__SI_FAULT|9) /* decimal overflow */
|
||||
#define __FPE_DECDIV (__SI_FAULT|10) /* decimal division by zero */
|
||||
#define __FPE_DECERR (__SI_FAULT|11) /* packed decimal error */
|
||||
#define __FPE_INVASC (__SI_FAULT|12) /* invalid ASCII digit */
|
||||
#define __FPE_INVDEC (__SI_FAULT|13) /* invalid decimal digit */
|
||||
#undef NSIGFPE
|
||||
#define NSIGFPE 13
|
||||
|
||||
/*
|
||||
* SIGSEGV si_codes
|
||||
*/
|
||||
#define __SEGV_PSTKOVF (__SI_FAULT|3) /* paragraph stack overflow */
|
||||
#undef NSIGSEGV
|
||||
#define NSIGSEGV 3
|
||||
|
||||
#undef NSIGTRAP
|
||||
#define NSIGTRAP 4
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#include <linux/string.h>
|
||||
#include <uapi/asm/siginfo.h>
|
||||
|
||||
static inline void
|
||||
copy_siginfo (siginfo_t *to, siginfo_t *from)
|
||||
@@ -130,6 +20,4 @@ copy_siginfo (siginfo_t *to, siginfo_t *from)
|
||||
memcpy(to, from, 4*sizeof(int) + sizeof(from->_sifields._sigchld));
|
||||
}
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _ASM_IA64_SIGINFO_H */
|
||||
|
||||
@@ -1,6 +1,3 @@
|
||||
#ifndef _ASM_IA64_SIGNAL_H
|
||||
#define _ASM_IA64_SIGNAL_H
|
||||
|
||||
/*
|
||||
* Modified 1998-2001, 2003
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
|
||||
@@ -8,129 +5,18 @@
|
||||
* Unfortunately, this file is being included by bits/signal.h in
|
||||
* glibc-2.x. Hence the #ifdef __KERNEL__ ugliness.
|
||||
*/
|
||||
#ifndef _ASM_IA64_SIGNAL_H
|
||||
#define _ASM_IA64_SIGNAL_H
|
||||
|
||||
#define SIGHUP 1
|
||||
#define SIGINT 2
|
||||
#define SIGQUIT 3
|
||||
#define SIGILL 4
|
||||
#define SIGTRAP 5
|
||||
#define SIGABRT 6
|
||||
#define SIGIOT 6
|
||||
#define SIGBUS 7
|
||||
#define SIGFPE 8
|
||||
#define SIGKILL 9
|
||||
#define SIGUSR1 10
|
||||
#define SIGSEGV 11
|
||||
#define SIGUSR2 12
|
||||
#define SIGPIPE 13
|
||||
#define SIGALRM 14
|
||||
#define SIGTERM 15
|
||||
#define SIGSTKFLT 16
|
||||
#define SIGCHLD 17
|
||||
#define SIGCONT 18
|
||||
#define SIGSTOP 19
|
||||
#define SIGTSTP 20
|
||||
#define SIGTTIN 21
|
||||
#define SIGTTOU 22
|
||||
#define SIGURG 23
|
||||
#define SIGXCPU 24
|
||||
#define SIGXFSZ 25
|
||||
#define SIGVTALRM 26
|
||||
#define SIGPROF 27
|
||||
#define SIGWINCH 28
|
||||
#define SIGIO 29
|
||||
#define SIGPOLL SIGIO
|
||||
/*
|
||||
#define SIGLOST 29
|
||||
*/
|
||||
#define SIGPWR 30
|
||||
#define SIGSYS 31
|
||||
/* signal 31 is no longer "unused", but the SIGUNUSED macro remains for backwards compatibility */
|
||||
#define SIGUNUSED 31
|
||||
#include <uapi/asm/signal.h>
|
||||
|
||||
/* These should not be considered constants from userland. */
|
||||
#define SIGRTMIN 32
|
||||
#define SIGRTMAX _NSIG
|
||||
|
||||
/*
|
||||
* SA_FLAGS values:
|
||||
*
|
||||
* SA_ONSTACK indicates that a registered stack_t will be used.
|
||||
* SA_RESTART flag to get restarting signals (which were the default long ago)
|
||||
* SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
|
||||
* SA_RESETHAND clears the handler when the signal is delivered.
|
||||
* SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
|
||||
* SA_NODEFER prevents the current signal from being masked in the handler.
|
||||
*
|
||||
* SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
|
||||
* Unix names RESETHAND and NODEFER respectively.
|
||||
*/
|
||||
#define SA_NOCLDSTOP 0x00000001
|
||||
#define SA_NOCLDWAIT 0x00000002
|
||||
#define SA_SIGINFO 0x00000004
|
||||
#define SA_ONSTACK 0x08000000
|
||||
#define SA_RESTART 0x10000000
|
||||
#define SA_NODEFER 0x40000000
|
||||
#define SA_RESETHAND 0x80000000
|
||||
|
||||
#define SA_NOMASK SA_NODEFER
|
||||
#define SA_ONESHOT SA_RESETHAND
|
||||
|
||||
#define SA_RESTORER 0x04000000
|
||||
|
||||
/*
|
||||
* sigaltstack controls
|
||||
*/
|
||||
#define SS_ONSTACK 1
|
||||
#define SS_DISABLE 2
|
||||
|
||||
/*
|
||||
* The minimum stack size needs to be fairly large because we want to
|
||||
* be sure that an app compiled for today's CPUs will continue to run
|
||||
* on all future CPU models. The CPU model matters because the signal
|
||||
* frame needs to have space for the complete machine state, including
|
||||
* all physical stacked registers. The number of physical stacked
|
||||
* registers is CPU model dependent, but given that the width of
|
||||
* ar.rsc.loadrs is 14 bits, we can assume that they'll never take up
|
||||
* more than 16KB of space.
|
||||
*/
|
||||
#if 1
|
||||
/*
|
||||
* This is a stupid typo: the value was _meant_ to be 131072 (0x20000), but I typed it
|
||||
* in wrong. ;-( To preserve backwards compatibility, we leave the kernel at the
|
||||
* incorrect value and fix libc only.
|
||||
*/
|
||||
# define MINSIGSTKSZ 131027 /* min. stack size for sigaltstack() */
|
||||
#else
|
||||
# define MINSIGSTKSZ 131072 /* min. stack size for sigaltstack() */
|
||||
#endif
|
||||
#define SIGSTKSZ 262144 /* default stack size for sigaltstack() */
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define _NSIG 64
|
||||
#define _NSIG_BPW 64
|
||||
#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#include <asm-generic/signal-defs.h>
|
||||
|
||||
# ifndef __ASSEMBLY__
|
||||
|
||||
# include <linux/types.h>
|
||||
|
||||
/* Avoid too many header ordering problems. */
|
||||
struct siginfo;
|
||||
|
||||
typedef struct sigaltstack {
|
||||
void __user *ss_sp;
|
||||
int ss_flags;
|
||||
size_t ss_size;
|
||||
} stack_t;
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
/* Most things should be clean enough to redefine this at will, if care
|
||||
is taken to make libc match. */
|
||||
|
||||
@@ -154,7 +40,5 @@ struct k_sigaction {
|
||||
|
||||
#define ptrace_signal_deliver(regs, cookie) do { } while (0)
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
# endif /* !__ASSEMBLY__ */
|
||||
#endif /* _ASM_IA64_SIGNAL_H */
|
||||
|
||||
@@ -1,81 +0,0 @@
|
||||
#ifndef _ASM_IA64_SOCKET_H
|
||||
#define _ASM_IA64_SOCKET_H
|
||||
|
||||
/*
|
||||
* Socket related defines.
|
||||
*
|
||||
* Based on <asm-i386/socket.h>.
|
||||
*
|
||||
* Modified 1998-2000
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
|
||||
*/
|
||||
|
||||
#include <asm/sockios.h>
|
||||
|
||||
/* For setsockopt(2) */
|
||||
#define SOL_SOCKET 1
|
||||
|
||||
#define SO_DEBUG 1
|
||||
#define SO_REUSEADDR 2
|
||||
#define SO_TYPE 3
|
||||
#define SO_ERROR 4
|
||||
#define SO_DONTROUTE 5
|
||||
#define SO_BROADCAST 6
|
||||
#define SO_SNDBUF 7
|
||||
#define SO_RCVBUF 8
|
||||
#define SO_SNDBUFFORCE 32
|
||||
#define SO_RCVBUFFORCE 33
|
||||
#define SO_KEEPALIVE 9
|
||||
#define SO_OOBINLINE 10
|
||||
#define SO_NO_CHECK 11
|
||||
#define SO_PRIORITY 12
|
||||
#define SO_LINGER 13
|
||||
#define SO_BSDCOMPAT 14
|
||||
/* To add :#define SO_REUSEPORT 15 */
|
||||
#define SO_PASSCRED 16
|
||||
#define SO_PEERCRED 17
|
||||
#define SO_RCVLOWAT 18
|
||||
#define SO_SNDLOWAT 19
|
||||
#define SO_RCVTIMEO 20
|
||||
#define SO_SNDTIMEO 21
|
||||
|
||||
/* Security levels - as per NRL IPv6 - don't actually do anything */
|
||||
#define SO_SECURITY_AUTHENTICATION 22
|
||||
#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
|
||||
#define SO_SECURITY_ENCRYPTION_NETWORK 24
|
||||
|
||||
#define SO_BINDTODEVICE 25
|
||||
|
||||
/* Socket filtering */
|
||||
#define SO_ATTACH_FILTER 26
|
||||
#define SO_DETACH_FILTER 27
|
||||
|
||||
#define SO_PEERNAME 28
|
||||
#define SO_TIMESTAMP 29
|
||||
#define SCM_TIMESTAMP SO_TIMESTAMP
|
||||
|
||||
#define SO_ACCEPTCONN 30
|
||||
|
||||
#define SO_PEERSEC 31
|
||||
#define SO_PASSSEC 34
|
||||
#define SO_TIMESTAMPNS 35
|
||||
#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
|
||||
|
||||
#define SO_MARK 36
|
||||
|
||||
#define SO_TIMESTAMPING 37
|
||||
#define SCM_TIMESTAMPING SO_TIMESTAMPING
|
||||
|
||||
#define SO_PROTOCOL 38
|
||||
#define SO_DOMAIN 39
|
||||
|
||||
#define SO_RXQ_OVFL 40
|
||||
|
||||
#define SO_WIFI_STATUS 41
|
||||
#define SCM_WIFI_STATUS SO_WIFI_STATUS
|
||||
#define SO_PEEK_OFF 42
|
||||
|
||||
/* Instruct lower device to use last 4-bytes of skb data as FCS */
|
||||
#define SO_NOFCS 43
|
||||
|
||||
#endif /* _ASM_IA64_SOCKET_H */
|
||||
@@ -1,20 +0,0 @@
|
||||
#ifndef _ASM_IA64_SOCKIOS_H
|
||||
#define _ASM_IA64_SOCKIOS_H
|
||||
|
||||
/*
|
||||
* Socket-level I/O control calls.
|
||||
*
|
||||
* Based on <asm-i386/sockios.h>.
|
||||
*
|
||||
* Modified 1998, 1999
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
|
||||
*/
|
||||
#define FIOSETOWN 0x8901
|
||||
#define SIOCSPGRP 0x8902
|
||||
#define FIOGETOWN 0x8903
|
||||
#define SIOCGPGRP 0x8904
|
||||
#define SIOCATMARK 0x8905
|
||||
#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
|
||||
#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
|
||||
|
||||
#endif /* _ASM_IA64_SOCKIOS_H */
|
||||
@@ -1,51 +0,0 @@
|
||||
#ifndef _ASM_IA64_STAT_H
|
||||
#define _ASM_IA64_STAT_H
|
||||
|
||||
/*
|
||||
* Modified 1998, 1999
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
|
||||
*/
|
||||
|
||||
struct stat {
|
||||
unsigned long st_dev;
|
||||
unsigned long st_ino;
|
||||
unsigned long st_nlink;
|
||||
unsigned int st_mode;
|
||||
unsigned int st_uid;
|
||||
unsigned int st_gid;
|
||||
unsigned int __pad0;
|
||||
unsigned long st_rdev;
|
||||
unsigned long st_size;
|
||||
unsigned long st_atime;
|
||||
unsigned long st_atime_nsec;
|
||||
unsigned long st_mtime;
|
||||
unsigned long st_mtime_nsec;
|
||||
unsigned long st_ctime;
|
||||
unsigned long st_ctime_nsec;
|
||||
unsigned long st_blksize;
|
||||
long st_blocks;
|
||||
unsigned long __unused[3];
|
||||
};
|
||||
|
||||
#define STAT_HAVE_NSEC 1
|
||||
|
||||
struct ia64_oldstat {
|
||||
unsigned int st_dev;
|
||||
unsigned int st_ino;
|
||||
unsigned int st_mode;
|
||||
unsigned int st_nlink;
|
||||
unsigned int st_uid;
|
||||
unsigned int st_gid;
|
||||
unsigned int st_rdev;
|
||||
unsigned int __pad1;
|
||||
unsigned long st_size;
|
||||
unsigned long st_atime;
|
||||
unsigned long st_mtime;
|
||||
unsigned long st_ctime;
|
||||
unsigned int st_blksize;
|
||||
int st_blocks;
|
||||
unsigned int __unused1;
|
||||
unsigned int __unused2;
|
||||
};
|
||||
|
||||
#endif /* _ASM_IA64_STAT_H */
|
||||
@@ -1,20 +0,0 @@
|
||||
#ifndef _ASM_IA64_STATFS_H
|
||||
#define _ASM_IA64_STATFS_H
|
||||
|
||||
/*
|
||||
* Based on <asm-i386/statfs.h>.
|
||||
*
|
||||
* Modified 1998, 1999, 2003
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
|
||||
*/
|
||||
|
||||
/*
|
||||
* We need compat_statfs64 to be packed, because the i386 ABI won't
|
||||
* add padding at the end to bring it to a multiple of 8 bytes, but
|
||||
* the IA64 ABI will.
|
||||
*/
|
||||
#define ARCH_PACK_COMPAT_STATFS64 __attribute__((packed,aligned(4)))
|
||||
|
||||
#include <asm-generic/statfs.h>
|
||||
|
||||
#endif /* _ASM_IA64_STATFS_H */
|
||||
@@ -1,34 +0,0 @@
|
||||
#ifndef _ASM_IA64_SWAB_H
|
||||
#define _ASM_IA64_SWAB_H
|
||||
|
||||
/*
|
||||
* Modified 1998, 1999
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co.
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <asm/intrinsics.h>
|
||||
#include <linux/compiler.h>
|
||||
|
||||
static __inline__ __attribute_const__ __u64 __arch_swab64(__u64 x)
|
||||
{
|
||||
__u64 result;
|
||||
|
||||
result = ia64_mux1(x, ia64_mux1_rev);
|
||||
return result;
|
||||
}
|
||||
#define __arch_swab64 __arch_swab64
|
||||
|
||||
static __inline__ __attribute_const__ __u32 __arch_swab32(__u32 x)
|
||||
{
|
||||
return __arch_swab64(x) >> 32;
|
||||
}
|
||||
#define __arch_swab32 __arch_swab32
|
||||
|
||||
static __inline__ __attribute_const__ __u16 __arch_swab16(__u16 x)
|
||||
{
|
||||
return __arch_swab64(x) >> 48;
|
||||
}
|
||||
#define __arch_swab16 __arch_swab16
|
||||
|
||||
#endif /* _ASM_IA64_SWAB_H */
|
||||
@@ -1,208 +0,0 @@
|
||||
#ifndef _ASM_IA64_TERMBITS_H
|
||||
#define _ASM_IA64_TERMBITS_H
|
||||
|
||||
/*
|
||||
* Based on <asm-i386/termbits.h>.
|
||||
*
|
||||
* Modified 1999
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
|
||||
*
|
||||
* 99/01/28 Added new baudrates
|
||||
*/
|
||||
|
||||
#include <linux/posix_types.h>
|
||||
|
||||
typedef unsigned char cc_t;
|
||||
typedef unsigned int speed_t;
|
||||
typedef unsigned int tcflag_t;
|
||||
|
||||
#define NCCS 19
|
||||
struct termios {
|
||||
tcflag_t c_iflag; /* input mode flags */
|
||||
tcflag_t c_oflag; /* output mode flags */
|
||||
tcflag_t c_cflag; /* control mode flags */
|
||||
tcflag_t c_lflag; /* local mode flags */
|
||||
cc_t c_line; /* line discipline */
|
||||
cc_t c_cc[NCCS]; /* control characters */
|
||||
};
|
||||
|
||||
struct termios2 {
|
||||
tcflag_t c_iflag; /* input mode flags */
|
||||
tcflag_t c_oflag; /* output mode flags */
|
||||
tcflag_t c_cflag; /* control mode flags */
|
||||
tcflag_t c_lflag; /* local mode flags */
|
||||
cc_t c_line; /* line discipline */
|
||||
cc_t c_cc[NCCS]; /* control characters */
|
||||
speed_t c_ispeed; /* input speed */
|
||||
speed_t c_ospeed; /* output speed */
|
||||
};
|
||||
|
||||
struct ktermios {
|
||||
tcflag_t c_iflag; /* input mode flags */
|
||||
tcflag_t c_oflag; /* output mode flags */
|
||||
tcflag_t c_cflag; /* control mode flags */
|
||||
tcflag_t c_lflag; /* local mode flags */
|
||||
cc_t c_line; /* line discipline */
|
||||
cc_t c_cc[NCCS]; /* control characters */
|
||||
speed_t c_ispeed; /* input speed */
|
||||
speed_t c_ospeed; /* output speed */
|
||||
};
|
||||
|
||||
/* c_cc characters */
|
||||
#define VINTR 0
|
||||
#define VQUIT 1
|
||||
#define VERASE 2
|
||||
#define VKILL 3
|
||||
#define VEOF 4
|
||||
#define VTIME 5
|
||||
#define VMIN 6
|
||||
#define VSWTC 7
|
||||
#define VSTART 8
|
||||
#define VSTOP 9
|
||||
#define VSUSP 10
|
||||
#define VEOL 11
|
||||
#define VREPRINT 12
|
||||
#define VDISCARD 13
|
||||
#define VWERASE 14
|
||||
#define VLNEXT 15
|
||||
#define VEOL2 16
|
||||
|
||||
/* c_iflag bits */
|
||||
#define IGNBRK 0000001
|
||||
#define BRKINT 0000002
|
||||
#define IGNPAR 0000004
|
||||
#define PARMRK 0000010
|
||||
#define INPCK 0000020
|
||||
#define ISTRIP 0000040
|
||||
#define INLCR 0000100
|
||||
#define IGNCR 0000200
|
||||
#define ICRNL 0000400
|
||||
#define IUCLC 0001000
|
||||
#define IXON 0002000
|
||||
#define IXANY 0004000
|
||||
#define IXOFF 0010000
|
||||
#define IMAXBEL 0020000
|
||||
#define IUTF8 0040000
|
||||
|
||||
/* c_oflag bits */
|
||||
#define OPOST 0000001
|
||||
#define OLCUC 0000002
|
||||
#define ONLCR 0000004
|
||||
#define OCRNL 0000010
|
||||
#define ONOCR 0000020
|
||||
#define ONLRET 0000040
|
||||
#define OFILL 0000100
|
||||
#define OFDEL 0000200
|
||||
#define NLDLY 0000400
|
||||
#define NL0 0000000
|
||||
#define NL1 0000400
|
||||
#define CRDLY 0003000
|
||||
#define CR0 0000000
|
||||
#define CR1 0001000
|
||||
#define CR2 0002000
|
||||
#define CR3 0003000
|
||||
#define TABDLY 0014000
|
||||
#define TAB0 0000000
|
||||
#define TAB1 0004000
|
||||
#define TAB2 0010000
|
||||
#define TAB3 0014000
|
||||
#define XTABS 0014000
|
||||
#define BSDLY 0020000
|
||||
#define BS0 0000000
|
||||
#define BS1 0020000
|
||||
#define VTDLY 0040000
|
||||
#define VT0 0000000
|
||||
#define VT1 0040000
|
||||
#define FFDLY 0100000
|
||||
#define FF0 0000000
|
||||
#define FF1 0100000
|
||||
|
||||
/* c_cflag bit meaning */
|
||||
#define CBAUD 0010017
|
||||
#define B0 0000000 /* hang up */
|
||||
#define B50 0000001
|
||||
#define B75 0000002
|
||||
#define B110 0000003
|
||||
#define B134 0000004
|
||||
#define B150 0000005
|
||||
#define B200 0000006
|
||||
#define B300 0000007
|
||||
#define B600 0000010
|
||||
#define B1200 0000011
|
||||
#define B1800 0000012
|
||||
#define B2400 0000013
|
||||
#define B4800 0000014
|
||||
#define B9600 0000015
|
||||
#define B19200 0000016
|
||||
#define B38400 0000017
|
||||
#define EXTA B19200
|
||||
#define EXTB B38400
|
||||
#define CSIZE 0000060
|
||||
#define CS5 0000000
|
||||
#define CS6 0000020
|
||||
#define CS7 0000040
|
||||
#define CS8 0000060
|
||||
#define CSTOPB 0000100
|
||||
#define CREAD 0000200
|
||||
#define PARENB 0000400
|
||||
#define PARODD 0001000
|
||||
#define HUPCL 0002000
|
||||
#define CLOCAL 0004000
|
||||
#define CBAUDEX 0010000
|
||||
#define BOTHER 0010000
|
||||
#define B57600 0010001
|
||||
#define B115200 0010002
|
||||
#define B230400 0010003
|
||||
#define B460800 0010004
|
||||
#define B500000 0010005
|
||||
#define B576000 0010006
|
||||
#define B921600 0010007
|
||||
#define B1000000 0010010
|
||||
#define B1152000 0010011
|
||||
#define B1500000 0010012
|
||||
#define B2000000 0010013
|
||||
#define B2500000 0010014
|
||||
#define B3000000 0010015
|
||||
#define B3500000 0010016
|
||||
#define B4000000 0010017
|
||||
#define CIBAUD 002003600000 /* input baud rate */
|
||||
#define CMSPAR 010000000000 /* mark or space (stick) parity */
|
||||
#define CRTSCTS 020000000000 /* flow control */
|
||||
|
||||
#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
|
||||
|
||||
/* c_lflag bits */
|
||||
#define ISIG 0000001
|
||||
#define ICANON 0000002
|
||||
#define XCASE 0000004
|
||||
#define ECHO 0000010
|
||||
#define ECHOE 0000020
|
||||
#define ECHOK 0000040
|
||||
#define ECHONL 0000100
|
||||
#define NOFLSH 0000200
|
||||
#define TOSTOP 0000400
|
||||
#define ECHOCTL 0001000
|
||||
#define ECHOPRT 0002000
|
||||
#define ECHOKE 0004000
|
||||
#define FLUSHO 0010000
|
||||
#define PENDIN 0040000
|
||||
#define IEXTEN 0100000
|
||||
#define EXTPROC 0200000
|
||||
|
||||
/* tcflow() and TCXONC use these */
|
||||
#define TCOOFF 0
|
||||
#define TCOON 1
|
||||
#define TCIOFF 2
|
||||
#define TCION 3
|
||||
|
||||
/* tcflush() and TCFLSH use these */
|
||||
#define TCIFLUSH 0
|
||||
#define TCOFLUSH 1
|
||||
#define TCIOFLUSH 2
|
||||
|
||||
/* tcsetattr uses these */
|
||||
#define TCSANOW 0
|
||||
#define TCSADRAIN 1
|
||||
#define TCSAFLUSH 2
|
||||
|
||||
#endif /* _ASM_IA64_TERMBITS_H */
|
||||
@@ -1,52 +1,14 @@
|
||||
#ifndef _ASM_IA64_TERMIOS_H
|
||||
#define _ASM_IA64_TERMIOS_H
|
||||
|
||||
/*
|
||||
* Modified 1999
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
|
||||
*
|
||||
* 99/01/28 Added N_IRDA and N_SMSBLOCK
|
||||
*/
|
||||
#ifndef _ASM_IA64_TERMIOS_H
|
||||
#define _ASM_IA64_TERMIOS_H
|
||||
|
||||
#include <asm/termbits.h>
|
||||
#include <asm/ioctls.h>
|
||||
#include <uapi/asm/termios.h>
|
||||
|
||||
struct winsize {
|
||||
unsigned short ws_row;
|
||||
unsigned short ws_col;
|
||||
unsigned short ws_xpixel;
|
||||
unsigned short ws_ypixel;
|
||||
};
|
||||
|
||||
#define NCC 8
|
||||
struct termio {
|
||||
unsigned short c_iflag; /* input mode flags */
|
||||
unsigned short c_oflag; /* output mode flags */
|
||||
unsigned short c_cflag; /* control mode flags */
|
||||
unsigned short c_lflag; /* local mode flags */
|
||||
unsigned char c_line; /* line discipline */
|
||||
unsigned char c_cc[NCC]; /* control characters */
|
||||
};
|
||||
|
||||
/* modem lines */
|
||||
#define TIOCM_LE 0x001
|
||||
#define TIOCM_DTR 0x002
|
||||
#define TIOCM_RTS 0x004
|
||||
#define TIOCM_ST 0x008
|
||||
#define TIOCM_SR 0x010
|
||||
#define TIOCM_CTS 0x020
|
||||
#define TIOCM_CAR 0x040
|
||||
#define TIOCM_RNG 0x080
|
||||
#define TIOCM_DSR 0x100
|
||||
#define TIOCM_CD TIOCM_CAR
|
||||
#define TIOCM_RI TIOCM_RNG
|
||||
#define TIOCM_OUT1 0x2000
|
||||
#define TIOCM_OUT2 0x4000
|
||||
#define TIOCM_LOOP 0x8000
|
||||
|
||||
/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
|
||||
|
||||
# ifdef __KERNEL__
|
||||
|
||||
/* intr=^C quit=^\ erase=del kill=^U
|
||||
eof=^D vtime=\0 vmin=\1 sxtc=\0
|
||||
@@ -92,6 +54,4 @@ struct termio {
|
||||
#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
|
||||
#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
|
||||
|
||||
# endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _ASM_IA64_TERMIOS_H */
|
||||
|
||||
@@ -1,6 +1,3 @@
|
||||
#ifndef _ASM_IA64_TYPES_H
|
||||
#define _ASM_IA64_TYPES_H
|
||||
|
||||
/*
|
||||
* This file is never included by application software unless explicitly
|
||||
* requested (e.g., via linux/types.h) in which case the application is
|
||||
@@ -13,32 +10,22 @@
|
||||
* Modified 1998-2000, 2002
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
|
||||
*/
|
||||
#ifndef _ASM_IA64_TYPES_H
|
||||
#define _ASM_IA64_TYPES_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#include <asm-generic/int-ll64.h>
|
||||
#else
|
||||
#include <asm-generic/int-l64.h>
|
||||
#endif
|
||||
#include <uapi/asm/types.h>
|
||||
|
||||
#ifdef __ASSEMBLY__
|
||||
# define __IA64_UL(x) (x)
|
||||
# define __IA64_UL_CONST(x) x
|
||||
|
||||
#else
|
||||
# define __IA64_UL(x) ((unsigned long)(x))
|
||||
# define __IA64_UL_CONST(x) x##UL
|
||||
|
||||
/*
|
||||
* These aren't exported outside the kernel to avoid name space clashes
|
||||
*/
|
||||
# ifdef __KERNEL__
|
||||
|
||||
struct fnptr {
|
||||
unsigned long ip;
|
||||
unsigned long gp;
|
||||
};
|
||||
|
||||
# endif /* __KERNEL__ */
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_IA64_TYPES_H */
|
||||
|
||||
@@ -1,12 +0,0 @@
|
||||
#ifndef _ASM_IA64_UCONTEXT_H
|
||||
#define _ASM_IA64_UCONTEXT_H
|
||||
|
||||
struct ucontext {
|
||||
struct sigcontext uc_mcontext;
|
||||
};
|
||||
|
||||
#define uc_link uc_mcontext.sc_gr[0] /* wrong type; nobody cares */
|
||||
#define uc_sigmask uc_mcontext.sc_sigmask
|
||||
#define uc_stack uc_mcontext.sc_stack
|
||||
|
||||
#endif /* _ASM_IA64_UCONTEXT_H */
|
||||
@@ -1,331 +1,14 @@
|
||||
#ifndef _ASM_IA64_UNISTD_H
|
||||
#define _ASM_IA64_UNISTD_H
|
||||
|
||||
/*
|
||||
* IA-64 Linux syscall numbers and inline-functions.
|
||||
*
|
||||
* Copyright (C) 1998-2005 Hewlett-Packard Co
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>
|
||||
*/
|
||||
#ifndef _ASM_IA64_UNISTD_H
|
||||
#define _ASM_IA64_UNISTD_H
|
||||
|
||||
#include <asm/break.h>
|
||||
#include <uapi/asm/unistd.h>
|
||||
|
||||
#define __BREAK_SYSCALL __IA64_BREAK_SYSCALL
|
||||
|
||||
#define __NR_ni_syscall 1024
|
||||
#define __NR_exit 1025
|
||||
#define __NR_read 1026
|
||||
#define __NR_write 1027
|
||||
#define __NR_open 1028
|
||||
#define __NR_close 1029
|
||||
#define __NR_creat 1030
|
||||
#define __NR_link 1031
|
||||
#define __NR_unlink 1032
|
||||
#define __NR_execve 1033
|
||||
#define __NR_chdir 1034
|
||||
#define __NR_fchdir 1035
|
||||
#define __NR_utimes 1036
|
||||
#define __NR_mknod 1037
|
||||
#define __NR_chmod 1038
|
||||
#define __NR_chown 1039
|
||||
#define __NR_lseek 1040
|
||||
#define __NR_getpid 1041
|
||||
#define __NR_getppid 1042
|
||||
#define __NR_mount 1043
|
||||
#define __NR_umount 1044
|
||||
#define __NR_setuid 1045
|
||||
#define __NR_getuid 1046
|
||||
#define __NR_geteuid 1047
|
||||
#define __NR_ptrace 1048
|
||||
#define __NR_access 1049
|
||||
#define __NR_sync 1050
|
||||
#define __NR_fsync 1051
|
||||
#define __NR_fdatasync 1052
|
||||
#define __NR_kill 1053
|
||||
#define __NR_rename 1054
|
||||
#define __NR_mkdir 1055
|
||||
#define __NR_rmdir 1056
|
||||
#define __NR_dup 1057
|
||||
#define __NR_pipe 1058
|
||||
#define __NR_times 1059
|
||||
#define __NR_brk 1060
|
||||
#define __NR_setgid 1061
|
||||
#define __NR_getgid 1062
|
||||
#define __NR_getegid 1063
|
||||
#define __NR_acct 1064
|
||||
#define __NR_ioctl 1065
|
||||
#define __NR_fcntl 1066
|
||||
#define __NR_umask 1067
|
||||
#define __NR_chroot 1068
|
||||
#define __NR_ustat 1069
|
||||
#define __NR_dup2 1070
|
||||
#define __NR_setreuid 1071
|
||||
#define __NR_setregid 1072
|
||||
#define __NR_getresuid 1073
|
||||
#define __NR_setresuid 1074
|
||||
#define __NR_getresgid 1075
|
||||
#define __NR_setresgid 1076
|
||||
#define __NR_getgroups 1077
|
||||
#define __NR_setgroups 1078
|
||||
#define __NR_getpgid 1079
|
||||
#define __NR_setpgid 1080
|
||||
#define __NR_setsid 1081
|
||||
#define __NR_getsid 1082
|
||||
#define __NR_sethostname 1083
|
||||
#define __NR_setrlimit 1084
|
||||
#define __NR_getrlimit 1085
|
||||
#define __NR_getrusage 1086
|
||||
#define __NR_gettimeofday 1087
|
||||
#define __NR_settimeofday 1088
|
||||
#define __NR_select 1089
|
||||
#define __NR_poll 1090
|
||||
#define __NR_symlink 1091
|
||||
#define __NR_readlink 1092
|
||||
#define __NR_uselib 1093
|
||||
#define __NR_swapon 1094
|
||||
#define __NR_swapoff 1095
|
||||
#define __NR_reboot 1096
|
||||
#define __NR_truncate 1097
|
||||
#define __NR_ftruncate 1098
|
||||
#define __NR_fchmod 1099
|
||||
#define __NR_fchown 1100
|
||||
#define __NR_getpriority 1101
|
||||
#define __NR_setpriority 1102
|
||||
#define __NR_statfs 1103
|
||||
#define __NR_fstatfs 1104
|
||||
#define __NR_gettid 1105
|
||||
#define __NR_semget 1106
|
||||
#define __NR_semop 1107
|
||||
#define __NR_semctl 1108
|
||||
#define __NR_msgget 1109
|
||||
#define __NR_msgsnd 1110
|
||||
#define __NR_msgrcv 1111
|
||||
#define __NR_msgctl 1112
|
||||
#define __NR_shmget 1113
|
||||
#define __NR_shmat 1114
|
||||
#define __NR_shmdt 1115
|
||||
#define __NR_shmctl 1116
|
||||
/* also known as klogctl() in GNU libc: */
|
||||
#define __NR_syslog 1117
|
||||
#define __NR_setitimer 1118
|
||||
#define __NR_getitimer 1119
|
||||
/* 1120 was __NR_old_stat */
|
||||
/* 1121 was __NR_old_lstat */
|
||||
/* 1122 was __NR_old_fstat */
|
||||
#define __NR_vhangup 1123
|
||||
#define __NR_lchown 1124
|
||||
#define __NR_remap_file_pages 1125
|
||||
#define __NR_wait4 1126
|
||||
#define __NR_sysinfo 1127
|
||||
#define __NR_clone 1128
|
||||
#define __NR_setdomainname 1129
|
||||
#define __NR_uname 1130
|
||||
#define __NR_adjtimex 1131
|
||||
/* 1132 was __NR_create_module */
|
||||
#define __NR_init_module 1133
|
||||
#define __NR_delete_module 1134
|
||||
/* 1135 was __NR_get_kernel_syms */
|
||||
/* 1136 was __NR_query_module */
|
||||
#define __NR_quotactl 1137
|
||||
#define __NR_bdflush 1138
|
||||
#define __NR_sysfs 1139
|
||||
#define __NR_personality 1140
|
||||
#define __NR_afs_syscall 1141
|
||||
#define __NR_setfsuid 1142
|
||||
#define __NR_setfsgid 1143
|
||||
#define __NR_getdents 1144
|
||||
#define __NR_flock 1145
|
||||
#define __NR_readv 1146
|
||||
#define __NR_writev 1147
|
||||
#define __NR_pread64 1148
|
||||
#define __NR_pwrite64 1149
|
||||
#define __NR__sysctl 1150
|
||||
#define __NR_mmap 1151
|
||||
#define __NR_munmap 1152
|
||||
#define __NR_mlock 1153
|
||||
#define __NR_mlockall 1154
|
||||
#define __NR_mprotect 1155
|
||||
#define __NR_mremap 1156
|
||||
#define __NR_msync 1157
|
||||
#define __NR_munlock 1158
|
||||
#define __NR_munlockall 1159
|
||||
#define __NR_sched_getparam 1160
|
||||
#define __NR_sched_setparam 1161
|
||||
#define __NR_sched_getscheduler 1162
|
||||
#define __NR_sched_setscheduler 1163
|
||||
#define __NR_sched_yield 1164
|
||||
#define __NR_sched_get_priority_max 1165
|
||||
#define __NR_sched_get_priority_min 1166
|
||||
#define __NR_sched_rr_get_interval 1167
|
||||
#define __NR_nanosleep 1168
|
||||
#define __NR_nfsservctl 1169
|
||||
#define __NR_prctl 1170
|
||||
/* 1171 is reserved for backwards compatibility with old __NR_getpagesize */
|
||||
#define __NR_mmap2 1172
|
||||
#define __NR_pciconfig_read 1173
|
||||
#define __NR_pciconfig_write 1174
|
||||
#define __NR_perfmonctl 1175
|
||||
#define __NR_sigaltstack 1176
|
||||
#define __NR_rt_sigaction 1177
|
||||
#define __NR_rt_sigpending 1178
|
||||
#define __NR_rt_sigprocmask 1179
|
||||
#define __NR_rt_sigqueueinfo 1180
|
||||
#define __NR_rt_sigreturn 1181
|
||||
#define __NR_rt_sigsuspend 1182
|
||||
#define __NR_rt_sigtimedwait 1183
|
||||
#define __NR_getcwd 1184
|
||||
#define __NR_capget 1185
|
||||
#define __NR_capset 1186
|
||||
#define __NR_sendfile 1187
|
||||
#define __NR_getpmsg 1188
|
||||
#define __NR_putpmsg 1189
|
||||
#define __NR_socket 1190
|
||||
#define __NR_bind 1191
|
||||
#define __NR_connect 1192
|
||||
#define __NR_listen 1193
|
||||
#define __NR_accept 1194
|
||||
#define __NR_getsockname 1195
|
||||
#define __NR_getpeername 1196
|
||||
#define __NR_socketpair 1197
|
||||
#define __NR_send 1198
|
||||
#define __NR_sendto 1199
|
||||
#define __NR_recv 1200
|
||||
#define __NR_recvfrom 1201
|
||||
#define __NR_shutdown 1202
|
||||
#define __NR_setsockopt 1203
|
||||
#define __NR_getsockopt 1204
|
||||
#define __NR_sendmsg 1205
|
||||
#define __NR_recvmsg 1206
|
||||
#define __NR_pivot_root 1207
|
||||
#define __NR_mincore 1208
|
||||
#define __NR_madvise 1209
|
||||
#define __NR_stat 1210
|
||||
#define __NR_lstat 1211
|
||||
#define __NR_fstat 1212
|
||||
#define __NR_clone2 1213
|
||||
#define __NR_getdents64 1214
|
||||
#define __NR_getunwind 1215
|
||||
#define __NR_readahead 1216
|
||||
#define __NR_setxattr 1217
|
||||
#define __NR_lsetxattr 1218
|
||||
#define __NR_fsetxattr 1219
|
||||
#define __NR_getxattr 1220
|
||||
#define __NR_lgetxattr 1221
|
||||
#define __NR_fgetxattr 1222
|
||||
#define __NR_listxattr 1223
|
||||
#define __NR_llistxattr 1224
|
||||
#define __NR_flistxattr 1225
|
||||
#define __NR_removexattr 1226
|
||||
#define __NR_lremovexattr 1227
|
||||
#define __NR_fremovexattr 1228
|
||||
#define __NR_tkill 1229
|
||||
#define __NR_futex 1230
|
||||
#define __NR_sched_setaffinity 1231
|
||||
#define __NR_sched_getaffinity 1232
|
||||
#define __NR_set_tid_address 1233
|
||||
#define __NR_fadvise64 1234
|
||||
#define __NR_tgkill 1235
|
||||
#define __NR_exit_group 1236
|
||||
#define __NR_lookup_dcookie 1237
|
||||
#define __NR_io_setup 1238
|
||||
#define __NR_io_destroy 1239
|
||||
#define __NR_io_getevents 1240
|
||||
#define __NR_io_submit 1241
|
||||
#define __NR_io_cancel 1242
|
||||
#define __NR_epoll_create 1243
|
||||
#define __NR_epoll_ctl 1244
|
||||
#define __NR_epoll_wait 1245
|
||||
#define __NR_restart_syscall 1246
|
||||
#define __NR_semtimedop 1247
|
||||
#define __NR_timer_create 1248
|
||||
#define __NR_timer_settime 1249
|
||||
#define __NR_timer_gettime 1250
|
||||
#define __NR_timer_getoverrun 1251
|
||||
#define __NR_timer_delete 1252
|
||||
#define __NR_clock_settime 1253
|
||||
#define __NR_clock_gettime 1254
|
||||
#define __NR_clock_getres 1255
|
||||
#define __NR_clock_nanosleep 1256
|
||||
#define __NR_fstatfs64 1257
|
||||
#define __NR_statfs64 1258
|
||||
#define __NR_mbind 1259
|
||||
#define __NR_get_mempolicy 1260
|
||||
#define __NR_set_mempolicy 1261
|
||||
#define __NR_mq_open 1262
|
||||
#define __NR_mq_unlink 1263
|
||||
#define __NR_mq_timedsend 1264
|
||||
#define __NR_mq_timedreceive 1265
|
||||
#define __NR_mq_notify 1266
|
||||
#define __NR_mq_getsetattr 1267
|
||||
#define __NR_kexec_load 1268
|
||||
#define __NR_vserver 1269
|
||||
#define __NR_waitid 1270
|
||||
#define __NR_add_key 1271
|
||||
#define __NR_request_key 1272
|
||||
#define __NR_keyctl 1273
|
||||
#define __NR_ioprio_set 1274
|
||||
#define __NR_ioprio_get 1275
|
||||
#define __NR_move_pages 1276
|
||||
#define __NR_inotify_init 1277
|
||||
#define __NR_inotify_add_watch 1278
|
||||
#define __NR_inotify_rm_watch 1279
|
||||
#define __NR_migrate_pages 1280
|
||||
#define __NR_openat 1281
|
||||
#define __NR_mkdirat 1282
|
||||
#define __NR_mknodat 1283
|
||||
#define __NR_fchownat 1284
|
||||
#define __NR_futimesat 1285
|
||||
#define __NR_newfstatat 1286
|
||||
#define __NR_unlinkat 1287
|
||||
#define __NR_renameat 1288
|
||||
#define __NR_linkat 1289
|
||||
#define __NR_symlinkat 1290
|
||||
#define __NR_readlinkat 1291
|
||||
#define __NR_fchmodat 1292
|
||||
#define __NR_faccessat 1293
|
||||
#define __NR_pselect6 1294
|
||||
#define __NR_ppoll 1295
|
||||
#define __NR_unshare 1296
|
||||
#define __NR_splice 1297
|
||||
#define __NR_set_robust_list 1298
|
||||
#define __NR_get_robust_list 1299
|
||||
#define __NR_sync_file_range 1300
|
||||
#define __NR_tee 1301
|
||||
#define __NR_vmsplice 1302
|
||||
#define __NR_fallocate 1303
|
||||
#define __NR_getcpu 1304
|
||||
#define __NR_epoll_pwait 1305
|
||||
#define __NR_utimensat 1306
|
||||
#define __NR_signalfd 1307
|
||||
#define __NR_timerfd 1308
|
||||
#define __NR_eventfd 1309
|
||||
#define __NR_timerfd_create 1310
|
||||
#define __NR_timerfd_settime 1311
|
||||
#define __NR_timerfd_gettime 1312
|
||||
#define __NR_signalfd4 1313
|
||||
#define __NR_eventfd2 1314
|
||||
#define __NR_epoll_create1 1315
|
||||
#define __NR_dup3 1316
|
||||
#define __NR_pipe2 1317
|
||||
#define __NR_inotify_init1 1318
|
||||
#define __NR_preadv 1319
|
||||
#define __NR_pwritev 1320
|
||||
#define __NR_rt_tgsigqueueinfo 1321
|
||||
#define __NR_recvmmsg 1322
|
||||
#define __NR_fanotify_init 1323
|
||||
#define __NR_fanotify_mark 1324
|
||||
#define __NR_prlimit64 1325
|
||||
#define __NR_name_to_handle_at 1326
|
||||
#define __NR_open_by_handle_at 1327
|
||||
#define __NR_clock_adjtime 1328
|
||||
#define __NR_syncfs 1329
|
||||
#define __NR_setns 1330
|
||||
#define __NR_sendmmsg 1331
|
||||
#define __NR_process_vm_readv 1332
|
||||
#define __NR_process_vm_writev 1333
|
||||
#define __NR_accept4 1334
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
|
||||
#define NR_syscalls 311 /* length of syscall table */
|
||||
@@ -382,5 +65,4 @@ asmlinkage long sys_rt_sigaction(int sig,
|
||||
#define cond_syscall(x) asmlinkage long x (void) __attribute__((weak,alias("sys_ni_syscall")))
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_IA64_UNISTD_H */
|
||||
|
||||
@@ -1,20 +1,11 @@
|
||||
#ifndef _ASM_IA64_USTACK_H
|
||||
#define _ASM_IA64_USTACK_H
|
||||
|
||||
/*
|
||||
* Constants for the user stack size
|
||||
*/
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#include <asm/page.h>
|
||||
#include <uapi/asm/ustack.h>
|
||||
|
||||
/* The absolute hard limit for stack size is 1/2 of the mappable space in the region */
|
||||
#define MAX_USER_STACK_SIZE (RGN_MAP_LIMIT/2)
|
||||
#define STACK_TOP (0x6000000000000000UL + RGN_MAP_LIMIT)
|
||||
#define STACK_TOP_MAX STACK_TOP
|
||||
#endif
|
||||
|
||||
/* Make a default stack size of 2GiB */
|
||||
#define DEFAULT_USER_STACK_SIZE (1UL << 31)
|
||||
|
||||
#endif /* _ASM_IA64_USTACK_H */
|
||||
|
||||
Reference in New Issue
Block a user