Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson: "Driver updates for ARM SoCs. A slew of changes this release cycle. The reset driver tree, that we merge through arm-soc for historical reasons, is also sizable this time around. Among the changes: - clps711x: Treewide changes to compatible strings, merged here for simplicity. - Qualcomm: SCM firmware driver cleanups, move to platform driver - ux500: Major cleanups, removal of old mach-specific infrastructure. - Atmel external bus memory driver - Move of brcmstb platform to the rest of bcm - PMC driver updates for tegra, various fixes and improvements - Samsung platform driver updates to support 64-bit Exynos platforms - Reset controller cleanups moving to devm_reset_controller_register() APIs - Reset controller driver for Amlogic Meson - Reset controller driver for Hisilicon hi6220 - ARM SCPI power domain support" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (100 commits) ARM: ux500: consolidate base platform files ARM: ux500: move soc_id driver to drivers/soc ARM: ux500: call ux500_setup_id later ARM: ux500: consolidate soc_device code in id.c ARM: ux500: remove cpu_is_u* helpers ARM: ux500: use CLK_OF_DECLARE() ARM: ux500: move l2x0 init to .init_irq mfd: db8500 stop passing around platform data ASoC: ab8500-codec: remove platform data based probe ARM: ux500: move ab8500_regulator_plat_data into driver ARM: ux500: remove unused regulator data soc: raspberrypi-power: add CONFIG_OF dependency firmware: scpi: add CONFIG_OF dependency video: clps711x-fb: Changing the compatibility string to match with the smallest supported chip input: clps711x-keypad: Changing the compatibility string to match with the smallest supported chip pwm: clps711x: Changing the compatibility string to match with the smallest supported chip serial: clps711x: Changing the compatibility string to match with the smallest supported chip irqchip: clps711x: Changing the compatibility string to match with the smallest supported chip clocksource: clps711x: Changing the compatibility string to match with the smallest supported chip clk: clps711x: Changing the compatibility string to match with the smallest supported chip ...
This commit is contained in:
Linus Torvalds
@@ -2,11 +2,9 @@
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# Makefile for the linux kernel, U8500 machine.
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#
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obj-y := cpu.o id.o pm.o
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obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
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obj-y := pm.o
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obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o
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obj-$(CONFIG_MACH_MOP500) += board-mop500-regulators.o \
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board-mop500-audio.o
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obj-$(CONFIG_MACH_MOP500) += board-mop500-audio.o
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obj-$(CONFIG_SMP) += platsmp.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
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A különbségek nem kerülnek megjelenítésre, mivel a fájl túl nagy
Load Diff
@@ -1,24 +0,0 @@
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/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* License Terms: GNU General Public License v2
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*
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* Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
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*
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* MOP500 board specific initialization for regulators
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*/
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#ifndef __BOARD_MOP500_REGULATORS_H
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#define __BOARD_MOP500_REGULATORS_H
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#include <linux/regulator/machine.h>
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#include <linux/regulator/ab8500.h>
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extern struct ab8500_regulator_platform_data ab8500_regulator_plat_data;
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extern struct ab8500_regulator_platform_data ab8505_regulator_plat_data;
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extern struct regulator_init_data tps61052_regulator;
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extern struct regulator_init_data gpio_en_3v3_regulator;
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void mop500_regulator_init(void);
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#endif
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@@ -1,67 +0,0 @@
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/*
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* Copyright (C) ST-Ericsson SA 2011
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*
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/outercache.h>
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#include <asm/hardware/cache-l2x0.h>
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#include "db8500-regs.h"
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#include "id.h"
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static int __init ux500_l2x0_unlock(void)
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{
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int i;
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struct device_node *np;
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void __iomem *l2x0_base;
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np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
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l2x0_base = of_iomap(np, 0);
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of_node_put(np);
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if (!l2x0_base)
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return -ENODEV;
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/*
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* Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
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* apparently locks both caches before jumping to the kernel. The
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* l2x0 core will not touch the unlock registers if the l2x0 is
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* already enabled, so we do it right here instead. The PL310 has
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* 8 sets of registers, one per possible CPU.
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*/
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for (i = 0; i < 8; i++) {
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writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
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i * L2X0_LOCKDOWN_STRIDE);
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writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
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i * L2X0_LOCKDOWN_STRIDE);
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}
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iounmap(l2x0_base);
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return 0;
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}
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static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
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{
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/*
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* We can't write to secure registers as we are in non-secure
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* mode, until we have some SMI service available.
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*/
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}
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static int __init ux500_l2x0_init(void)
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{
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/* Multiplatform guard */
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if (!((cpu_is_u8500_family() || cpu_is_ux540_family())))
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return -ENODEV;
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/* Unlock before init */
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ux500_l2x0_unlock();
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outer_cache.write_sec = ux500_l2c310_write_sec;
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l2x0_of_init(0, ~0);
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return 0;
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}
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early_initcall(ux500_l2x0_init);
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@@ -12,41 +12,107 @@
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/mfd/dbx500-prcmu.h>
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#include <linux/platform_data/arm-ux500-pm.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/mfd/abx500/ab8500.h>
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#include <linux/mfd/dbx500-prcmu.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/perf/arm_pmu.h>
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#include <linux/regulator/machine.h>
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#include <linux/random.h>
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#include <asm/outercache.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach/map.h>
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#include <asm/mach/arch.h>
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#include "setup.h"
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#include "board-mop500-regulators.h"
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#include "board-mop500.h"
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#include "db8500-regs.h"
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#include "id.h"
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static struct ab8500_platform_data ab8500_platdata = {
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.regulator = &ab8500_regulator_plat_data,
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};
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|
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static struct prcmu_pdata db8500_prcmu_pdata = {
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.ab_platdata = &ab8500_platdata,
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.version_offset = DB8500_PRCMU_FW_VERSION_OFFSET,
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.legacy_offset = DB8500_PRCMU_LEGACY_OFFSET,
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};
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|
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static void __init u8500_map_io(void)
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static int __init ux500_l2x0_unlock(void)
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{
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debug_ll_io_init();
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ux500_setup_id();
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int i;
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struct device_node *np;
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void __iomem *l2x0_base;
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|
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np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
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l2x0_base = of_iomap(np, 0);
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of_node_put(np);
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if (!l2x0_base)
|
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return -ENODEV;
|
||||
|
||||
/*
|
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* Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
|
||||
* apparently locks both caches before jumping to the kernel. The
|
||||
* l2x0 core will not touch the unlock registers if the l2x0 is
|
||||
* already enabled, so we do it right here instead. The PL310 has
|
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* 8 sets of registers, one per possible CPU.
|
||||
*/
|
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for (i = 0; i < 8; i++) {
|
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writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
|
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i * L2X0_LOCKDOWN_STRIDE);
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writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
|
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i * L2X0_LOCKDOWN_STRIDE);
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}
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iounmap(l2x0_base);
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return 0;
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}
|
||||
|
||||
static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
|
||||
{
|
||||
/*
|
||||
* We can't write to secure registers as we are in non-secure
|
||||
* mode, until we have some SMI service available.
|
||||
*/
|
||||
}
|
||||
|
||||
/*
|
||||
* FIXME: Should we set up the GPIO domain here?
|
||||
*
|
||||
* The problem is that we cannot put the interrupt resources into the platform
|
||||
* device until the irqdomain has been added. Right now, we set the GIC interrupt
|
||||
* domain from init_irq(), then load the gpio driver from
|
||||
* core_initcall(nmk_gpio_init) and add the platform devices from
|
||||
* arch_initcall(customize_machine).
|
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*
|
||||
* This feels fragile because it depends on the gpio device getting probed
|
||||
* _before_ any device uses the gpio interrupts.
|
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*/
|
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static void __init ux500_init_irq(void)
|
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{
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struct device_node *np;
|
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struct resource r;
|
||||
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irqchip_init();
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np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
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of_address_to_resource(np, 0, &r);
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of_node_put(np);
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if (!r.start) {
|
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pr_err("could not find PRCMU base resource\n");
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return;
|
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}
|
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prcmu_early_init(r.start, r.end-r.start);
|
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ux500_pm_init(r.start, r.end-r.start);
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/* Unlock before init */
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ux500_l2x0_unlock();
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outer_cache.write_sec = ux500_l2c310_write_sec;
|
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}
|
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static void ux500_restart(enum reboot_mode mode, const char *cmd)
|
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{
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local_irq_disable();
|
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local_fiq_disable();
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prcmu_system_reset(0);
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}
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|
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/*
|
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@@ -73,31 +139,6 @@ static struct arm_pmu_platdata db8500_pmu_platdata = {
|
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.handle_irq = db8500_pmu_handler,
|
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};
|
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|
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static const char *db8500_read_soc_id(void)
|
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{
|
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void __iomem *uid;
|
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const char *retstr;
|
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uid = ioremap(U8500_BB_UID_BASE, 0x20);
|
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if (!uid)
|
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return NULL;
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/* Throw these device-specific numbers into the entropy pool */
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add_device_randomness(uid, 0x14);
|
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retstr = kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
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readl((u32 *)uid+0),
|
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readl((u32 *)uid+1), readl((u32 *)uid+2),
|
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readl((u32 *)uid+3), readl((u32 *)uid+4));
|
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iounmap(uid);
|
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return retstr;
|
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}
|
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|
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static struct device * __init db8500_soc_device_init(void)
|
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{
|
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const char *soc_id = db8500_read_soc_id();
|
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|
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return ux500_soc_device_init(soc_id);
|
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}
|
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|
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static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
|
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/* Requires call-back bindings. */
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OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
|
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@@ -111,8 +152,7 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
|
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OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
|
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"ux500-msp-i2s.3", &msp3_platform_data),
|
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/* Requires non-DT:able platform data. */
|
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OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
|
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&db8500_prcmu_pdata),
|
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OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL),
|
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OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
|
||||
OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
|
||||
OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
|
||||
@@ -121,8 +161,7 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
|
||||
};
|
||||
|
||||
static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
|
||||
OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
|
||||
&db8500_prcmu_pdata),
|
||||
OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL),
|
||||
{},
|
||||
};
|
||||
|
||||
@@ -136,15 +175,13 @@ static const struct of_device_id u8500_local_bus_nodes[] = {
|
||||
|
||||
static void __init u8500_init_machine(void)
|
||||
{
|
||||
struct device *parent = db8500_soc_device_init();
|
||||
|
||||
/* automatically probe child nodes of dbx5x0 devices */
|
||||
if (of_machine_is_compatible("st-ericsson,u8540"))
|
||||
of_platform_populate(NULL, u8500_local_bus_nodes,
|
||||
u8540_auxdata_lookup, parent);
|
||||
u8540_auxdata_lookup, NULL);
|
||||
else
|
||||
of_platform_populate(NULL, u8500_local_bus_nodes,
|
||||
u8500_auxdata_lookup, parent);
|
||||
u8500_auxdata_lookup, NULL);
|
||||
}
|
||||
|
||||
static const char * stericsson_dt_platform_compat[] = {
|
||||
@@ -156,10 +193,10 @@ static const char * stericsson_dt_platform_compat[] = {
|
||||
};
|
||||
|
||||
DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
|
||||
.map_io = u8500_map_io,
|
||||
.l2c_aux_val = 0,
|
||||
.l2c_aux_mask = ~0,
|
||||
.init_irq = ux500_init_irq,
|
||||
.init_machine = u8500_init_machine,
|
||||
.init_late = NULL,
|
||||
.dt_compat = stericsson_dt_platform_compat,
|
||||
.restart = ux500_restart,
|
||||
MACHINE_END
|
||||
|
||||
@@ -1,148 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2010
|
||||
*
|
||||
* Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
|
||||
* Author: Lee Jones <lee.jones@linaro.org> for ST-Ericsson
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/mfd/dbx500-prcmu.h>
|
||||
#include <linux/sys_soc.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/stat.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/irqchip.h>
|
||||
#include <linux/irqchip/arm-gic.h>
|
||||
#include <linux/platform_data/clk-ux500.h>
|
||||
#include <linux/platform_data/arm-ux500-pm.h>
|
||||
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include "setup.h"
|
||||
|
||||
#include "board-mop500.h"
|
||||
#include "db8500-regs.h"
|
||||
#include "id.h"
|
||||
|
||||
void ux500_restart(enum reboot_mode mode, const char *cmd)
|
||||
{
|
||||
local_irq_disable();
|
||||
local_fiq_disable();
|
||||
|
||||
prcmu_system_reset(0);
|
||||
}
|
||||
|
||||
/*
|
||||
* FIXME: Should we set up the GPIO domain here?
|
||||
*
|
||||
* The problem is that we cannot put the interrupt resources into the platform
|
||||
* device until the irqdomain has been added. Right now, we set the GIC interrupt
|
||||
* domain from init_irq(), then load the gpio driver from
|
||||
* core_initcall(nmk_gpio_init) and add the platform devices from
|
||||
* arch_initcall(customize_machine).
|
||||
*
|
||||
* This feels fragile because it depends on the gpio device getting probed
|
||||
* _before_ any device uses the gpio interrupts.
|
||||
*/
|
||||
void __init ux500_init_irq(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
struct resource r;
|
||||
|
||||
irqchip_init();
|
||||
np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
|
||||
of_address_to_resource(np, 0, &r);
|
||||
of_node_put(np);
|
||||
if (!r.start) {
|
||||
pr_err("could not find PRCMU base resource\n");
|
||||
return;
|
||||
}
|
||||
prcmu_early_init(r.start, r.end-r.start);
|
||||
ux500_pm_init(r.start, r.end-r.start);
|
||||
|
||||
/*
|
||||
* Init clocks here so that they are available for system timer
|
||||
* initialization.
|
||||
*/
|
||||
if (cpu_is_u8500_family())
|
||||
u8500_clk_init();
|
||||
else if (cpu_is_u9540())
|
||||
u9540_clk_init();
|
||||
else if (cpu_is_u8540())
|
||||
u8540_clk_init();
|
||||
}
|
||||
|
||||
static const char * __init ux500_get_machine(void)
|
||||
{
|
||||
return kasprintf(GFP_KERNEL, "DB%4x", dbx500_partnumber());
|
||||
}
|
||||
|
||||
static const char * __init ux500_get_family(void)
|
||||
{
|
||||
return kasprintf(GFP_KERNEL, "ux500");
|
||||
}
|
||||
|
||||
static const char * __init ux500_get_revision(void)
|
||||
{
|
||||
unsigned int rev = dbx500_revision();
|
||||
|
||||
if (rev == 0x01)
|
||||
return kasprintf(GFP_KERNEL, "%s", "ED");
|
||||
else if (rev >= 0xA0)
|
||||
return kasprintf(GFP_KERNEL, "%d.%d",
|
||||
(rev >> 4) - 0xA + 1, rev & 0xf);
|
||||
|
||||
return kasprintf(GFP_KERNEL, "%s", "Unknown");
|
||||
}
|
||||
|
||||
static ssize_t ux500_get_process(struct device *dev,
|
||||
struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
if (dbx500_id.process == 0x00)
|
||||
return sprintf(buf, "Standard\n");
|
||||
|
||||
return sprintf(buf, "%02xnm\n", dbx500_id.process);
|
||||
}
|
||||
|
||||
static void __init soc_info_populate(struct soc_device_attribute *soc_dev_attr,
|
||||
const char *soc_id)
|
||||
{
|
||||
soc_dev_attr->soc_id = soc_id;
|
||||
soc_dev_attr->machine = ux500_get_machine();
|
||||
soc_dev_attr->family = ux500_get_family();
|
||||
soc_dev_attr->revision = ux500_get_revision();
|
||||
}
|
||||
|
||||
static const struct device_attribute ux500_soc_attr =
|
||||
__ATTR(process, S_IRUGO, ux500_get_process, NULL);
|
||||
|
||||
struct device * __init ux500_soc_device_init(const char *soc_id)
|
||||
{
|
||||
struct device *parent;
|
||||
struct soc_device *soc_dev;
|
||||
struct soc_device_attribute *soc_dev_attr;
|
||||
|
||||
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
|
||||
if (!soc_dev_attr)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
soc_info_populate(soc_dev_attr, soc_id);
|
||||
|
||||
soc_dev = soc_device_register(soc_dev_attr);
|
||||
if (IS_ERR(soc_dev)) {
|
||||
kfree(soc_dev_attr);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
parent = soc_device_to_device(soc_dev);
|
||||
device_create_file(parent, &ux500_soc_attr);
|
||||
|
||||
return parent;
|
||||
}
|
||||
@@ -1,116 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2010
|
||||
*
|
||||
* Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <asm/cputype.h>
|
||||
#include <asm/tlbflush.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include "setup.h"
|
||||
|
||||
#include "db8500-regs.h"
|
||||
#include "id.h"
|
||||
|
||||
struct dbx500_asic_id dbx500_id;
|
||||
|
||||
static unsigned int __init ux500_read_asicid(phys_addr_t addr)
|
||||
{
|
||||
phys_addr_t base = addr & ~0xfff;
|
||||
struct map_desc desc = {
|
||||
.virtual = (unsigned long)UX500_VIRT_ROM,
|
||||
.pfn = __phys_to_pfn(base),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
};
|
||||
|
||||
iotable_init(&desc, 1);
|
||||
|
||||
/* As in devicemaps_init() */
|
||||
local_flush_tlb_all();
|
||||
flush_cache_all();
|
||||
|
||||
return readl(UX500_VIRT_ROM + (addr & 0xfff));
|
||||
}
|
||||
|
||||
static void ux500_print_soc_info(unsigned int asicid)
|
||||
{
|
||||
unsigned int rev = dbx500_revision();
|
||||
|
||||
pr_info("DB%4x ", dbx500_partnumber());
|
||||
|
||||
if (rev == 0x01)
|
||||
pr_cont("Early Drop");
|
||||
else if (rev >= 0xA0)
|
||||
pr_cont("v%d.%d" , (rev >> 4) - 0xA + 1, rev & 0xf);
|
||||
else
|
||||
pr_cont("Unknown");
|
||||
|
||||
pr_cont(" [%#010x]\n", asicid);
|
||||
}
|
||||
|
||||
static unsigned int partnumber(unsigned int asicid)
|
||||
{
|
||||
return (asicid >> 8) & 0xffff;
|
||||
}
|
||||
|
||||
/*
|
||||
* SOC MIDR ASICID ADDRESS ASICID VALUE
|
||||
* DB8500ed 0x410fc090 0x9001FFF4 0x00850001
|
||||
* DB8500v1 0x411fc091 0x9001FFF4 0x008500A0
|
||||
* DB8500v1.1 0x411fc091 0x9001FFF4 0x008500A1
|
||||
* DB8500v2 0x412fc091 0x9001DBF4 0x008500B0
|
||||
* DB8520v2.2 0x412fc091 0x9001DBF4 0x008500B2
|
||||
* DB5500v1 0x412fc091 0x9001FFF4 0x005500A0
|
||||
* DB9540 0x413fc090 0xFFFFDBF4 0x009540xx
|
||||
*/
|
||||
|
||||
void __init ux500_setup_id(void)
|
||||
{
|
||||
unsigned int cpuid = read_cpuid_id();
|
||||
unsigned int asicid = 0;
|
||||
phys_addr_t addr = 0;
|
||||
|
||||
switch (cpuid) {
|
||||
case 0x410fc090: /* DB8500ed */
|
||||
case 0x411fc091: /* DB8500v1 */
|
||||
addr = 0x9001FFF4;
|
||||
break;
|
||||
|
||||
case 0x412fc091: /* DB8520 / DB8500v2 / DB5500v1 */
|
||||
asicid = ux500_read_asicid(0x9001DBF4);
|
||||
if (partnumber(asicid) == 0x8500 ||
|
||||
partnumber(asicid) == 0x8520)
|
||||
/* DB8500v2 */
|
||||
break;
|
||||
|
||||
/* DB5500v1 */
|
||||
addr = 0x9001FFF4;
|
||||
break;
|
||||
|
||||
case 0x413fc090: /* DB9540 */
|
||||
addr = 0xFFFFDBF4;
|
||||
break;
|
||||
}
|
||||
|
||||
if (addr)
|
||||
asicid = ux500_read_asicid(addr);
|
||||
|
||||
if (!asicid) {
|
||||
pr_err("Unable to identify SoC\n");
|
||||
ux500_unknown_soc();
|
||||
}
|
||||
|
||||
dbx500_id.process = asicid >> 24;
|
||||
dbx500_id.partnumber = partnumber(asicid);
|
||||
dbx500_id.revision = asicid & 0xff;
|
||||
|
||||
ux500_print_soc_info(asicid);
|
||||
}
|
||||
@@ -1,144 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2010
|
||||
*
|
||||
* Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
|
||||
#ifndef __MACH_UX500_ID
|
||||
#define __MACH_UX500_ID
|
||||
|
||||
/**
|
||||
* struct dbx500_asic_id - fields of the ASIC ID
|
||||
* @process: the manufacturing process, 0x40 is 40 nm 0x00 is "standard"
|
||||
* @partnumber: hithereto 0x8500 for DB8500
|
||||
* @revision: version code in the series
|
||||
*/
|
||||
struct dbx500_asic_id {
|
||||
u16 partnumber;
|
||||
u8 revision;
|
||||
u8 process;
|
||||
};
|
||||
|
||||
extern struct dbx500_asic_id dbx500_id;
|
||||
|
||||
static inline unsigned int __attribute_const__ dbx500_partnumber(void)
|
||||
{
|
||||
return dbx500_id.partnumber;
|
||||
}
|
||||
|
||||
static inline unsigned int __attribute_const__ dbx500_revision(void)
|
||||
{
|
||||
return dbx500_id.revision;
|
||||
}
|
||||
|
||||
/*
|
||||
* SOCs
|
||||
*/
|
||||
|
||||
static inline bool __attribute_const__ cpu_is_u8500(void)
|
||||
{
|
||||
return dbx500_partnumber() == 0x8500;
|
||||
}
|
||||
|
||||
static inline bool __attribute_const__ cpu_is_u8520(void)
|
||||
{
|
||||
return dbx500_partnumber() == 0x8520;
|
||||
}
|
||||
|
||||
static inline bool cpu_is_u8500_family(void)
|
||||
{
|
||||
return cpu_is_u8500() || cpu_is_u8520();
|
||||
}
|
||||
|
||||
static inline bool __attribute_const__ cpu_is_u9540(void)
|
||||
{
|
||||
return dbx500_partnumber() == 0x9540;
|
||||
}
|
||||
|
||||
static inline bool __attribute_const__ cpu_is_u8540(void)
|
||||
{
|
||||
return dbx500_partnumber() == 0x8540;
|
||||
}
|
||||
|
||||
static inline bool __attribute_const__ cpu_is_u8580(void)
|
||||
{
|
||||
return dbx500_partnumber() == 0x8580;
|
||||
}
|
||||
|
||||
static inline bool cpu_is_ux540_family(void)
|
||||
{
|
||||
return cpu_is_u9540() || cpu_is_u8540() || cpu_is_u8580();
|
||||
}
|
||||
|
||||
/*
|
||||
* 8500 revisions
|
||||
*/
|
||||
|
||||
static inline bool __attribute_const__ cpu_is_u8500ed(void)
|
||||
{
|
||||
return cpu_is_u8500() && dbx500_revision() == 0x00;
|
||||
}
|
||||
|
||||
static inline bool __attribute_const__ cpu_is_u8500v1(void)
|
||||
{
|
||||
return cpu_is_u8500() && (dbx500_revision() & 0xf0) == 0xA0;
|
||||
}
|
||||
|
||||
static inline bool __attribute_const__ cpu_is_u8500v10(void)
|
||||
{
|
||||
return cpu_is_u8500() && dbx500_revision() == 0xA0;
|
||||
}
|
||||
|
||||
static inline bool __attribute_const__ cpu_is_u8500v11(void)
|
||||
{
|
||||
return cpu_is_u8500() && dbx500_revision() == 0xA1;
|
||||
}
|
||||
|
||||
static inline bool __attribute_const__ cpu_is_u8500v2(void)
|
||||
{
|
||||
return cpu_is_u8500() && ((dbx500_revision() & 0xf0) == 0xB0);
|
||||
}
|
||||
|
||||
static inline bool cpu_is_u8500v20(void)
|
||||
{
|
||||
return cpu_is_u8500() && (dbx500_revision() == 0xB0);
|
||||
}
|
||||
|
||||
static inline bool cpu_is_u8500v21(void)
|
||||
{
|
||||
return cpu_is_u8500() && (dbx500_revision() == 0xB1);
|
||||
}
|
||||
|
||||
static inline bool cpu_is_u8500v22(void)
|
||||
{
|
||||
return cpu_is_u8500() && (dbx500_revision() == 0xB2);
|
||||
}
|
||||
|
||||
static inline bool cpu_is_u8500v20_or_later(void)
|
||||
{
|
||||
return (cpu_is_u8500() && !cpu_is_u8500v10() && !cpu_is_u8500v11());
|
||||
}
|
||||
|
||||
/*
|
||||
* 8540 revisions
|
||||
*/
|
||||
|
||||
static inline bool __attribute_const__ cpu_is_u8540v10(void)
|
||||
{
|
||||
return cpu_is_u8540() && dbx500_revision() == 0xA0;
|
||||
}
|
||||
|
||||
static inline bool __attribute_const__ cpu_is_u8580v10(void)
|
||||
{
|
||||
return cpu_is_u8580() && dbx500_revision() == 0xA0;
|
||||
}
|
||||
|
||||
static inline bool ux500_is_svp(void)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
#define ux500_unknown_soc() BUG()
|
||||
|
||||
#endif
|
||||
@@ -26,7 +26,6 @@
|
||||
#include "setup.h"
|
||||
|
||||
#include "db8500-regs.h"
|
||||
#include "id.h"
|
||||
|
||||
/* Magic triggers in backup RAM */
|
||||
#define UX500_CPU1_JUMPADDR_OFFSET 0x1FF4
|
||||
|
||||
@@ -11,18 +11,6 @@
|
||||
#ifndef __ASM_ARCH_SETUP_H
|
||||
#define __ASM_ARCH_SETUP_H
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mfd/abx500/ab8500.h>
|
||||
|
||||
void ux500_restart(enum reboot_mode mode, const char *cmd);
|
||||
|
||||
void __init ux500_setup_id(void);
|
||||
|
||||
extern void __init ux500_init_irq(void);
|
||||
|
||||
extern struct device *ux500_soc_device_init(const char *soc_id);
|
||||
|
||||
extern void ux500_cpu_die(unsigned int cpu);
|
||||
|
||||
#endif /* __ASM_ARCH_SETUP_H */
|
||||
|
||||
Reference in New Issue
Block a user