Merge 00937f36b0 ("Merge tag 'pci-v5.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci") into android-mainline

Steps on the way to 5.10-rc1

Resolves conflicts in:
	fs/ext4/dir.c
	fs/ext4/ext4.h
	fs/ext4/namei.c

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: Id6e2b1b8af69519089493f32617f1b2b06dbf434
This commit is contained in:
Greg Kroah-Hartman
2020-10-26 11:24:30 +01:00
85 changed files with 2551 additions and 1792 deletions

View File

@@ -9,12 +9,15 @@ title: Brcmstb PCIe Host Controller Device Tree Bindings
maintainers:
- Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
allOf:
- $ref: /schemas/pci/pci-bus.yaml#
properties:
compatible:
const: brcm,bcm2711-pcie # The Raspberry Pi 4
items:
- enum:
- brcm,bcm2711-pcie # The Raspberry Pi 4
- brcm,bcm7211-pcie # Broadcom STB version of RPi4
- brcm,bcm7278-pcie # Broadcom 7278 Arm
- brcm,bcm7216-pcie # Broadcom 7216 Arm
- brcm,bcm7445-pcie # Broadcom 7445 Arm
reg:
maxItems: 1
@@ -34,10 +37,12 @@ properties:
- const: msi
ranges:
maxItems: 1
minItems: 1
maxItems: 4
dma-ranges:
maxItems: 1
minItems: 1
maxItems: 6
clocks:
maxItems: 1
@@ -58,8 +63,31 @@ properties:
aspm-no-l0s: true
resets:
description: for "brcm,bcm7216-pcie", must be a valid reset
phandle pointing to the RESCAL reset controller provider node.
$ref: "/schemas/types.yaml#/definitions/phandle"
reset-names:
items:
- const: rescal
brcm,scb-sizes:
description: u64 giving the 64bit PCIe memory
viewport size of a memory controller. There may be up to
three controllers, and each size must be a power of two
with a size greater or equal to the amount of memory the
controller supports. Note that each memory controller
may have two component regions -- base and extended -- so
this information cannot be deduced from the dma-ranges.
$ref: /schemas/types.yaml#/definitions/uint64-array
items:
minItems: 1
maxItems: 3
required:
- reg
- ranges
- dma-ranges
- "#interrupt-cells"
- interrupts
@@ -68,6 +96,18 @@ required:
- interrupt-map
- msi-controller
allOf:
- $ref: /schemas/pci/pci-bus.yaml#
- if:
properties:
compatible:
contains:
const: brcm,bcm7216-pcie
then:
required:
- resets
- reset-names
unevaluatedProperties: false
examples:
@@ -93,7 +133,9 @@ examples:
msi-parent = <&pcie0>;
msi-controller;
ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>,
<0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>;
brcm,enable-ssc;
brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>;
};
};

View File

@@ -24,6 +24,8 @@ Required properties:
"fsl,ls1028a-pcie"
EP mode:
"fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"
"fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep"
"fsl,ls2088a-pcie-ep", "fsl,ls-pcie-ep"
- reg: base addresses and lengths of the PCIe controller register blocks.
- interrupts: A list of interrupt outputs of the controller. Must contain an
entry for each entry in the interrupt-names property.

View File

@@ -14,8 +14,12 @@ maintainers:
properties:
compatible:
items:
- const: renesas,r8a774c0-pcie-ep
- const: renesas,rcar-gen3-pcie-ep
- enum:
- renesas,r8a774a1-pcie-ep # RZ/G2M
- renesas,r8a774b1-pcie-ep # RZ/G2N
- renesas,r8a774c0-pcie-ep # RZ/G2E
- renesas,r8a774e1-pcie-ep # RZ/G2H
- const: renesas,rcar-gen3-pcie-ep # R-Car Gen3 and RZ/G2
reg:
maxItems: 5

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@@ -1,7 +1,8 @@
* Renesas R-Car PCIe interface
Required properties:
compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;
compatible: "renesas,pcie-r8a7742" for the R8A7742 SoC;
"renesas,pcie-r8a7743" for the R8A7743 SoC;
"renesas,pcie-r8a7744" for the R8A7744 SoC;
"renesas,pcie-r8a774a1" for the R8A774A1 SoC;
"renesas,pcie-r8a774b1" for the R8A774B1 SoC;

View File

@@ -23,14 +23,22 @@ properties:
const: socionext,uniphier-pro5-pcie-ep
reg:
maxItems: 4
minItems: 4
maxItems: 5
reg-names:
items:
- const: dbi
- const: dbi2
- const: link
- const: addr_space
oneOf:
- items:
- const: dbi
- const: dbi2
- const: link
- const: addr_space
- items:
- const: dbi
- const: dbi2
- const: link
- const: addr_space
- const: atu
clocks:
maxItems: 2

View File

@@ -16,6 +16,7 @@ Required properties:
"dbi" - controller configuration registers
"link" - SoC-specific glue layer registers
"config" - PCIe configuration space
"atu" - iATU registers for DWC version 4.80 or later
- clocks: A phandle to the clock gate for PCIe glue layer including
the host controller.
- resets: A phandle to the reset line for PCIe glue layer including