Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Ingo Molnar: - misc fixes all around the map - block non-root vm86(old) if mmap_min_addr != 0 - two small debuggability improvements - removal of obsolete paravirt op * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/platform: Fix Geode LX timekeeping in the generic x86 build x86/apic: Serialize LVTT and TSC_DEADLINE writes x86/ioapic: Force affinity setting in setup_ioapic_dest() x86/paravirt: Remove the unused pv_time_ops::get_tsc_khz method x86/ldt: Fix small LDT allocation for Xen x86/vm86: Fix the misleading CONFIG_VM86 Kconfig help text x86/cpu: Print family/model/stepping in hex x86/vm86: Block non-root vm86(old) if mmap_min_addr != 0 x86/alternatives: Make optimize_nops() interrupt safe and synced x86/mm/srat: Print non-volatile flag in SRAT x86/cpufeatures: Enable cpuid for Intel SHA extensions
このコミットが含まれているのは:
@@ -338,10 +338,15 @@ done:
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static void __init_or_module optimize_nops(struct alt_instr *a, u8 *instr)
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{
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unsigned long flags;
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if (instr[0] != 0x90)
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return;
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local_irq_save(flags);
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add_nops(instr + (a->instrlen - a->padlen), a->padlen);
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sync_core();
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local_irq_restore(flags);
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DUMP_BYTES(instr, a->instrlen, "%p: [%d:%d) optimized NOPs: ",
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instr, a->instrlen - a->padlen, a->padlen);
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@@ -336,6 +336,13 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen)
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apic_write(APIC_LVTT, lvtt_value);
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if (lvtt_value & APIC_LVT_TIMER_TSCDEADLINE) {
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/*
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* See Intel SDM: TSC-Deadline Mode chapter. In xAPIC mode,
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* writing to the APIC LVTT and TSC_DEADLINE MSR isn't serialized.
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* According to Intel, MFENCE can do the serialization here.
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*/
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asm volatile("mfence" : : : "memory");
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printk_once(KERN_DEBUG "TSC deadline timer enabled\n");
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return;
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}
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@@ -2522,6 +2522,7 @@ void __init setup_ioapic_dest(void)
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int pin, ioapic, irq, irq_entry;
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const struct cpumask *mask;
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struct irq_data *idata;
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struct irq_chip *chip;
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if (skip_ioapic_setup == 1)
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return;
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@@ -2545,9 +2546,9 @@ void __init setup_ioapic_dest(void)
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else
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mask = apic->target_cpus();
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irq_set_affinity(irq, mask);
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chip = irq_data_get_irq_chip(idata);
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chip->irq_set_affinity(idata, mask, false);
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}
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}
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#endif
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@@ -1110,10 +1110,10 @@ void print_cpu_info(struct cpuinfo_x86 *c)
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else
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printk(KERN_CONT "%d86", c->x86);
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printk(KERN_CONT " (fam: %02x, model: %02x", c->x86, c->x86_model);
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printk(KERN_CONT " (family: 0x%x, model: 0x%x", c->x86, c->x86_model);
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if (c->x86_mask || c->cpuid_level >= 0)
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printk(KERN_CONT ", stepping: %02x)\n", c->x86_mask);
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printk(KERN_CONT ", stepping: 0x%x)\n", c->x86_mask);
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else
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printk(KERN_CONT ")\n");
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@@ -58,7 +58,7 @@ static struct ldt_struct *alloc_ldt_struct(int size)
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if (alloc_size > PAGE_SIZE)
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new_ldt->entries = vzalloc(alloc_size);
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else
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new_ldt->entries = kzalloc(PAGE_SIZE, GFP_KERNEL);
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new_ldt->entries = (void *)get_zeroed_page(GFP_KERNEL);
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if (!new_ldt->entries) {
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kfree(new_ldt);
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@@ -95,7 +95,7 @@ static void free_ldt_struct(struct ldt_struct *ldt)
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if (ldt->size * LDT_ENTRY_SIZE > PAGE_SIZE)
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vfree(ldt->entries);
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else
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kfree(ldt->entries);
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free_page((unsigned long)ldt->entries);
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kfree(ldt);
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}
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@@ -21,6 +21,7 @@
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#include <asm/hypervisor.h>
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#include <asm/nmi.h>
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#include <asm/x86_init.h>
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#include <asm/geode.h>
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unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */
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EXPORT_SYMBOL(cpu_khz);
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@@ -1013,15 +1014,17 @@ EXPORT_SYMBOL_GPL(mark_tsc_unstable);
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static void __init check_system_tsc_reliable(void)
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{
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#ifdef CONFIG_MGEODE_LX
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/* RTSC counts during suspend */
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#if defined(CONFIG_MGEODEGX1) || defined(CONFIG_MGEODE_LX) || defined(CONFIG_X86_GENERIC)
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if (is_geode_lx()) {
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/* RTSC counts during suspend */
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#define RTSC_SUSP 0x100
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unsigned long res_low, res_high;
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unsigned long res_low, res_high;
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rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
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/* Geode_LX - the OLPC CPU has a very reliable TSC */
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if (res_low & RTSC_SUSP)
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tsc_clocksource_reliable = 1;
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rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
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/* Geode_LX - the OLPC CPU has a very reliable TSC */
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if (res_low & RTSC_SUSP)
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tsc_clocksource_reliable = 1;
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}
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#endif
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if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
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tsc_clocksource_reliable = 1;
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@@ -45,6 +45,7 @@
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#include <linux/audit.h>
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#include <linux/stddef.h>
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#include <linux/slab.h>
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#include <linux/security.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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@@ -232,6 +233,32 @@ static long do_sys_vm86(struct vm86plus_struct __user *user_vm86, bool plus)
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struct pt_regs *regs = current_pt_regs();
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unsigned long err = 0;
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err = security_mmap_addr(0);
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if (err) {
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/*
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* vm86 cannot virtualize the address space, so vm86 users
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* need to manage the low 1MB themselves using mmap. Given
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* that BIOS places important data in the first page, vm86
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* is essentially useless if mmap_min_addr != 0. DOSEMU,
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* for example, won't even bother trying to use vm86 if it
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* can't map a page at virtual address 0.
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*
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* To reduce the available kernel attack surface, simply
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* disallow vm86(old) for users who cannot mmap at va 0.
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*
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* The implementation of security_mmap_addr will allow
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* suitably privileged users to map va 0 even if
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* vm.mmap_min_addr is set above 0, and we want this
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* behavior for vm86 as well, as it ensures that legacy
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* tools like vbetool will not fail just because of
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* vm.mmap_min_addr.
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*/
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pr_info_once("Denied a call to vm86(old) from %s[%d] (uid: %d). Set the vm.mmap_min_addr sysctl to 0 and/or adjust LSM mmap_min_addr policy to enable vm86 if you are using a vm86-based DOS emulator.\n",
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current->comm, task_pid_nr(current),
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from_kuid_munged(&init_user_ns, current_uid()));
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return -EPERM;
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}
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if (!vm86) {
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if (!(vm86 = kzalloc(sizeof(*vm86), GFP_KERNEL)))
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return -ENOMEM;
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