Merge branch 'for-rmk' of git://linux-arm.org/linux-2.6 into devel
Conflicts: arch/arm/Kconfig arch/arm/kernel/smp.c arch/arm/mach-realview/Makefile arch/arm/mach-realview/platsmp.c
This commit is contained in:
Russell King
@@ -47,6 +47,15 @@ config MACH_REALVIEW_PB1176
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help
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Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
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config REALVIEW_PB1176_SECURE_FLASH
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bool "Allow access to the secure flash memory block"
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depends on MACH_REALVIEW_PB1176
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default n
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help
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Select this option if Linux will only run in secure mode on the
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RealView PB1176 platform and access to the secure flash memory
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block (64MB @ 0x3c000000) is required.
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config MACH_REALVIEW_PBA8
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bool "Support RealView/PB-A8 platform"
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select CPU_V7
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@@ -57,6 +66,13 @@ config MACH_REALVIEW_PBA8
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PB-A8 is a platform with an on-board Cortex-A8 and has support for
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PCI-E and Compact Flash.
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config MACH_REALVIEW_PBX
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bool "Support RealView/PBX platform"
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select ARM_GIC
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select HAVE_PATA_PLATFORM
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help
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Include support for the ARM(R) RealView PBX platform.
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config REALVIEW_HIGH_PHYS_OFFSET
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bool "High physical base address for the RealView platform"
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depends on !MACH_REALVIEW_PB1176
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@@ -7,6 +7,7 @@ obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o
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obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o
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obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o
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obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o
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obj-$(CONFIG_MACH_REALVIEW_PBX) += realview_pbx.o
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obj-$(CONFIG_SMP) += platsmp.o headsmp.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
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@@ -48,6 +48,9 @@
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#include <asm/hardware/gic.h>
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#include <mach/platform.h>
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#include <mach/irqs.h>
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#include "core.h"
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#include "clock.h"
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@@ -578,21 +581,22 @@ void realview_leds_event(led_event_t ledevt)
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{
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unsigned long flags;
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u32 val;
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u32 led = 1 << smp_processor_id();
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local_irq_save(flags);
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val = readl(VA_LEDS_BASE);
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switch (ledevt) {
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case led_idle_start:
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val = val & ~REALVIEW_SYS_LED0;
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val = val & ~led;
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break;
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case led_idle_end:
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val = val | REALVIEW_SYS_LED0;
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val = val | led;
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break;
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case led_timer:
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val = val ^ REALVIEW_SYS_LED1;
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val = val ^ REALVIEW_SYS_LED7;
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break;
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case led_halted:
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@@ -62,111 +62,6 @@
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#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
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#endif
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#define IRQ_EB_GIC_START 32
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/*
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* RealView EB interrupt sources
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*/
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#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
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#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
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#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
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#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
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#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
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#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
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#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
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/* 9 reserved */
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#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
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#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
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#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
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#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
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#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
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#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
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#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
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#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
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#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
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#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
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#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
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#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
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#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
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#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
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#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
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#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
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#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
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#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
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#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
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#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
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#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
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#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
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/*
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* RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
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*/
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#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
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#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
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#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
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#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
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#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
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#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
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#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
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#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
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#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
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#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
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#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
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#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
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#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
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#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
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#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
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#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
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#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
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#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
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#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
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#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
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#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
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#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
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#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
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#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
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#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
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#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
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#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
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#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
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#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
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#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
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#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
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#define IRQ_EB11MP_UART2 -1
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#define IRQ_EB11MP_UART3 -1
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#define IRQ_EB11MP_CLCD -1
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#define IRQ_EB11MP_DMA -1
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#define IRQ_EB11MP_WDOG -1
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#define IRQ_EB11MP_GPIO0 -1
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#define IRQ_EB11MP_GPIO1 -1
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#define IRQ_EB11MP_GPIO2 -1
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#define IRQ_EB11MP_SCI -1
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#define IRQ_EB11MP_SSP -1
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#define NR_GIC_EB11MP 2
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/*
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* Only define NR_IRQS if less than NR_IRQS_EB
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*/
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#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
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#if defined(CONFIG_MACH_REALVIEW_EB) \
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&& (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
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#undef NR_IRQS
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#define NR_IRQS NR_IRQS_EB
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#endif
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#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
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&& (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
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#undef MAX_GIC_NR
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#define MAX_GIC_NR NR_GIC_EB11MP
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#endif
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/*
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* Core tile identification (REALVIEW_SYS_PROCID)
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*/
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@@ -32,6 +32,8 @@
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#define REALVIEW_PB1176_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
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#define REALVIEW_PB1176_FLASH_BASE 0x30000000
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#define REALVIEW_PB1176_FLASH_SIZE SZ_64M
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#define REALVIEW_PB1176_SEC_FLASH_BASE 0x3C000000 /* Secure flash */
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#define REALVIEW_PB1176_SEC_FLASH_SIZE SZ_64M
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#define REALVIEW_PB1176_TIMER0_1_BASE 0x10104000 /* Timer 0 and 1 */
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#define REALVIEW_PB1176_TIMER2_3_BASE 0x10105000 /* Timer 2 and 3 */
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@@ -71,82 +73,4 @@
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#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */
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#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */
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/*
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* Irqs
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*/
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#define IRQ_DC1176_GIC_START 32
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#define IRQ_PB1176_GIC_START 64
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/*
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* ARM1176 DevChip interrupt sources (primary GIC)
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*/
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#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */
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#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
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#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
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#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
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#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
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#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11)
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#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12)
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#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
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#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
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#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
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#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
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#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
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#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */
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#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */
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#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */
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#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */
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/*
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* RealView PB1176 interrupt sources (secondary GIC)
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*/
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#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */
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#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */
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#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */
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#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */
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#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5)
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#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */
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#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */
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#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8)
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#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9)
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#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */
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#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */
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#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16)
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#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */
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#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22)
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#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23)
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#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
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#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
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#define IRQ_PB1176_GPIO0 -1
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#define IRQ_PB1176_SSP -1
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#define IRQ_PB1176_SCTL -1
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#define NR_GIC_PB1176 2
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/*
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* Only define NR_IRQS if less than NR_IRQS_PB1176
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*/
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#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96)
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#if defined(CONFIG_MACH_REALVIEW_PB1176)
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#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
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#undef NR_IRQS
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#define NR_IRQS NR_IRQS_PB1176
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#endif
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#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
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#undef MAX_GIC_NR
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#define MAX_GIC_NR NR_GIC_PB1176
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#endif
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#endif /* CONFIG_MACH_REALVIEW_PB1176 */
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#endif /* __ASM_ARCH_BOARD_PB1176_H */
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@@ -81,105 +81,4 @@
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#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
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#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
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/*
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* Irqs
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*/
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#define IRQ_TC11MP_GIC_START 32
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#define IRQ_PB11MP_GIC_START 64
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||||
/*
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* ARM11MPCore test chip interrupt sources (primary GIC on the test chip)
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*/
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#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0)
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#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1)
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#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2)
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#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3)
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#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4)
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#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5)
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#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6)
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#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7)
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#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8)
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#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9)
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#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */
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#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */
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#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */
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#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */
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#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14)
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#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15)
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#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17)
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#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18)
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#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19)
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#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20)
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#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21)
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#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22)
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#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23)
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#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24)
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#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25)
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#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26)
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#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27)
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#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28)
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|
||||
#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29)
|
||||
#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30)
|
||||
#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31)
|
||||
|
||||
/*
|
||||
* RealView PB11MPCore GIC interrupt sources (secondary GIC on the board)
|
||||
*/
|
||||
#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
#define IRQ_PB11MP_SMC -1
|
||||
#define IRQ_PB11MP_SCTL -1
|
||||
|
||||
#define NR_GIC_PB11MP 2
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PB11MP
|
||||
*/
|
||||
#define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PB11MP)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PB11MP
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PB11MP
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PB11MP */
|
||||
|
||||
#endif /* __ASM_ARCH_BOARD_PB11MP_H */
|
||||
|
||||
@@ -70,81 +70,4 @@
|
||||
#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */
|
||||
#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */
|
||||
|
||||
/*
|
||||
* Irqs
|
||||
*/
|
||||
#define IRQ_PBA8_GIC_START 32
|
||||
|
||||
/* L220
|
||||
#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
|
||||
#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
|
||||
#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
|
||||
*/
|
||||
|
||||
/*
|
||||
* PB-A8 on-board gic irq sources
|
||||
*/
|
||||
#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
|
||||
#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
|
||||
#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
/* ... */
|
||||
#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
|
||||
#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
|
||||
#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
|
||||
#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
|
||||
|
||||
#define IRQ_PBA8_SMC -1
|
||||
#define IRQ_PBA8_SCTL -1
|
||||
|
||||
#define NR_GIC_PBA8 1
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PBA8
|
||||
*/
|
||||
#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PBA8)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PBA8
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PBA8
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PBA8 */
|
||||
|
||||
#endif /* __ASM_ARCH_BOARD_PBA8_H */
|
||||
|
||||
108
arch/arm/mach-realview/include/mach/board-pbx.h
Normal file
108
arch/arm/mach-realview/include/mach/board-pbx.h
Normal file
@@ -0,0 +1,108 @@
|
||||
/*
|
||||
* arch/arm/mach-realview/include/mach/board-pbx.h
|
||||
*
|
||||
* Copyright (C) 2009 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_BOARD_PBX_H
|
||||
#define __ASM_ARCH_BOARD_PBX_H
|
||||
|
||||
#include <mach/platform.h>
|
||||
|
||||
/*
|
||||
* Peripheral addresses
|
||||
*/
|
||||
#define REALVIEW_PBX_UART0_BASE 0x10009000 /* UART 0 */
|
||||
#define REALVIEW_PBX_UART1_BASE 0x1000A000 /* UART 1 */
|
||||
#define REALVIEW_PBX_UART2_BASE 0x1000B000 /* UART 2 */
|
||||
#define REALVIEW_PBX_UART3_BASE 0x1000C000 /* UART 3 */
|
||||
#define REALVIEW_PBX_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
|
||||
#define REALVIEW_PBX_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
|
||||
#define REALVIEW_PBX_WATCHDOG_BASE 0x10010000 /* watchdog interface */
|
||||
#define REALVIEW_PBX_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
|
||||
#define REALVIEW_PBX_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
|
||||
#define REALVIEW_PBX_GPIO0_BASE 0x10013000 /* GPIO port 0 */
|
||||
#define REALVIEW_PBX_RTC_BASE 0x10017000 /* Real Time Clock */
|
||||
#define REALVIEW_PBX_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
|
||||
#define REALVIEW_PBX_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
|
||||
#define REALVIEW_PBX_SCTL_BASE 0x1001A000 /* System Controller */
|
||||
#define REALVIEW_PBX_CLCD_BASE 0x10020000 /* CLCD */
|
||||
#define REALVIEW_PBX_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
|
||||
#define REALVIEW_PBX_DMC_BASE 0x100E0000 /* DMC configuration */
|
||||
#define REALVIEW_PBX_SMC_BASE 0x100E1000 /* SMC configuration */
|
||||
#define REALVIEW_PBX_CAN_BASE 0x100E2000 /* CAN bus */
|
||||
#define REALVIEW_PBX_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
|
||||
#define REALVIEW_PBX_FLASH0_BASE 0x40000000
|
||||
#define REALVIEW_PBX_FLASH0_SIZE SZ_64M
|
||||
#define REALVIEW_PBX_FLASH1_BASE 0x44000000
|
||||
#define REALVIEW_PBX_FLASH1_SIZE SZ_64M
|
||||
#define REALVIEW_PBX_ETH_BASE 0x4E000000 /* Ethernet */
|
||||
#define REALVIEW_PBX_USB_BASE 0x4F000000 /* USB */
|
||||
#define REALVIEW_PBX_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
|
||||
#define REALVIEW_PBX_LT_BASE 0xC0000000 /* Logic Tile expansion */
|
||||
#define REALVIEW_PBX_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
|
||||
#define REALVIEW_PBX_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
|
||||
|
||||
/*
|
||||
* Tile-specific addresses
|
||||
*/
|
||||
#define REALVIEW_PBX_TILE_SCU_BASE 0x1F000000 /* SCU registers */
|
||||
#define REALVIEW_PBX_TILE_GIC_CPU_BASE 0x1F000100 /* Private Generic interrupt controller CPU interface */
|
||||
#define REALVIEW_PBX_TILE_TWD_BASE 0x1F000600
|
||||
#define REALVIEW_PBX_TILE_TWD_PERCPU_BASE 0x1F000700
|
||||
#define REALVIEW_PBX_TILE_TWD_SIZE 0x00000100
|
||||
#define REALVIEW_PBX_TILE_GIC_DIST_BASE 0x1F001000 /* Private Generic interrupt controller distributor */
|
||||
#define REALVIEW_PBX_TILE_L220_BASE 0x1F002000 /* L220 registers */
|
||||
|
||||
#define REALVIEW_PBX_SYS_PLD_CTRL1 0x74
|
||||
|
||||
/*
|
||||
* PBX PCI regions
|
||||
*/
|
||||
#define REALVIEW_PBX_PCI_BASE 0x90040000 /* PCI-X Unit base */
|
||||
#define REALVIEW_PBX_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
|
||||
#define REALVIEW_PBX_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
|
||||
|
||||
#define REALVIEW_PBX_PCI_BASE_SIZE 0x10000 /* 16 Kb */
|
||||
#define REALVIEW_PBX_PCI_IO_SIZE 0x1000 /* 4 Kb */
|
||||
#define REALVIEW_PBX_PCI_MEM_SIZE 0x20000000 /* 512 MB */
|
||||
|
||||
/*
|
||||
* Core tile identification (REALVIEW_SYS_PROCID)
|
||||
*/
|
||||
#define REALVIEW_PBX_PROC_MASK 0xFF000000
|
||||
#define REALVIEW_PBX_PROC_ARM7TDMI 0x00000000
|
||||
#define REALVIEW_PBX_PROC_ARM9 0x02000000
|
||||
#define REALVIEW_PBX_PROC_ARM11 0x04000000
|
||||
#define REALVIEW_PBX_PROC_ARM11MP 0x06000000
|
||||
#define REALVIEW_PBX_PROC_A9MP 0x0C000000
|
||||
#define REALVIEW_PBX_PROC_A8 0x0E000000
|
||||
|
||||
#define check_pbx_proc(proc_type) \
|
||||
((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_PBX_PROC_MASK) \
|
||||
== proc_type)
|
||||
|
||||
#ifdef CONFIG_MACH_REALVIEW_PBX
|
||||
#define core_tile_pbx11mp() check_pbx_proc(REALVIEW_PBX_PROC_ARM11MP)
|
||||
#define core_tile_pbxa9mp() check_pbx_proc(REALVIEW_PBX_PROC_A9MP)
|
||||
#define core_tile_pbxa8() check_pbx_proc(REALVIEW_PBX_PROC_A8)
|
||||
#else
|
||||
#define core_tile_pbx11mp() 0
|
||||
#define core_tile_pbxa9mp() 0
|
||||
#define core_tile_pbxa8() 0
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_ARCH_BOARD_PBX_H */
|
||||
@@ -12,7 +12,8 @@
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_EB) || \
|
||||
defined(CONFIG_MACH_REALVIEW_PB11MP) || \
|
||||
defined(CONFIG_MACH_REALVIEW_PBA8)
|
||||
defined(CONFIG_MACH_REALVIEW_PBA8) || \
|
||||
defined(CONFIG_MACH_REALVIEW_PBX)
|
||||
#ifndef DEBUG_LL_UART_OFFSET
|
||||
#define DEBUG_LL_UART_OFFSET 0x00009000
|
||||
#elif DEBUG_LL_UART_OFFSET != 0x00009000
|
||||
|
||||
129
arch/arm/mach-realview/include/mach/irqs-eb.h
Normal file
129
arch/arm/mach-realview/include/mach/irqs-eb.h
Normal file
@@ -0,0 +1,129 @@
|
||||
/*
|
||||
* arch/arm/mach-realview/include/mach/irqs-eb.h
|
||||
*
|
||||
* Copyright (C) 2007 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_IRQS_EB_H
|
||||
#define __MACH_IRQS_EB_H
|
||||
|
||||
#define IRQ_EB_GIC_START 32
|
||||
|
||||
/*
|
||||
* RealView EB interrupt sources
|
||||
*/
|
||||
#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
|
||||
#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
|
||||
#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
/*
|
||||
* RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
|
||||
*/
|
||||
#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
|
||||
#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
|
||||
#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
|
||||
#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
|
||||
#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
|
||||
#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
|
||||
#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
|
||||
#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
|
||||
#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
|
||||
#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
|
||||
#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
|
||||
#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
|
||||
#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
|
||||
#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
|
||||
#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
|
||||
#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
|
||||
|
||||
#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
|
||||
#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
|
||||
#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
|
||||
#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
|
||||
#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
|
||||
#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
|
||||
#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
|
||||
#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
|
||||
#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
|
||||
#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
|
||||
#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
|
||||
#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
|
||||
|
||||
#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
|
||||
#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
|
||||
#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
|
||||
|
||||
#define IRQ_EB11MP_UART2 -1
|
||||
#define IRQ_EB11MP_UART3 -1
|
||||
#define IRQ_EB11MP_CLCD -1
|
||||
#define IRQ_EB11MP_DMA -1
|
||||
#define IRQ_EB11MP_WDOG -1
|
||||
#define IRQ_EB11MP_GPIO0 -1
|
||||
#define IRQ_EB11MP_GPIO1 -1
|
||||
#define IRQ_EB11MP_GPIO2 -1
|
||||
#define IRQ_EB11MP_SCI -1
|
||||
#define IRQ_EB11MP_SSP -1
|
||||
|
||||
#define NR_GIC_EB11MP 2
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_EB
|
||||
*/
|
||||
#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_EB) \
|
||||
&& (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_EB
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
|
||||
&& (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_EB11MP
|
||||
#endif
|
||||
|
||||
#endif /* __MACH_IRQS_EB_H */
|
||||
99
arch/arm/mach-realview/include/mach/irqs-pb1176.h
Normal file
99
arch/arm/mach-realview/include/mach/irqs-pb1176.h
Normal file
@@ -0,0 +1,99 @@
|
||||
/*
|
||||
* arch/arm/mach-realview/include/mach/irqs-pb1176.h
|
||||
*
|
||||
* Copyright (C) 2008 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_IRQS_PB1176_H
|
||||
#define __MACH_IRQS_PB1176_H
|
||||
|
||||
#define IRQ_DC1176_GIC_START 32
|
||||
#define IRQ_PB1176_GIC_START 64
|
||||
|
||||
/*
|
||||
* ARM1176 DevChip interrupt sources (primary GIC)
|
||||
*/
|
||||
#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
|
||||
#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
|
||||
#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
|
||||
#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11)
|
||||
#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12)
|
||||
#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
|
||||
#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
|
||||
#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
|
||||
#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
|
||||
#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
|
||||
#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */
|
||||
#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */
|
||||
|
||||
#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */
|
||||
#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */
|
||||
|
||||
/*
|
||||
* RealView PB1176 interrupt sources (secondary GIC)
|
||||
*/
|
||||
#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */
|
||||
#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */
|
||||
#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5)
|
||||
#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */
|
||||
#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */
|
||||
#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8)
|
||||
#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9)
|
||||
#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */
|
||||
#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */
|
||||
|
||||
#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16)
|
||||
|
||||
#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */
|
||||
|
||||
#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22)
|
||||
#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23)
|
||||
#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
|
||||
|
||||
#define IRQ_PB1176_GPIO0 -1
|
||||
#define IRQ_PB1176_SSP -1
|
||||
#define IRQ_PB1176_SCTL -1
|
||||
|
||||
#define NR_GIC_PB1176 2
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PB1176
|
||||
*/
|
||||
#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PB1176)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PB1176
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PB1176
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PB1176 */
|
||||
|
||||
#endif /* __MACH_IRQS_PB1176_H */
|
||||
122
arch/arm/mach-realview/include/mach/irqs-pb11mp.h
Normal file
122
arch/arm/mach-realview/include/mach/irqs-pb11mp.h
Normal file
@@ -0,0 +1,122 @@
|
||||
/*
|
||||
* arch/arm/mach-realview/include/mach/irqs-pb11mp.h
|
||||
*
|
||||
* Copyright (C) 2008 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_IRQS_PB11MP_H
|
||||
#define __MACH_IRQS_PB11MP_H
|
||||
|
||||
#define IRQ_TC11MP_GIC_START 32
|
||||
#define IRQ_PB11MP_GIC_START 64
|
||||
|
||||
/*
|
||||
* ARM11MPCore test chip interrupt sources (primary GIC on the test chip)
|
||||
*/
|
||||
#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0)
|
||||
#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1)
|
||||
#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2)
|
||||
#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3)
|
||||
#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4)
|
||||
#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5)
|
||||
#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6)
|
||||
#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7)
|
||||
#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8)
|
||||
#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9)
|
||||
#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */
|
||||
#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */
|
||||
#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */
|
||||
#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */
|
||||
#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14)
|
||||
#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15)
|
||||
|
||||
#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17)
|
||||
#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18)
|
||||
#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19)
|
||||
#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20)
|
||||
#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21)
|
||||
#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22)
|
||||
#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23)
|
||||
#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24)
|
||||
#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25)
|
||||
#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26)
|
||||
#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27)
|
||||
#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28)
|
||||
|
||||
#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29)
|
||||
#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30)
|
||||
#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31)
|
||||
|
||||
/*
|
||||
* RealView PB11MPCore GIC interrupt sources (secondary GIC on the board)
|
||||
*/
|
||||
#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
#define IRQ_PB11MP_SMC -1
|
||||
#define IRQ_PB11MP_SCTL -1
|
||||
|
||||
#define NR_GIC_PB11MP 2
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PB11MP
|
||||
*/
|
||||
#define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PB11MP)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PB11MP
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PB11MP
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PB11MP */
|
||||
|
||||
#endif /* __MACH_IRQS_PB11MP_H */
|
||||
98
arch/arm/mach-realview/include/mach/irqs-pba8.h
Normal file
98
arch/arm/mach-realview/include/mach/irqs-pba8.h
Normal file
@@ -0,0 +1,98 @@
|
||||
/*
|
||||
* arch/arm/mach-realview/include/mach/irqs-pba8.h
|
||||
*
|
||||
* Copyright (C) 2008 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_IRQS_PBA8_H
|
||||
#define __MACH_IRQS_PBA8_H
|
||||
|
||||
#define IRQ_PBA8_GIC_START 32
|
||||
|
||||
/* L220
|
||||
#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
|
||||
#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
|
||||
#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
|
||||
*/
|
||||
|
||||
/*
|
||||
* PB-A8 on-board gic irq sources
|
||||
*/
|
||||
#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
|
||||
#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
|
||||
#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
/* ... */
|
||||
#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
|
||||
#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
|
||||
#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
|
||||
#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
|
||||
|
||||
#define IRQ_PBA8_SMC -1
|
||||
#define IRQ_PBA8_SCTL -1
|
||||
|
||||
#define NR_GIC_PBA8 1
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PBA8
|
||||
*/
|
||||
#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PBA8)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PBA8
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PBA8
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PBA8 */
|
||||
|
||||
#endif /* __MACH_IRQS_PBA8_H */
|
||||
115
arch/arm/mach-realview/include/mach/irqs-pbx.h
Normal file
115
arch/arm/mach-realview/include/mach/irqs-pbx.h
Normal file
@@ -0,0 +1,115 @@
|
||||
/*
|
||||
* arch/arm/mach-realview/include/mach/irqs-pbx.h
|
||||
*
|
||||
* Copyright (C) 2009 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __MACH_IRQS_PBX_H
|
||||
#define __MACH_IRQS_PBX_H
|
||||
|
||||
#define IRQ_PBX_GIC_START 32
|
||||
|
||||
/* L220
|
||||
#define IRQ_PBX_L220_EVENT (IRQ_PBX_GIC_START + 29)
|
||||
#define IRQ_PBX_L220_SLAVE (IRQ_PBX_GIC_START + 30)
|
||||
#define IRQ_PBX_L220_DECODE (IRQ_PBX_GIC_START + 31)
|
||||
*/
|
||||
|
||||
/*
|
||||
* PBX on-board gic irq sources
|
||||
*/
|
||||
#define IRQ_PBX_WATCHDOG (IRQ_PBX_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_PBX_SOFT (IRQ_PBX_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_PBX_COMMRx (IRQ_PBX_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_PBX_COMMTx (IRQ_PBX_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_PBX_TIMER0_1 (IRQ_PBX_GIC_START + 4) /* Timer 0/1 (default timer) */
|
||||
#define IRQ_PBX_TIMER2_3 (IRQ_PBX_GIC_START + 5) /* Timer 2/3 */
|
||||
#define IRQ_PBX_GPIO0 (IRQ_PBX_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_PBX_GPIO1 (IRQ_PBX_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_PBX_GPIO2 (IRQ_PBX_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_PBX_RTC (IRQ_PBX_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_PBX_SSP (IRQ_PBX_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_PBX_UART0 (IRQ_PBX_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_PBX_UART1 (IRQ_PBX_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_PBX_UART2 (IRQ_PBX_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_PBX_UART3 (IRQ_PBX_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_PBX_SCI (IRQ_PBX_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_PBX_MMCI0A (IRQ_PBX_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_PBX_MMCI0B (IRQ_PBX_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_PBX_AACI (IRQ_PBX_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_PBX_KMI0 (IRQ_PBX_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PBX_KMI1 (IRQ_PBX_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PBX_CHARLCD (IRQ_PBX_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_PBX_CLCD (IRQ_PBX_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_PBX_DMAC (IRQ_PBX_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PBX_PWRFAIL (IRQ_PBX_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_PBX_PISMO (IRQ_PBX_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_PBX_DoC (IRQ_PBX_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_PBX_ETH (IRQ_PBX_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_PBX_USB (IRQ_PBX_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_PBX_TSPEN (IRQ_PBX_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PBX_TSKPAD (IRQ_PBX_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
#define IRQ_PBX_PMU_SCU0 (IRQ_PBX_GIC_START + 32) /* SCU PMU Interrupts (11mp) */
|
||||
#define IRQ_PBX_PMU_SCU1 (IRQ_PBX_GIC_START + 33)
|
||||
#define IRQ_PBX_PMU_SCU2 (IRQ_PBX_GIC_START + 34)
|
||||
#define IRQ_PBX_PMU_SCU3 (IRQ_PBX_GIC_START + 35)
|
||||
#define IRQ_PBX_PMU_SCU4 (IRQ_PBX_GIC_START + 36)
|
||||
#define IRQ_PBX_PMU_SCU5 (IRQ_PBX_GIC_START + 37)
|
||||
#define IRQ_PBX_PMU_SCU6 (IRQ_PBX_GIC_START + 38)
|
||||
#define IRQ_PBX_PMU_SCU7 (IRQ_PBX_GIC_START + 39)
|
||||
|
||||
#define IRQ_PBX_WATCHDOG1 (IRQ_PBX_GIC_START + 40) /* Watchdog1 timer */
|
||||
#define IRQ_PBX_TIMER4_5 (IRQ_PBX_GIC_START + 41) /* Timer 0/1 (default timer) */
|
||||
#define IRQ_PBX_TIMER6_7 (IRQ_PBX_GIC_START + 42) /* Timer 2/3 */
|
||||
/* ... */
|
||||
#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */
|
||||
#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 45)
|
||||
#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 46)
|
||||
#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 47)
|
||||
|
||||
/* ... */
|
||||
#define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50)
|
||||
#define IRQ_PBX_PCI1 (IRQ_PBX_GIC_START + 51)
|
||||
#define IRQ_PBX_PCI2 (IRQ_PBX_GIC_START + 52)
|
||||
#define IRQ_PBX_PCI3 (IRQ_PBX_GIC_START + 53)
|
||||
|
||||
#define IRQ_PBX_SMC -1
|
||||
#define IRQ_PBX_SCTL -1
|
||||
|
||||
#define NR_GIC_PBX 1
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PBX
|
||||
*/
|
||||
#define NR_IRQS_PBX (IRQ_PBX_GIC_START + 96)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PBX)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBX)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PBX
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBX)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PBX
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PBX */
|
||||
|
||||
#endif /* __MACH_IRQS_PBX_H */
|
||||
@@ -22,10 +22,11 @@
|
||||
#ifndef __ASM_ARCH_IRQS_H
|
||||
#define __ASM_ARCH_IRQS_H
|
||||
|
||||
#include <mach/board-eb.h>
|
||||
#include <mach/board-pb11mp.h>
|
||||
#include <mach/board-pb1176.h>
|
||||
#include <mach/board-pba8.h>
|
||||
#include <mach/irqs-eb.h>
|
||||
#include <mach/irqs-pb11mp.h>
|
||||
#include <mach/irqs-pb1176.h>
|
||||
#include <mach/irqs-pba8.h>
|
||||
#include <mach/irqs-pbx.h>
|
||||
|
||||
#define IRQ_LOCALTIMER 29
|
||||
#define IRQ_LOCALWDOG 30
|
||||
|
||||
@@ -24,6 +24,7 @@
|
||||
#include <mach/board-pb11mp.h>
|
||||
#include <mach/board-pb1176.h>
|
||||
#include <mach/board-pba8.h>
|
||||
#include <mach/board-pbx.h>
|
||||
|
||||
#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
|
||||
#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
|
||||
@@ -43,6 +44,8 @@ static inline unsigned long get_uart_base(void)
|
||||
return REALVIEW_PB1176_UART0_BASE;
|
||||
else if (machine_is_realview_pba8())
|
||||
return REALVIEW_PBA8_UART0_BASE;
|
||||
else if (machine_is_realview_pbx())
|
||||
return REALVIEW_PBX_UART0_BASE;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -23,6 +23,7 @@
|
||||
|
||||
#include <mach/board-eb.h>
|
||||
#include <mach/board-pb11mp.h>
|
||||
#include <mach/board-pbx.h>
|
||||
#include <asm/smp_scu.h>
|
||||
|
||||
#include "core.h"
|
||||
@@ -41,6 +42,9 @@ static void __iomem *scu_base_addr(void)
|
||||
return __io_address(REALVIEW_EB11MP_SCU_BASE);
|
||||
else if (machine_is_realview_pb11mp())
|
||||
return __io_address(REALVIEW_TC11MP_SCU_BASE);
|
||||
else if (machine_is_realview_pbx() &&
|
||||
(core_tile_pbx11mp() || core_tile_pbxa9mp()))
|
||||
return __io_address(REALVIEW_PBX_TILE_SCU_BASE);
|
||||
else
|
||||
return (void __iomem *)0;
|
||||
}
|
||||
|
||||
@@ -203,11 +203,23 @@ static struct amba_device *amba_devs[] __initdata = {
|
||||
/*
|
||||
* RealView PB1176 platform devices
|
||||
*/
|
||||
static struct resource realview_pb1176_flash_resource = {
|
||||
.start = REALVIEW_PB1176_FLASH_BASE,
|
||||
.end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
static struct resource realview_pb1176_flash_resources[] = {
|
||||
[0] = {
|
||||
.start = REALVIEW_PB1176_FLASH_BASE,
|
||||
.end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = REALVIEW_PB1176_SEC_FLASH_BASE,
|
||||
.end = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
|
||||
#define PB1176_FLASH_BLOCKS 2
|
||||
#else
|
||||
#define PB1176_FLASH_BLOCKS 1
|
||||
#endif
|
||||
|
||||
static struct resource realview_pb1176_smsc911x_resources[] = {
|
||||
[0] = {
|
||||
@@ -271,7 +283,8 @@ static void __init realview_pb1176_init(void)
|
||||
l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
|
||||
#endif
|
||||
|
||||
realview_flash_register(&realview_pb1176_flash_resource, 1);
|
||||
realview_flash_register(realview_pb1176_flash_resources,
|
||||
PB1176_FLASH_BLOCKS);
|
||||
realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
|
||||
platform_device_register(&realview_i2c_device);
|
||||
realview_usb_register(realview_pb1176_isp1761_resources);
|
||||
|
||||
335
arch/arm/mach-realview/realview_pbx.c
Normal file
335
arch/arm/mach-realview/realview_pbx.c
Normal file
@@ -0,0 +1,335 @@
|
||||
/*
|
||||
* arch/arm/mach-realview/realview_pbx.c
|
||||
*
|
||||
* Copyright (C) 2009 ARM Limited
|
||||
* Copyright (C) 2000 Deep Blue Solutions Ltd
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/sysdev.h>
|
||||
#include <linux/amba/bus.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/leds.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/hardware/gic.h>
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/mmc.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/board-pbx.h>
|
||||
#include <mach/irqs.h>
|
||||
|
||||
#include "core.h"
|
||||
|
||||
static struct map_desc realview_pbx_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(REALVIEW_PBX_GIC_CPU_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_PBX_GIC_CPU_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(REALVIEW_PBX_GIC_DIST_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_PBX_GIC_DIST_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(REALVIEW_PBX_TIMER0_1_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_PBX_TIMER0_1_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(REALVIEW_PBX_TIMER2_3_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_PBX_TIMER2_3_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
#ifdef CONFIG_PCI
|
||||
{
|
||||
.virtual = PCIX_UNIT_BASE,
|
||||
.pfn = __phys_to_pfn(REALVIEW_PBX_PCI_BASE),
|
||||
.length = REALVIEW_PBX_PCI_BASE_SIZE,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_LL
|
||||
{
|
||||
.virtual = IO_ADDRESS(REALVIEW_PBX_UART0_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_PBX_UART0_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct map_desc realview_local_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = IO_ADDRESS(REALVIEW_PBX_TILE_GIC_CPU_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_PBX_TILE_GIC_CPU_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(REALVIEW_PBX_TILE_GIC_DIST_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_PBX_TILE_GIC_DIST_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(REALVIEW_PBX_TILE_L220_BASE),
|
||||
.pfn = __phys_to_pfn(REALVIEW_PBX_TILE_L220_BASE),
|
||||
.length = SZ_8K,
|
||||
.type = MT_DEVICE,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init realview_pbx_map_io(void)
|
||||
{
|
||||
iotable_init(realview_pbx_io_desc, ARRAY_SIZE(realview_pbx_io_desc));
|
||||
if (core_tile_pbx11mp() || core_tile_pbxa9mp())
|
||||
iotable_init(realview_local_io_desc, ARRAY_SIZE(realview_local_io_desc));
|
||||
}
|
||||
|
||||
/*
|
||||
* RealView PBXCore AMBA devices
|
||||
*/
|
||||
|
||||
#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ }
|
||||
#define GPIO2_DMA { 0, 0 }
|
||||
#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ }
|
||||
#define GPIO3_DMA { 0, 0 }
|
||||
#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ }
|
||||
#define AACI_DMA { 0x80, 0x81 }
|
||||
#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
|
||||
#define MMCI0_DMA { 0x84, 0 }
|
||||
#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ }
|
||||
#define KMI0_DMA { 0, 0 }
|
||||
#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ }
|
||||
#define KMI1_DMA { 0, 0 }
|
||||
#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ }
|
||||
#define PBX_SMC_DMA { 0, 0 }
|
||||
#define MPMC_IRQ { NO_IRQ, NO_IRQ }
|
||||
#define MPMC_DMA { 0, 0 }
|
||||
#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ }
|
||||
#define PBX_CLCD_DMA { 0, 0 }
|
||||
#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ }
|
||||
#define DMAC_DMA { 0, 0 }
|
||||
#define SCTL_IRQ { NO_IRQ, NO_IRQ }
|
||||
#define SCTL_DMA { 0, 0 }
|
||||
#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ }
|
||||
#define PBX_WATCHDOG_DMA { 0, 0 }
|
||||
#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ }
|
||||
#define PBX_GPIO0_DMA { 0, 0 }
|
||||
#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ }
|
||||
#define GPIO1_DMA { 0, 0 }
|
||||
#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ }
|
||||
#define PBX_RTC_DMA { 0, 0 }
|
||||
#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ }
|
||||
#define SCI_DMA { 7, 6 }
|
||||
#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ }
|
||||
#define PBX_UART0_DMA { 15, 14 }
|
||||
#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ }
|
||||
#define PBX_UART1_DMA { 13, 12 }
|
||||
#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ }
|
||||
#define PBX_UART2_DMA { 11, 10 }
|
||||
#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ }
|
||||
#define PBX_UART3_DMA { 0x86, 0x87 }
|
||||
#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ }
|
||||
#define PBX_SSP_DMA { 9, 8 }
|
||||
|
||||
/* FPGA Primecells */
|
||||
AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
|
||||
AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
|
||||
AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
|
||||
AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
|
||||
AMBA_DEVICE(uart3, "fpga:09", PBX_UART3, NULL);
|
||||
|
||||
/* DevChip Primecells */
|
||||
AMBA_DEVICE(smc, "dev:00", PBX_SMC, NULL);
|
||||
AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
|
||||
AMBA_DEVICE(wdog, "dev:e1", PBX_WATCHDOG, NULL);
|
||||
AMBA_DEVICE(gpio0, "dev:e4", PBX_GPIO0, NULL);
|
||||
AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
|
||||
AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
|
||||
AMBA_DEVICE(rtc, "dev:e8", PBX_RTC, NULL);
|
||||
AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
|
||||
AMBA_DEVICE(uart0, "dev:f1", PBX_UART0, NULL);
|
||||
AMBA_DEVICE(uart1, "dev:f2", PBX_UART1, NULL);
|
||||
AMBA_DEVICE(uart2, "dev:f3", PBX_UART2, NULL);
|
||||
AMBA_DEVICE(ssp0, "dev:f4", PBX_SSP, NULL);
|
||||
|
||||
/* Primecells on the NEC ISSP chip */
|
||||
AMBA_DEVICE(clcd, "issp:20", PBX_CLCD, &clcd_plat_data);
|
||||
AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
|
||||
|
||||
static struct amba_device *amba_devs[] __initdata = {
|
||||
&dmac_device,
|
||||
&uart0_device,
|
||||
&uart1_device,
|
||||
&uart2_device,
|
||||
&uart3_device,
|
||||
&smc_device,
|
||||
&clcd_device,
|
||||
&sctl_device,
|
||||
&wdog_device,
|
||||
&gpio0_device,
|
||||
&gpio1_device,
|
||||
&gpio2_device,
|
||||
&rtc_device,
|
||||
&sci0_device,
|
||||
&ssp0_device,
|
||||
&aaci_device,
|
||||
&mmc0_device,
|
||||
&kmi0_device,
|
||||
&kmi1_device,
|
||||
};
|
||||
|
||||
/*
|
||||
* RealView PB-X platform devices
|
||||
*/
|
||||
static struct resource realview_pbx_flash_resources[] = {
|
||||
[0] = {
|
||||
.start = REALVIEW_PBX_FLASH0_BASE,
|
||||
.end = REALVIEW_PBX_FLASH0_BASE + REALVIEW_PBX_FLASH0_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = REALVIEW_PBX_FLASH1_BASE,
|
||||
.end = REALVIEW_PBX_FLASH1_BASE + REALVIEW_PBX_FLASH1_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct resource realview_pbx_smsc911x_resources[] = {
|
||||
[0] = {
|
||||
.start = REALVIEW_PBX_ETH_BASE,
|
||||
.end = REALVIEW_PBX_ETH_BASE + SZ_64K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_PBX_ETH,
|
||||
.end = IRQ_PBX_ETH,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct resource realview_pbx_isp1761_resources[] = {
|
||||
[0] = {
|
||||
.start = REALVIEW_PBX_USB_BASE,
|
||||
.end = REALVIEW_PBX_USB_BASE + SZ_128K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_PBX_USB,
|
||||
.end = IRQ_PBX_USB,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init gic_init_irq(void)
|
||||
{
|
||||
/* ARM PBX on-board GIC */
|
||||
if (core_tile_pbx11mp() || core_tile_pbxa9mp()) {
|
||||
gic_cpu_base_addr = __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE);
|
||||
gic_dist_init(0, __io_address(REALVIEW_PBX_TILE_GIC_DIST_BASE),
|
||||
29);
|
||||
gic_cpu_init(0, __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE));
|
||||
} else {
|
||||
gic_cpu_base_addr = __io_address(REALVIEW_PBX_GIC_CPU_BASE);
|
||||
gic_dist_init(0, __io_address(REALVIEW_PBX_GIC_DIST_BASE),
|
||||
IRQ_PBX_GIC_START);
|
||||
gic_cpu_init(0, __io_address(REALVIEW_PBX_GIC_CPU_BASE));
|
||||
}
|
||||
}
|
||||
|
||||
static void __init realview_pbx_timer_init(void)
|
||||
{
|
||||
timer0_va_base = __io_address(REALVIEW_PBX_TIMER0_1_BASE);
|
||||
timer1_va_base = __io_address(REALVIEW_PBX_TIMER0_1_BASE) + 0x20;
|
||||
timer2_va_base = __io_address(REALVIEW_PBX_TIMER2_3_BASE);
|
||||
timer3_va_base = __io_address(REALVIEW_PBX_TIMER2_3_BASE) + 0x20;
|
||||
|
||||
#ifdef CONFIG_LOCAL_TIMERS
|
||||
if (core_tile_pbx11mp() || core_tile_pbxa9mp())
|
||||
twd_base = __io_address(REALVIEW_PBX_TILE_TWD_BASE);
|
||||
#endif
|
||||
realview_timer_init(IRQ_PBX_TIMER0_1);
|
||||
}
|
||||
|
||||
static struct sys_timer realview_pbx_timer = {
|
||||
.init = realview_pbx_timer_init,
|
||||
};
|
||||
|
||||
static void __init realview_pbx_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
if (core_tile_pbxa9mp()) {
|
||||
void __iomem *l2x0_base =
|
||||
__io_address(REALVIEW_PBX_TILE_L220_BASE);
|
||||
|
||||
/* set RAM latencies to 1 cycle for eASIC */
|
||||
writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL);
|
||||
writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL);
|
||||
|
||||
/* 16KB way size, 8-way associativity, parity disabled
|
||||
* Bits: .. 0 0 0 0 1 00 1 0 1 001 0 000 0 .... .... .... */
|
||||
l2x0_init(l2x0_base, 0x02520000, 0xc0000fff);
|
||||
}
|
||||
#endif
|
||||
|
||||
realview_flash_register(realview_pbx_flash_resources,
|
||||
ARRAY_SIZE(realview_pbx_flash_resources));
|
||||
realview_eth_register(NULL, realview_pbx_smsc911x_resources);
|
||||
platform_device_register(&realview_i2c_device);
|
||||
platform_device_register(&realview_cf_device);
|
||||
realview_usb_register(realview_pbx_isp1761_resources);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
|
||||
struct amba_device *d = amba_devs[i];
|
||||
amba_device_register(d, &iomem_resource);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_LEDS
|
||||
leds_event = realview_leds_event;
|
||||
#endif
|
||||
}
|
||||
|
||||
MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
|
||||
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
|
||||
.phys_io = REALVIEW_PBX_UART0_BASE,
|
||||
.io_pg_offst = (IO_ADDRESS(REALVIEW_PBX_UART0_BASE) >> 18) & 0xfffc,
|
||||
.boot_params = PHYS_OFFSET + 0x00000100,
|
||||
.map_io = realview_pbx_map_io,
|
||||
.init_irq = gic_init_irq,
|
||||
.timer = &realview_pbx_timer,
|
||||
.init_machine = realview_pbx_init,
|
||||
MACHINE_END
|
||||
Reference in New Issue
Block a user