Merge branch 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, fpu: Use static_cpu_has() to implement use_xsave() x86: Add new static_cpu_has() function using alternatives x86, fpu: Use the proper asm constraint in use_xsave() x86, fpu: Unbreak FPU emulation x86: Introduce 'struct fpu' and related API x86: Eliminate TS_XSAVE x86-32: Don't set ignore_fpu_irq in simd exception x86: Merge kernel_math_error() into math_error() x86: Merge simd_math_error() into math_error() x86-32: Rework cache flush denied handler Fix trivial conflict in arch/x86/kernel/process.c
This commit is contained in:
Linus Torvalds
@@ -108,15 +108,6 @@ static inline void preempt_conditional_cli(struct pt_regs *regs)
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dec_preempt_count();
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}
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#ifdef CONFIG_X86_32
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static inline void
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die_if_kernel(const char *str, struct pt_regs *regs, long err)
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{
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if (!user_mode_vm(regs))
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die(str, regs, err);
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}
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#endif
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static void __kprobes
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do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
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long error_code, siginfo_t *info)
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@@ -585,55 +576,67 @@ dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
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return;
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}
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#ifdef CONFIG_X86_64
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static int kernel_math_error(struct pt_regs *regs, const char *str, int trapnr)
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{
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if (fixup_exception(regs))
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return 1;
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notify_die(DIE_GPF, str, regs, 0, trapnr, SIGFPE);
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/* Illegal floating point operation in the kernel */
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current->thread.trap_no = trapnr;
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die(str, regs, 0);
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return 0;
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}
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#endif
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/*
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* Note that we play around with the 'TS' bit in an attempt to get
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* the correct behaviour even in the presence of the asynchronous
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* IRQ13 behaviour
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*/
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void math_error(void __user *ip)
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void math_error(struct pt_regs *regs, int error_code, int trapnr)
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{
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struct task_struct *task;
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struct task_struct *task = current;
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siginfo_t info;
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unsigned short cwd, swd, err;
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unsigned short err;
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char *str = (trapnr == 16) ? "fpu exception" : "simd exception";
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if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
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return;
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conditional_sti(regs);
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if (!user_mode_vm(regs))
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{
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if (!fixup_exception(regs)) {
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task->thread.error_code = error_code;
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task->thread.trap_no = trapnr;
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die(str, regs, error_code);
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}
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return;
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}
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/*
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* Save the info for the exception handler and clear the error.
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*/
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task = current;
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save_init_fpu(task);
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task->thread.trap_no = 16;
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task->thread.error_code = 0;
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task->thread.trap_no = trapnr;
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task->thread.error_code = error_code;
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info.si_signo = SIGFPE;
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info.si_errno = 0;
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info.si_addr = ip;
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/*
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* (~cwd & swd) will mask out exceptions that are not set to unmasked
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* status. 0x3f is the exception bits in these regs, 0x200 is the
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* C1 reg you need in case of a stack fault, 0x040 is the stack
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* fault bit. We should only be taking one exception at a time,
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* so if this combination doesn't produce any single exception,
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* then we have a bad program that isn't synchronizing its FPU usage
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* and it will suffer the consequences since we won't be able to
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* fully reproduce the context of the exception
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*/
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cwd = get_fpu_cwd(task);
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swd = get_fpu_swd(task);
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info.si_addr = (void __user *)regs->ip;
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if (trapnr == 16) {
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unsigned short cwd, swd;
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/*
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* (~cwd & swd) will mask out exceptions that are not set to unmasked
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* status. 0x3f is the exception bits in these regs, 0x200 is the
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* C1 reg you need in case of a stack fault, 0x040 is the stack
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* fault bit. We should only be taking one exception at a time,
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* so if this combination doesn't produce any single exception,
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* then we have a bad program that isn't synchronizing its FPU usage
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* and it will suffer the consequences since we won't be able to
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* fully reproduce the context of the exception
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*/
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cwd = get_fpu_cwd(task);
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swd = get_fpu_swd(task);
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err = swd & ~cwd;
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err = swd & ~cwd;
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} else {
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/*
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* The SIMD FPU exceptions are handled a little differently, as there
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* is only a single status/control register. Thus, to determine which
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* unmasked exception was caught we must mask the exception mask bits
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* at 0x1f80, and then use these to mask the exception bits at 0x3f.
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*/
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unsigned short mxcsr = get_fpu_mxcsr(task);
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err = ~(mxcsr >> 7) & mxcsr;
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}
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if (err & 0x001) { /* Invalid op */
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/*
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@@ -662,97 +665,17 @@ void math_error(void __user *ip)
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dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
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{
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conditional_sti(regs);
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#ifdef CONFIG_X86_32
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ignore_fpu_irq = 1;
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#else
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if (!user_mode(regs) &&
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kernel_math_error(regs, "kernel x87 math error", 16))
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return;
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#endif
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math_error((void __user *)regs->ip);
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}
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static void simd_math_error(void __user *ip)
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{
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struct task_struct *task;
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siginfo_t info;
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unsigned short mxcsr;
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/*
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* Save the info for the exception handler and clear the error.
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*/
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task = current;
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save_init_fpu(task);
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task->thread.trap_no = 19;
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task->thread.error_code = 0;
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info.si_signo = SIGFPE;
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info.si_errno = 0;
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info.si_code = __SI_FAULT;
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info.si_addr = ip;
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/*
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* The SIMD FPU exceptions are handled a little differently, as there
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* is only a single status/control register. Thus, to determine which
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* unmasked exception was caught we must mask the exception mask bits
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* at 0x1f80, and then use these to mask the exception bits at 0x3f.
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*/
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mxcsr = get_fpu_mxcsr(task);
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switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
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case 0x000:
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default:
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break;
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case 0x001: /* Invalid Op */
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info.si_code = FPE_FLTINV;
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break;
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case 0x002: /* Denormalize */
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case 0x010: /* Underflow */
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info.si_code = FPE_FLTUND;
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break;
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case 0x004: /* Zero Divide */
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info.si_code = FPE_FLTDIV;
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break;
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case 0x008: /* Overflow */
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info.si_code = FPE_FLTOVF;
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break;
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case 0x020: /* Precision */
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info.si_code = FPE_FLTRES;
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break;
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}
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force_sig_info(SIGFPE, &info, task);
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math_error(regs, error_code, 16);
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}
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dotraplinkage void
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do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
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{
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conditional_sti(regs);
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#ifdef CONFIG_X86_32
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if (cpu_has_xmm) {
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/* Handle SIMD FPU exceptions on PIII+ processors. */
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ignore_fpu_irq = 1;
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simd_math_error((void __user *)regs->ip);
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return;
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}
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/*
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* Handle strange cache flush from user space exception
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* in all other cases. This is undocumented behaviour.
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*/
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if (regs->flags & X86_VM_MASK) {
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handle_vm86_fault((struct kernel_vm86_regs *)regs, error_code);
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return;
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}
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current->thread.trap_no = 19;
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current->thread.error_code = error_code;
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die_if_kernel("cache flush denied", regs, error_code);
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force_sig(SIGSEGV, current);
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#else
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if (!user_mode(regs) &&
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kernel_math_error(regs, "kernel simd math error", 19))
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return;
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simd_math_error((void __user *)regs->ip);
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#endif
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math_error(regs, error_code, 19);
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}
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dotraplinkage void
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