Cleanup decoding of MIPSxx config registers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@@ -4,6 +4,7 @@
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* for more details.
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*
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* Copyright (C) 2003, 2004 Ralf Baechle
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* Copyright (C) 2004 Maciej W. Rozycki
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*/
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#ifndef __ASM_CPU_FEATURES_H
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#define __ASM_CPU_FEATURES_H
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@@ -39,9 +40,6 @@
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#ifndef cpu_has_watch
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#define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH)
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#endif
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#ifndef cpu_has_mips16
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#define cpu_has_mips16 (cpu_data[0].options & MIPS_CPU_MIPS16)
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#endif
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#ifndef cpu_has_divec
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#define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC)
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#endif
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@@ -66,6 +64,18 @@
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#ifndef cpu_has_llsc
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#define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC)
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#endif
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#ifndef cpu_has_mips16
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#define cpu_has_mips16 (cpu_data[0].ases & MIPS_ASE_MIPS16)
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#endif
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#ifndef cpu_has_mdmx
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#define cpu_has_mdmx (cpu_data[0].ases & MIPS_ASE_MDMX)
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#endif
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#ifndef cpu_has_mips3d
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#define cpu_has_mips3d (cpu_data[0].ases & MIPS_ASE_MIPS3D)
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#endif
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#ifndef cpu_has_smartmips
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#define cpu_has_smartmips (cpu_data[0].ases & MIPS_ASE_SMARTMIPS)
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#endif
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#ifndef cpu_has_vtag_icache
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#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
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#endif
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