Merge tag 'tegra-for-3.15-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

Merge "ARM: tegra: device tree changes for 3.15" from Stephen Warren:

This enables:
- host1x and eDP support on Tegra124.
- LCD panel support for a few Tegra20 devices and Venice2.
- Enables power down, SPI flash, and USB on Venice2.
- Documents which Dalmore revision is supported.
- Adds an I2C bus mux to Cardhu.

Additionally, Tegra124 is converted to use #address-cells=<2> since the
HW suports more than 32-bits of address space, and various cleanups are
included.

* tag 'tegra-for-3.15-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (21 commits)
  ARM: dts: tegra: add PCIe interrupt mapping properties
  ARM: tegra: use 2 address cells for Tegra124 DT
  ARM: tegra: Rename as3722 node to pmic
  ARM: tegra: Fix whitespace around '='
  ARM: tegra: Enable USB on Venice2
  ARM: tegra: Add Tegra124 USB support
  ARM: tegra: Enable eDP for Venice2
  ARM: tegra: Add Tegra124 eDP support
  ARM: tegra: Add Tegra124 host1x support
  ARM: tegra: Hook up SDMMC3 power-supply on Venice2
  ARM: tegra: Overhaul Venice2 regulators
  ARM: tegra: Combine VBUS enable pins into one node
  ARM: tegra: Use "disabled" for status property
  ARM: tegra: add SPI flash to Venice2 DT
  ARM: tegra: enable PCA9546 on Cardhu
  ARM: tegra: enable LCD panel on Ventana
  ARM: tegra: enable LCD panel on Seaboard
  ARM: tegra: add system-power-controller property for PMIC node
  ARM: tegra: document which Dalmore revisions are supported
  ARM: tegra: Properly sort clocks property
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>

arch/arm/boot/dts/tegra30.dtsi

@@ -28,6 +28,10 @@
 			      GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
 		interrupt-names = "intr", "msi";
 
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 0>;
+		interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+
 		bus-range = <0x00 0xff>;
 		#address-cells = <3>;
 		#size-cells = <2>;
@@ -144,9 +148,9 @@
 			compatible = "nvidia,tegra30-gr2d";
 			reg = <0x54140000 0x00040000>;
 			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&tegra_car TEGRA30_CLK_GR2D>;
 			resets = <&tegra_car 21>;
 			reset-names = "2d";
-			clocks = <&tegra_car TEGRA30_CLK_GR2D>;
 		};
 
 		gr3d@54180000 {