Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (289 commits) davinci: DM644x EVM: register MUSB device earlier davinci: add spi devices on tnetv107x evm davinci: add ssp config for tnetv107x evm board davinci: add tnetv107x ssp platform device spi: add ti-ssp spi master driver mfd: add driver for sequencer serial port ARM: EXYNOS4: Implement Clock gating for System MMU ARM: EXYNOS4: Enhancement of System MMU driver ARM: EXYNOS4: Add support for gpio interrupts ARM: S5P: Add function to register gpio interrupt bank data ARM: S5P: Cleanup S5P gpio interrupt code ARM: EXYNOS4: Add missing GPYx banks ARM: S3C64XX: Fix section mismatch from cpufreq init ARM: EXYNOS4: Add keypad device to the SMDKV310 ARM: EXYNOS4: Update clocks for keypad ARM: EXYNOS4: Update keypad base address ARM: EXYNOS4: Add keypad device helpers ARM: EXYNOS4: Add support for SATA on ARMLEX4210 plat-nomadik: make GPIO interrupts work with cpuidle ApSleep mach-u300: define a dummy filter function for coh901318 ... Fix up various conflicts in - arch/arm/mach-exynos4/cpufreq.c - arch/arm/mach-mxs/gpio.c - drivers/net/Kconfig - drivers/tty/serial/Kconfig - drivers/tty/serial/Makefile - drivers/usb/gadget/fsl_mxc_udc.c - drivers/video/Kconfig
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@@ -26,10 +26,6 @@
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#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
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#define SOFT_RESET 0x00000001
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#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
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#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
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#define BRIDGE_INT_TIMER0 0x0002
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#define BRIDGE_INT_TIMER1 0x0004
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#define BRIDGE_INT_TIMER1_CLR (~0x0004)
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#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
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@@ -130,7 +130,8 @@
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#define DOVE_PMU_MPP_GENERAL_CTRL (DOVE_MPP_VIRT_BASE + 0x10)
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#define DOVE_RESET_SAMPLE_LO (DOVE_MPP_VIRT_BASE | 0x014)
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#define DOVE_RESET_SAMPLE_HI (DOVE_MPP_VIRT_BASE | 0x018)
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#define DOVE_GPIO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0400)
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#define DOVE_GPIO_LO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0400)
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#define DOVE_GPIO_HI_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0420)
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#define DOVE_GPIO2_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe8400)
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#define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe803c)
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#define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1)
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@@ -6,46 +6,4 @@
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_GPIO_H
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#define __ASM_ARCH_GPIO_H
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#include <asm/errno.h>
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#include <mach/irqs.h>
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#include <plat/gpio.h>
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#include <asm-generic/gpio.h> /* cansleep wrappers */
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#define GPIO_MAX 72
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#define GPIO_BASE_LO (DOVE_GPIO_VIRT_BASE + 0x00)
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#define GPIO_BASE_HI (DOVE_GPIO_VIRT_BASE + 0x20)
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#define GPIO_BASE(pin) ((pin < 32) ? GPIO_BASE_LO : \
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((pin < 64) ? GPIO_BASE_HI : \
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DOVE_GPIO2_VIRT_BASE))
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#define GPIO_OUT(pin) (GPIO_BASE(pin) + 0x00)
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#define GPIO_IO_CONF(pin) (GPIO_BASE(pin) + 0x04)
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#define GPIO_BLINK_EN(pin) (GPIO_BASE(pin) + 0x08)
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#define GPIO_IN_POL(pin) (GPIO_BASE(pin) + 0x0c)
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#define GPIO_DATA_IN(pin) (GPIO_BASE(pin) + 0x10)
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#define GPIO_EDGE_CAUSE(pin) (GPIO_BASE(pin) + 0x14)
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#define GPIO_EDGE_MASK(pin) (GPIO_BASE(pin) + 0x18)
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#define GPIO_LEVEL_MASK(pin) (GPIO_BASE(pin) + 0x1c)
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static inline int gpio_to_irq(int pin)
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{
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if (pin < NR_GPIO_IRQS)
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return pin + IRQ_DOVE_GPIO_START;
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return -EINVAL;
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}
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static inline int irq_to_gpio(int irq)
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{
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if (IRQ_DOVE_GPIO_START < irq && irq < NR_IRQS)
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return irq - IRQ_DOVE_GPIO_START;
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return -EINVAL;
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}
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#endif
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@@ -92,10 +92,5 @@
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#define NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS)
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/* Required for compatability with PXA AC97 driver. */
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#define IRQ_AC97 IRQ_DOVE_AC97
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/* Required for compatability with PXA DMA driver. */
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#define IRQ_DMA IRQ_DOVE_PDMA
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/* Required for compatability with PXA NAND driver */
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#define IRQ_NAND IRQ_DOVE_NAND
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#endif
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