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MIPS: OCTEON: delete redundant register definitions

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For most OCTEON SoCs there is a repeated and redundant register definition
for almost every hardware register, although the register bit fields
would not differ from other SoCs. Since the driver code should use only
one definition for simplicity, these other fields are just redundant
and can be deleted.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@vger.kernel.org
This commit is contained in:
Aaro Koskinen
2018-12-04 22:12:20 +02:00
committed by Paul Burton
parent 036d0823ce
commit 4089caa7d0
32 changed files with 0 additions and 7920 deletions
Download Patch File Download Diff File Expand all files Collapse all files

235
arch/mips/include/asm/octeon/cvmx-npi-defs.h
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@@ -160,13 +160,6 @@ union cvmx_npi_base_addr_inputx {
uint64_t baddr:61;
#endif
} s;
struct cvmx_npi_base_addr_inputx_s cn30xx;
struct cvmx_npi_base_addr_inputx_s cn31xx;
struct cvmx_npi_base_addr_inputx_s cn38xx;
struct cvmx_npi_base_addr_inputx_s cn38xxp2;
struct cvmx_npi_base_addr_inputx_s cn50xx;
struct cvmx_npi_base_addr_inputx_s cn58xx;
struct cvmx_npi_base_addr_inputx_s cn58xxp1;
};
union cvmx_npi_base_addr_outputx {
@@ -180,13 +173,6 @@ union cvmx_npi_base_addr_outputx {
uint64_t baddr:61;
#endif
} s;
struct cvmx_npi_base_addr_outputx_s cn30xx;
struct cvmx_npi_base_addr_outputx_s cn31xx;
struct cvmx_npi_base_addr_outputx_s cn38xx;
struct cvmx_npi_base_addr_outputx_s cn38xxp2;
struct cvmx_npi_base_addr_outputx_s cn50xx;
struct cvmx_npi_base_addr_outputx_s cn58xx;
struct cvmx_npi_base_addr_outputx_s cn58xxp1;
};
union cvmx_npi_bist_status {
@@ -281,9 +267,6 @@ union cvmx_npi_bist_status {
uint64_t reserved_20_63:44;
#endif
} cn30xx;
struct cvmx_npi_bist_status_s cn31xx;
struct cvmx_npi_bist_status_s cn38xx;
struct cvmx_npi_bist_status_s cn38xxp2;
struct cvmx_npi_bist_status_cn50xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_20_63:44;
@@ -329,8 +312,6 @@ union cvmx_npi_bist_status {
uint64_t reserved_20_63:44;
#endif
} cn50xx;
struct cvmx_npi_bist_status_s cn58xx;
struct cvmx_npi_bist_status_s cn58xxp1;
};
union cvmx_npi_buff_size_outputx {
@@ -346,13 +327,6 @@ union cvmx_npi_buff_size_outputx {
uint64_t reserved_23_63:41;
#endif
} s;
struct cvmx_npi_buff_size_outputx_s cn30xx;
struct cvmx_npi_buff_size_outputx_s cn31xx;
struct cvmx_npi_buff_size_outputx_s cn38xx;
struct cvmx_npi_buff_size_outputx_s cn38xxp2;
struct cvmx_npi_buff_size_outputx_s cn50xx;
struct cvmx_npi_buff_size_outputx_s cn58xx;
struct cvmx_npi_buff_size_outputx_s cn58xxp1;
};
union cvmx_npi_comp_ctl {
@@ -368,9 +342,6 @@ union cvmx_npi_comp_ctl {
uint64_t reserved_10_63:54;
#endif
} s;
struct cvmx_npi_comp_ctl_s cn50xx;
struct cvmx_npi_comp_ctl_s cn58xx;
struct cvmx_npi_comp_ctl_s cn58xxp1;
};
union cvmx_npi_ctl_status {
@@ -498,11 +469,6 @@ union cvmx_npi_ctl_status {
uint64_t reserved_63_63:1;
#endif
} cn31xx;
struct cvmx_npi_ctl_status_s cn38xx;
struct cvmx_npi_ctl_status_s cn38xxp2;
struct cvmx_npi_ctl_status_cn31xx cn50xx;
struct cvmx_npi_ctl_status_s cn58xx;
struct cvmx_npi_ctl_status_s cn58xxp1;
};
union cvmx_npi_dbg_select {
@@ -516,13 +482,6 @@ union cvmx_npi_dbg_select {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_npi_dbg_select_s cn30xx;
struct cvmx_npi_dbg_select_s cn31xx;
struct cvmx_npi_dbg_select_s cn38xx;
struct cvmx_npi_dbg_select_s cn38xxp2;
struct cvmx_npi_dbg_select_s cn50xx;
struct cvmx_npi_dbg_select_s cn58xx;
struct cvmx_npi_dbg_select_s cn58xxp1;
};
union cvmx_npi_dma_control {
@@ -558,13 +517,6 @@ union cvmx_npi_dma_control {
uint64_t reserved_36_63:28;
#endif
} s;
struct cvmx_npi_dma_control_s cn30xx;
struct cvmx_npi_dma_control_s cn31xx;
struct cvmx_npi_dma_control_s cn38xx;
struct cvmx_npi_dma_control_s cn38xxp2;
struct cvmx_npi_dma_control_s cn50xx;
struct cvmx_npi_dma_control_s cn58xx;
struct cvmx_npi_dma_control_s cn58xxp1;
};
union cvmx_npi_dma_highp_counts {
@@ -580,13 +532,6 @@ union cvmx_npi_dma_highp_counts {
uint64_t reserved_39_63:25;
#endif
} s;
struct cvmx_npi_dma_highp_counts_s cn30xx;
struct cvmx_npi_dma_highp_counts_s cn31xx;
struct cvmx_npi_dma_highp_counts_s cn38xx;
struct cvmx_npi_dma_highp_counts_s cn38xxp2;
struct cvmx_npi_dma_highp_counts_s cn50xx;
struct cvmx_npi_dma_highp_counts_s cn58xx;
struct cvmx_npi_dma_highp_counts_s cn58xxp1;
};
union cvmx_npi_dma_highp_naddr {
@@ -602,13 +547,6 @@ union cvmx_npi_dma_highp_naddr {
uint64_t reserved_40_63:24;
#endif
} s;
struct cvmx_npi_dma_highp_naddr_s cn30xx;
struct cvmx_npi_dma_highp_naddr_s cn31xx;
struct cvmx_npi_dma_highp_naddr_s cn38xx;
struct cvmx_npi_dma_highp_naddr_s cn38xxp2;
struct cvmx_npi_dma_highp_naddr_s cn50xx;
struct cvmx_npi_dma_highp_naddr_s cn58xx;
struct cvmx_npi_dma_highp_naddr_s cn58xxp1;
};
union cvmx_npi_dma_lowp_counts {
@@ -624,13 +562,6 @@ union cvmx_npi_dma_lowp_counts {
uint64_t reserved_39_63:25;
#endif
} s;
struct cvmx_npi_dma_lowp_counts_s cn30xx;
struct cvmx_npi_dma_lowp_counts_s cn31xx;
struct cvmx_npi_dma_lowp_counts_s cn38xx;
struct cvmx_npi_dma_lowp_counts_s cn38xxp2;
struct cvmx_npi_dma_lowp_counts_s cn50xx;
struct cvmx_npi_dma_lowp_counts_s cn58xx;
struct cvmx_npi_dma_lowp_counts_s cn58xxp1;
};
union cvmx_npi_dma_lowp_naddr {
@@ -646,13 +577,6 @@ union cvmx_npi_dma_lowp_naddr {
uint64_t reserved_40_63:24;
#endif
} s;
struct cvmx_npi_dma_lowp_naddr_s cn30xx;
struct cvmx_npi_dma_lowp_naddr_s cn31xx;
struct cvmx_npi_dma_lowp_naddr_s cn38xx;
struct cvmx_npi_dma_lowp_naddr_s cn38xxp2;
struct cvmx_npi_dma_lowp_naddr_s cn50xx;
struct cvmx_npi_dma_lowp_naddr_s cn58xx;
struct cvmx_npi_dma_lowp_naddr_s cn58xxp1;
};
union cvmx_npi_highp_dbell {
@@ -666,13 +590,6 @@ union cvmx_npi_highp_dbell {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_npi_highp_dbell_s cn30xx;
struct cvmx_npi_highp_dbell_s cn31xx;
struct cvmx_npi_highp_dbell_s cn38xx;
struct cvmx_npi_highp_dbell_s cn38xxp2;
struct cvmx_npi_highp_dbell_s cn50xx;
struct cvmx_npi_highp_dbell_s cn58xx;
struct cvmx_npi_highp_dbell_s cn58xxp1;
};
union cvmx_npi_highp_ibuff_saddr {
@@ -686,13 +603,6 @@ union cvmx_npi_highp_ibuff_saddr {
uint64_t reserved_36_63:28;
#endif
} s;
struct cvmx_npi_highp_ibuff_saddr_s cn30xx;
struct cvmx_npi_highp_ibuff_saddr_s cn31xx;
struct cvmx_npi_highp_ibuff_saddr_s cn38xx;
struct cvmx_npi_highp_ibuff_saddr_s cn38xxp2;
struct cvmx_npi_highp_ibuff_saddr_s cn50xx;
struct cvmx_npi_highp_ibuff_saddr_s cn58xx;
struct cvmx_npi_highp_ibuff_saddr_s cn58xxp1;
};
union cvmx_npi_input_control {
@@ -745,12 +655,6 @@ union cvmx_npi_input_control {
uint64_t reserved_22_63:42;
#endif
} cn30xx;
struct cvmx_npi_input_control_cn30xx cn31xx;
struct cvmx_npi_input_control_s cn38xx;
struct cvmx_npi_input_control_cn30xx cn38xxp2;
struct cvmx_npi_input_control_s cn50xx;
struct cvmx_npi_input_control_s cn58xx;
struct cvmx_npi_input_control_s cn58xxp1;
};
union cvmx_npi_int_enb {
@@ -1094,7 +998,6 @@ union cvmx_npi_int_enb {
uint64_t reserved_62_63:2;
#endif
} cn31xx;
struct cvmx_npi_int_enb_s cn38xx;
struct cvmx_npi_int_enb_cn38xxp2 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_42_63:22;
@@ -1186,9 +1089,6 @@ union cvmx_npi_int_enb {
uint64_t reserved_42_63:22;
#endif
} cn38xxp2;
struct cvmx_npi_int_enb_cn31xx cn50xx;
struct cvmx_npi_int_enb_s cn58xx;
struct cvmx_npi_int_enb_s cn58xxp1;
};
union cvmx_npi_int_sum {
@@ -1532,7 +1432,6 @@ union cvmx_npi_int_sum {
uint64_t reserved_62_63:2;
#endif
} cn31xx;
struct cvmx_npi_int_sum_s cn38xx;
struct cvmx_npi_int_sum_cn38xxp2 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_42_63:22;
@@ -1624,9 +1523,6 @@ union cvmx_npi_int_sum {
uint64_t reserved_42_63:22;
#endif
} cn38xxp2;
struct cvmx_npi_int_sum_cn31xx cn50xx;
struct cvmx_npi_int_sum_s cn58xx;
struct cvmx_npi_int_sum_s cn58xxp1;
};
union cvmx_npi_lowp_dbell {
@@ -1640,13 +1536,6 @@ union cvmx_npi_lowp_dbell {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_npi_lowp_dbell_s cn30xx;
struct cvmx_npi_lowp_dbell_s cn31xx;
struct cvmx_npi_lowp_dbell_s cn38xx;
struct cvmx_npi_lowp_dbell_s cn38xxp2;
struct cvmx_npi_lowp_dbell_s cn50xx;
struct cvmx_npi_lowp_dbell_s cn58xx;
struct cvmx_npi_lowp_dbell_s cn58xxp1;
};
union cvmx_npi_lowp_ibuff_saddr {
@@ -1660,13 +1549,6 @@ union cvmx_npi_lowp_ibuff_saddr {
uint64_t reserved_36_63:28;
#endif
} s;
struct cvmx_npi_lowp_ibuff_saddr_s cn30xx;
struct cvmx_npi_lowp_ibuff_saddr_s cn31xx;
struct cvmx_npi_lowp_ibuff_saddr_s cn38xx;
struct cvmx_npi_lowp_ibuff_saddr_s cn38xxp2;
struct cvmx_npi_lowp_ibuff_saddr_s cn50xx;
struct cvmx_npi_lowp_ibuff_saddr_s cn58xx;
struct cvmx_npi_lowp_ibuff_saddr_s cn58xxp1;
};
union cvmx_npi_mem_access_subidx {
@@ -1696,7 +1578,6 @@ union cvmx_npi_mem_access_subidx {
uint64_t reserved_38_63:26;
#endif
} s;
struct cvmx_npi_mem_access_subidx_s cn30xx;
struct cvmx_npi_mem_access_subidx_cn31xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_36_63:28;
@@ -1718,11 +1599,6 @@ union cvmx_npi_mem_access_subidx {
uint64_t reserved_36_63:28;
#endif
} cn31xx;
struct cvmx_npi_mem_access_subidx_s cn38xx;
struct cvmx_npi_mem_access_subidx_cn31xx cn38xxp2;
struct cvmx_npi_mem_access_subidx_s cn50xx;
struct cvmx_npi_mem_access_subidx_s cn58xx;
struct cvmx_npi_mem_access_subidx_s cn58xxp1;
};
union cvmx_npi_msi_rcv {
@@ -1734,13 +1610,6 @@ union cvmx_npi_msi_rcv {
uint64_t int_vec:64;
#endif
} s;
struct cvmx_npi_msi_rcv_s cn30xx;
struct cvmx_npi_msi_rcv_s cn31xx;
struct cvmx_npi_msi_rcv_s cn38xx;
struct cvmx_npi_msi_rcv_s cn38xxp2;
struct cvmx_npi_msi_rcv_s cn50xx;
struct cvmx_npi_msi_rcv_s cn58xx;
struct cvmx_npi_msi_rcv_s cn58xxp1;
};
union cvmx_npi_num_desc_outputx {
@@ -1754,13 +1623,6 @@ union cvmx_npi_num_desc_outputx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_npi_num_desc_outputx_s cn30xx;
struct cvmx_npi_num_desc_outputx_s cn31xx;
struct cvmx_npi_num_desc_outputx_s cn38xx;
struct cvmx_npi_num_desc_outputx_s cn38xxp2;
struct cvmx_npi_num_desc_outputx_s cn50xx;
struct cvmx_npi_num_desc_outputx_s cn58xx;
struct cvmx_npi_num_desc_outputx_s cn58xxp1;
};
union cvmx_npi_output_control {
@@ -1932,7 +1794,6 @@ union cvmx_npi_output_control {
uint64_t reserved_46_63:18;
#endif
} cn31xx;
struct cvmx_npi_output_control_s cn38xx;
struct cvmx_npi_output_control_cn38xxp2 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_48_63:16;
@@ -2069,8 +1930,6 @@ union cvmx_npi_output_control {
uint64_t reserved_49_63:15;
#endif
} cn50xx;
struct cvmx_npi_output_control_s cn58xx;
struct cvmx_npi_output_control_s cn58xxp1;
};
union cvmx_npi_px_dbpair_addr {
@@ -2086,13 +1945,6 @@ union cvmx_npi_px_dbpair_addr {
uint64_t reserved_63_63:1;
#endif
} s;
struct cvmx_npi_px_dbpair_addr_s cn30xx;
struct cvmx_npi_px_dbpair_addr_s cn31xx;
struct cvmx_npi_px_dbpair_addr_s cn38xx;
struct cvmx_npi_px_dbpair_addr_s cn38xxp2;
struct cvmx_npi_px_dbpair_addr_s cn50xx;
struct cvmx_npi_px_dbpair_addr_s cn58xx;
struct cvmx_npi_px_dbpair_addr_s cn58xxp1;
};
union cvmx_npi_px_instr_addr {
@@ -2106,13 +1958,6 @@ union cvmx_npi_px_instr_addr {
uint64_t state:3;
#endif
} s;
struct cvmx_npi_px_instr_addr_s cn30xx;
struct cvmx_npi_px_instr_addr_s cn31xx;
struct cvmx_npi_px_instr_addr_s cn38xx;
struct cvmx_npi_px_instr_addr_s cn38xxp2;
struct cvmx_npi_px_instr_addr_s cn50xx;
struct cvmx_npi_px_instr_addr_s cn58xx;
struct cvmx_npi_px_instr_addr_s cn58xxp1;
};
union cvmx_npi_px_instr_cnts {
@@ -2128,13 +1973,6 @@ union cvmx_npi_px_instr_cnts {
uint64_t reserved_38_63:26;
#endif
} s;
struct cvmx_npi_px_instr_cnts_s cn30xx;
struct cvmx_npi_px_instr_cnts_s cn31xx;
struct cvmx_npi_px_instr_cnts_s cn38xx;
struct cvmx_npi_px_instr_cnts_s cn38xxp2;
struct cvmx_npi_px_instr_cnts_s cn50xx;
struct cvmx_npi_px_instr_cnts_s cn58xx;
struct cvmx_npi_px_instr_cnts_s cn58xxp1;
};
union cvmx_npi_px_pair_cnts {
@@ -2150,13 +1988,6 @@ union cvmx_npi_px_pair_cnts {
uint64_t reserved_37_63:27;
#endif
} s;
struct cvmx_npi_px_pair_cnts_s cn30xx;
struct cvmx_npi_px_pair_cnts_s cn31xx;
struct cvmx_npi_px_pair_cnts_s cn38xx;
struct cvmx_npi_px_pair_cnts_s cn38xxp2;
struct cvmx_npi_px_pair_cnts_s cn50xx;
struct cvmx_npi_px_pair_cnts_s cn58xx;
struct cvmx_npi_px_pair_cnts_s cn58xxp1;
};
union cvmx_npi_pci_burst_size {
@@ -2172,13 +2003,6 @@ union cvmx_npi_pci_burst_size {
uint64_t reserved_14_63:50;
#endif
} s;
struct cvmx_npi_pci_burst_size_s cn30xx;
struct cvmx_npi_pci_burst_size_s cn31xx;
struct cvmx_npi_pci_burst_size_s cn38xx;
struct cvmx_npi_pci_burst_size_s cn38xxp2;
struct cvmx_npi_pci_burst_size_s cn50xx;
struct cvmx_npi_pci_burst_size_s cn58xx;
struct cvmx_npi_pci_burst_size_s cn58xxp1;
};
union cvmx_npi_pci_int_arb_cfg {
@@ -2215,12 +2039,6 @@ union cvmx_npi_pci_int_arb_cfg {
uint64_t reserved_5_63:59;
#endif
} cn30xx;
struct cvmx_npi_pci_int_arb_cfg_cn30xx cn31xx;
struct cvmx_npi_pci_int_arb_cfg_cn30xx cn38xx;
struct cvmx_npi_pci_int_arb_cfg_cn30xx cn38xxp2;
struct cvmx_npi_pci_int_arb_cfg_s cn50xx;
struct cvmx_npi_pci_int_arb_cfg_s cn58xx;
struct cvmx_npi_pci_int_arb_cfg_s cn58xxp1;
};
union cvmx_npi_pci_read_cmd {
@@ -2234,13 +2052,6 @@ union cvmx_npi_pci_read_cmd {
uint64_t reserved_11_63:53;
#endif
} s;
struct cvmx_npi_pci_read_cmd_s cn30xx;
struct cvmx_npi_pci_read_cmd_s cn31xx;
struct cvmx_npi_pci_read_cmd_s cn38xx;
struct cvmx_npi_pci_read_cmd_s cn38xxp2;
struct cvmx_npi_pci_read_cmd_s cn50xx;
struct cvmx_npi_pci_read_cmd_s cn58xx;
struct cvmx_npi_pci_read_cmd_s cn58xxp1;
};
union cvmx_npi_port32_instr_hdr {
@@ -2276,13 +2087,6 @@ union cvmx_npi_port32_instr_hdr {
uint64_t reserved_44_63:20;
#endif
} s;
struct cvmx_npi_port32_instr_hdr_s cn30xx;
struct cvmx_npi_port32_instr_hdr_s cn31xx;
struct cvmx_npi_port32_instr_hdr_s cn38xx;
struct cvmx_npi_port32_instr_hdr_s cn38xxp2;
struct cvmx_npi_port32_instr_hdr_s cn50xx;
struct cvmx_npi_port32_instr_hdr_s cn58xx;
struct cvmx_npi_port32_instr_hdr_s cn58xxp1;
};
union cvmx_npi_port33_instr_hdr {
@@ -2318,12 +2122,6 @@ union cvmx_npi_port33_instr_hdr {
uint64_t reserved_44_63:20;
#endif
} s;
struct cvmx_npi_port33_instr_hdr_s cn31xx;
struct cvmx_npi_port33_instr_hdr_s cn38xx;
struct cvmx_npi_port33_instr_hdr_s cn38xxp2;
struct cvmx_npi_port33_instr_hdr_s cn50xx;
struct cvmx_npi_port33_instr_hdr_s cn58xx;
struct cvmx_npi_port33_instr_hdr_s cn58xxp1;
};
union cvmx_npi_port34_instr_hdr {
@@ -2359,10 +2157,6 @@ union cvmx_npi_port34_instr_hdr {
uint64_t reserved_44_63:20;
#endif
} s;
struct cvmx_npi_port34_instr_hdr_s cn38xx;
struct cvmx_npi_port34_instr_hdr_s cn38xxp2;
struct cvmx_npi_port34_instr_hdr_s cn58xx;
struct cvmx_npi_port34_instr_hdr_s cn58xxp1;
};
union cvmx_npi_port35_instr_hdr {
@@ -2398,10 +2192,6 @@ union cvmx_npi_port35_instr_hdr {
uint64_t reserved_44_63:20;
#endif
} s;
struct cvmx_npi_port35_instr_hdr_s cn38xx;
struct cvmx_npi_port35_instr_hdr_s cn38xxp2;
struct cvmx_npi_port35_instr_hdr_s cn58xx;
struct cvmx_npi_port35_instr_hdr_s cn58xxp1;
};
union cvmx_npi_port_bp_control {
@@ -2417,13 +2207,6 @@ union cvmx_npi_port_bp_control {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_npi_port_bp_control_s cn30xx;
struct cvmx_npi_port_bp_control_s cn31xx;
struct cvmx_npi_port_bp_control_s cn38xx;
struct cvmx_npi_port_bp_control_s cn38xxp2;
struct cvmx_npi_port_bp_control_s cn50xx;
struct cvmx_npi_port_bp_control_s cn58xx;
struct cvmx_npi_port_bp_control_s cn58xxp1;
};
union cvmx_npi_rsl_int_blocks {
@@ -2566,7 +2349,6 @@ union cvmx_npi_rsl_int_blocks {
uint64_t reserved_32_63:32;
#endif
} cn30xx;
struct cvmx_npi_rsl_int_blocks_cn30xx cn31xx;
struct cvmx_npi_rsl_int_blocks_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_32_63:32;
@@ -2638,7 +2420,6 @@ union cvmx_npi_rsl_int_blocks {
uint64_t reserved_32_63:32;
#endif
} cn38xx;
struct cvmx_npi_rsl_int_blocks_cn38xx cn38xxp2;
struct cvmx_npi_rsl_int_blocks_cn50xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_31_63:33;
@@ -2702,8 +2483,6 @@ union cvmx_npi_rsl_int_blocks {
uint64_t reserved_31_63:33;
#endif
} cn50xx;
struct cvmx_npi_rsl_int_blocks_cn38xx cn58xx;
struct cvmx_npi_rsl_int_blocks_cn38xx cn58xxp1;
};
union cvmx_npi_size_inputx {
@@ -2717,13 +2496,6 @@ union cvmx_npi_size_inputx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_npi_size_inputx_s cn30xx;
struct cvmx_npi_size_inputx_s cn31xx;
struct cvmx_npi_size_inputx_s cn38xx;
struct cvmx_npi_size_inputx_s cn38xxp2;
struct cvmx_npi_size_inputx_s cn50xx;
struct cvmx_npi_size_inputx_s cn58xx;
struct cvmx_npi_size_inputx_s cn58xxp1;
};
union cvmx_npi_win_read_to {
@@ -2737,13 +2509,6 @@ union cvmx_npi_win_read_to {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_npi_win_read_to_s cn30xx;
struct cvmx_npi_win_read_to_s cn31xx;
struct cvmx_npi_win_read_to_s cn38xx;
struct cvmx_npi_win_read_to_s cn38xxp2;
struct cvmx_npi_win_read_to_s cn50xx;
struct cvmx_npi_win_read_to_s cn58xx;
struct cvmx_npi_win_read_to_s cn58xxp1;
};
#endif